An Analysis of Industrial SRAM Test Results

An Analysis of Industrial
SRAM Test ResultsVA
Comprehensive Study
on Effectiveness and
Classification of March
Test Algorithms
Michael Linder and Alfred Eder Klaus Oberländer
University of Applied Sciences Augsburg Infineon Technologies AG

Ulf Schlichtmann
Technische Universität München
have been tested during full industrial
production. This allows a meaningful
Editor’s notes:
statistical analysis within the range of
This paper deals with efficient test algorithm identification of embedded
SRAMs. The approach is based on silicon test results of automotive parts per million (ppm). To the best of
microcontroller devices, which tries to identify efficient tests by removing our knowledge, no such detailed and
unnecessary test patterns that cover the same subset of faults. Results of an comprehensive evaluation of test algo-
industrial case under 29 test algorithms and a large amount of chips are rithms based on large volumes of
obtained; among them, efficient ones are identified. production ICs has been published to
VCheng-Wen Wu, NTHU date. Our analysis took place during the
burn-in phase of production, i.e., after
wafer test and packaging.
h MUCH HAS BEEN published on the development In production test sets, an efficient selection of
and properties of memory test algorithms [1]–[9]. test algorithms is essential to achieve high fault
The theory of functional fault models (FFMs), coverage and low test time at the same time. Until
performance, and effectiveness of test algorithms now, however, test engineers have mostly relied
are commonly confirmed by simulation. In this more on personal experience and even gut feeling
paper, we present a study on the effectiveness of when deciding on production test sets rather than
memory test algorithms based on test results on reliable quantitative data.
gathered during production memory tests of em- In this paper, we present production SRAM test
bedded SRAMs. Hundreds of thousands of devices results and a statistical analysis of these data that
work out the effectiveness of test algorithms and
Digital Object Identifier 10.1109/MDAT.2013.2279752 efficiency of test combinations, which is based
Date of publication: 28 August 2013; date of current version: on approximately 2500 faults. The effectiveness of
22 July 2014. single test algorithms is measured by their fault

42 2168-2356/14 B 2013 IEEE Copublished by the IEEE CEDA, IEEE CASS, IEEE SSCS, and TTTC IEEE Design & Test
coverage, and the efficiency of test combinations is memory test sets [5], as well as new algorithms, such
shown by a comprehensive analysis of union and as March LR [6] and March RAW [7]. In contrast to
intersection of sets of faults detected by combina- older test algorithms, these new test algorithms have
tions of different test algorithms. These analyses principally been developed based on FFMs. The
allow us to classify the test algorithms and to group concept of FFMs has been established during the
them into sets. The findings of this classification are 1990s by Hamdioui [1] and van de Goor [5]. It is a
combined with information about correlation of formal description of any memory fault indepen-
march sequences and FFMs from literature, so that dent of memory type or technology. With the
sets of test algorithms could be allocated to a introduction of FFMs, test algorithms could be
specific set of FFMs. An efficient selection of test developed systematically and targeted for specific
algorithms for production SRAM testing can now be purposes. Additionally, three algorithms within the
based on this classification to avoid similar tests test set are not taken from literature, but are
within a test set and so to avoid redundancy and designed with respect to the specifications of our
save test time. configurable MBIST. These algorithms are Ham5R,
Ham5W, and Ham_Walk.
Test setup and data acquisition The notation of linear march algorithms is ac-
The test suite used for the analysis contains cordingly as described in [10]. An algorithm is
29 linear march algorithms that are executed by a delimited by curly brackets ‘‘{’’ and ‘‘}’’ and a march
configurable memory built-in self-test (MBIST) on element is delimited by parentheses. A +, *, or m
each of the embedded memories of microcontroller prior to the march elements denotes the addressing
devices in 130-nm technology. In total, there have direction up, down, or arbitrary, respectively. An
been 13 embedded SRAMs, sized between 1.38 and operation applied to a cell can be a ‘‘w0’’ (write ‘‘0’’),
128 kB, tested in parallel with a total memory size of an ‘‘r0’’ (read ‘‘0’’), a ‘‘w1,’’ or an ‘‘r1,’’ and all oper-
261.56 kB. Our memory design uses single-port, six- ations of one march element are applied suc-
transistor SRAM cells for all embedded memories in cessively to one cell, before they are applied to the
the study. next cell. A D in the notation of March G denotes
We chose devices of 130-nm technology because delay time between two march elements.
of the high production volumes that are necessary to
achieve enough test data for a meaningful statistical Test environment
analysis. The test volume of a more recent and The tests of this analysis were placed into the
smaller technology (e.g., 90 nm) would not have production test flow of embedded SRAMs of micro-
been sufficient for such a comprehensive analysis. controller devices during burn-in. That means that
For a full access to the high volume of devices, all the tests took place after wafer test and packaging
tests of the study took place during the production (see Figure 1). This strategy allows gathering com-
test flow. prehensive test results at different environmental test
conditions (temperature and supply voltage), and
Memory test algorithms allows extensive test time, as the devices remain up
The set of memory test algorithms contains 29 to 72 h in burn-in so that the test does not limit this
linear march algorithms that are well known and study. During the tests, the results are stored on-chip.
have previously been described in the literature or They are read out and stored in a database after the
are designed due to the properties of the MBIST we test flow has been completed.
used for the study. The set of algorithms is listed in The tests for the analysis presented in this paper
Table 1. The number of test algorithms was restricted took place at a temperature of 145  C and increased
by limited storage space for the test program and by supply voltage of 1.80 V after a high-voltage and
the fact that our MBIST only supports linear high-temperature stress phase during burn-in.
marching algorithms. Hence, unfortunately, no
complex and nonlinear algorithms such as GALPAT Data acquisition and preparation
[5] could be included. However, the test set con- After testing has been completed, the results are
tains commonly used marching algorithms, such as read out from the devices, processed, and written
SCAN, MATS, or March C-, that are often used in into a database. This database allows combining the

May/June 2014 43
 An Analysis of Industrial SRAM Test Results

Table 1 Memory test algorithms.

data in any way and filtering the test results for the
analysis.
While this approach enables us to achieve a large
number of test results for a statistical analysis, the
analysis of the data is restricted to the possibilities that
are given by the production test flow. It was not
possible to pick and collect faulty devices during the
test process as all analyses were done offline after a
Figure 1. SRAM test flow (simplified, schematic). sufficient number of test results were available. That

44 IEEE Design & Test

means that the tests could not be repeated or that intersection ðIÞ is the set of faults that are detected by
single devices could not be retested in more detail. both algorithms ðI ¼ F1 \ F2 Þ. In order to describe the
Therefore, it is not possible to explain effects that relationship between union and intersection as a
affect only very few of the tested devices or even single degree of efficiency, quotient of efficiencyðQeff Þ is
devices. Hence, some effects cannot be explained in introduced as the ratio of intersection over union
this paper. The data acquisition and processing we
jIj
used for this study is only suitable for statistical Qeff ¼ : (1)
jUj
analysis, not for the analysis of individual faults.
However, the values of Qeff are only properly
Data analysis comparable for pairs of algorithms with similar fault
coverage, which means the number of faults detected
Fault coverage is approximately the same ðjF1 j  jF2 jÞ. Hence, to
The fault coverage (FC) of a test algorithm compensate for the falsification due to large differ-
denotes the percentage of faults that are detected ences between jF1 j and jF2 j, a factor jF1 j over jF2 j is
by the algorithm in relation to the total number of taken into account to make the results better
faults. Hence, an algorithm is characterized as comparable, when jF1 j > jF2 j. Hence, Qeff is given by
effective, if the fault coverage is high. Especially
jIj jF1 j
test algorithms such as SCAN or MATS are generally Qeff ¼  :
jUj jF2 j
related to fewer and simple memory faults such as
stuck-at faults (SAF) or transition faults (TF) as they Qeff is within the range of 0 to 1 and denotes the
have not been developed on the basis of the entire efficiency of a pair of algorithms which are
set of FFMs, whereas new algorithms such as March compared. It is: if Qeff ! 0, the intersection of two
LA or March RAW are additionally related to more algorithms is low and the union is high at the same
and complex fault models like dynamic or linked time. So the combination of these algorithms is
faults, as they are specifically designed based on efficient, as only few faults are detected twice
such FFMs. From that it could be expected that the whereas many faults are detected by only one of
fault coverage of new test algorithms is higher than the algorithms. Otherwise, if Qeff ! 1, the intersec-
that of previous algorithms. This is not because the tion and the union of the compared algorithms are
number of complex faults is high, but because these nearly the same and many faults are detected twice.
algorithms not only detect the new fault models, but Such a combination of algorithms would be ineffi-
also detect the simple faults automatically. In [7], cient for memory testing as it is redundant.
March RAW is described and which FFMs are In a reverse conclusion, Qeff is also a degree for
expected to be detected is discussed. This algorithm the similarity of algorithms. For Qeff ! 1, it can be
is a good example for a specific algorithm designed assumed that the properties of two algorithms,
to cover dynamic memory faults, but that covers all concerning which fault models are detected, are
simple and static faults, too. So, the higher fault similar, as predominantly the same faults are
coverage of specific algorithms is not necessarily detected ðF1  F2 Þ, or the set of faults detected by
related to many complex faults, moreover it must be one algorithm is covered by the set of faults detected
taken into account that these algorithms can simply by the other algorithms (i.e. F1  F2 ). On the other
detect more different types of faults. hand, if Qeff ! 0, there are different sets of faults
detected by both algorithms and it can be assumed
Efficiency and similarity that the algorithms are different. Hence, Qeff is also a
To describe the efficiency of combinations of degree for similarity of test algorithms, where
memory test algorithms, we use the theory of sets. The similarity means that the algorithms detect the
algorithms are compared pairwise. Let F1 and F2 be same set of faults and hence are an inefficient
the sets of faults detected by two different algorithms combination. The properties of Qeff regarding
1 and 2. Hence, jF1 j and jF2 j are the number of faults efficiency and similarity are summarized in Table 2.
detected by these algorithm, respectively, and However, not each inefficient combination of
the union ðUÞ is the set of faults detected by the algorithms automatically consists of two similar
combination of both algorithms ðU ¼ F1 [ F2 Þ. The algorithms, e.g., March RAW and Ham5W. From

May/June 2014 45
 An Analysis of Industrial SRAM Test Results

Classification and grouping of algorithms

Table 2 Efficiency and similarity rated by Qeff .
Classifying test algorithms means that algorithms
with similar behavior concerning the fault coverage
of specific fault models are grouped into sets. The
properties of an algorithm to detect specific FFMs
are given by the order of march elements and its
read–write sequences. These are taken from the
literature, where characteristic march sequences
Table 3 and Figure 3e it can be seen that the are described and where FFMs are allocated to
combination of these algorithms is inefficient but these march sequences [4]. These characteristic
neither the structure (Table 1) nor the fault coverage march elements are summarized in Table 4. In
(see Figure 2) is similar. Hence, the term of similarity addition to this theoretical approach, the evaluation
is introduced as a basis for the classification of of Qeff based on our experimental results is taken
algorithms, as will be described in the Grouping and into account to support the grouping of test
Classification section. algorithms.
For a production test set in our test environment, We analyze the similarity and efficiency of test
this means that an efficient set of test algorithms algorithms based on our test results and we use the
achieves a high fault coverage but only consists of theory of sets and the values of Qeff to define sets of
few algorithms. The MBIST needs to be reconfigured test algorithms with similar properties. Algorithms
for each algorithm in the test set. Hence, it is desired that show high intersection are similar in their
to keep the number of algorithms in a production properties as many faults are detected by both
test set as small as possible. algorithms. The results of this analysis are combined

Table 3 Union, intersection, and Qeff for algorithms compared by pairs.

46 IEEE Design & Test

Figure 2. Fault coverage of memory test algorithms.

with the knowledge about characteristic march The following analyses of fault coverage and
sequences from theory, and the sets of algorithms efficiency of test algorithms are based on the values
are allocated to a set of FFMs. of Table 3.

Experimental test results Fault coverage

The results of this analysis are based on the The first overview about the effectiveness of test
production test flow of hundreds of thousands of algorithms is given by the simple fault coverage. The
microcontroller devices. Hence, a statistical resolu- higher the fault coverage, the higher is the amount
tion in the range of ppm could be achieved for the of faults detected. The fault coverage of the
data analysis. Note that only faults are considered algorithms applied in the experimental test set is
that have been detected during the back–end test compared in Figure 2. The highest fault coverage in
flow. That means that previous faults that have been this analysis is achieved by Algorithm B, March U,
detected during wafer test are not considered in this March LR, March SR, and Ham_Walk with about 80%
analysis as the affected devices have already been respectively. This is already an excellent value for
sorted out. In total, 2439 faults are taken into fault coverage of single test algorithms. In contrast,
account for the following data evaluation. the fault coverage of very specific algorithms such as
For each algorithm in the test set, the number of Ham5R and Ham5W is very low at 32% and 19%,
faults that are detected is determined, and for each respectively. Due to the simple march sequence of
pair of algorithms, union, intersection, and Qeff are these algorithms their performance is limited to only
derived and the results are summarized in Table 3. a few fault models. In contrast, the fault coverage of
The values for jF j of each algorithm are listed on the algorithms which are related to many fault models,
main diagonal, the cardinality of each intersection especially with scope on dynamic faults like March
jIj above and the cardinality of union jUj below the RAW, March RAW1, March AB, March AB1, and
main diagonal for each pair of algorithms. Qeff is March BDN, is high; e.g., the fault coverage of March
derived from the values of jF j, jUj, and jIj and is RAW is 64%. However, this shows only the effective-
represented as background shade in Table 3 from ness of single test algorithms but not their efficiency
light for Qeff ! 0 to dark for Qeff ! 1. in test sets. For industrial testing of semiconductor

May/June 2014 47
 An Analysis of Industrial SRAM Test Results

Figure 3. Venn diagrams showing union and intersection of test algorithms. (a) Algorithm B, March U,
March LR, and March SR. (b) March RAW, March AB, and March BDN. (c) March RAW and March RAW1.
(d) SCAN, SCAN+, and March G. (e) SCAN, March RAW, and Ham5W.

48 IEEE Design & Test

 Table 4 Characteristic march sequences and FFMs [6].

memories, the combination of algorithms is of more space reasons, but would be similar. Only Ham_Walk
interest than the fault coverage of single test is a little outstanding as some additional faults are
algorithms Therefore, the analysis of test data is detected that are not covered by the other algo-
extended to union, intersection, and Qeff . rithms. So, in addition to the previous statement, the
sets of faults detected by Algorithm B, March U,
Analysis of effectiveness and similarity March LR, or March SR are approximately a subset of
Analyzing the results listed in Table 3 is a very those faults detected by Ham_Walk. For these

simple way to determine the efficiency and similar- relationships, we use  as a symbol to denote ‘‘is
ity of test algorithms in this study. The similarity, and approximately a subset of’’
hence also the efficiency of test algorithms, is simply

given by a shading. fFAlgB ; FU ; FLR ; FSR g  FHam Walk : (4)
The following results are based on the empirical
and statistical data gathered during the study. The This means, in terms of efficiency and test set
five algorithms Algorithm B, March U, March LR, development, that Ham_Walk is able to replace the
March SR, and Ham_Walk are not only outstanding other algorithms. Using more algorithms of this
concerning their fault coverage, but are also highly group in one set would mean redundant testing and
similar. Comparing these algorithms shows that the so an increase of test time that would hardly
intersection of any pair of these algorithms is increase the fault coverage. Such combinations
extremely high, and so is Qeff . This means that not should be avoided during industrial memory testing
only the cardinality of these algorithms is very as test time is expensive.
similar, but also mostly the same faults are covered Another interesting relationship of algorithms
by these algorithms: can be observed with March RAW, March RAW1,
March AB, March AB1, and March BDN. These
FAlgB  FU  FLR  FSR  FHam Walk : (3)
algorithms have been developed with a focus to
This relationship and also the proportions are detect dynamic faults. In [8] and [9], March AB
shown in Figure 3a, where March LR is taken as base respectively March BDN are described to detect the
of the comparison and all other algorithms are same set of faults as March RAW but with reduced
related to March LR. The Venn diagrams of any other test length. This statement can be confirmed by our
combination of these algorithms are omitted for test results. The fault coverage of these algorithms is

May/June 2014 49
 An Analysis of Industrial SRAM Test Results

almost the same. Figure 3b illustrates combinations be expected due to the fact that the march
of these algorithms and shows that sequence of SCAN is a proper subset of SCAN+
(see Table 1). This discrepancy between theory
FRAW  FAB  FBDN : (5) (same structure of march elements) and practice
Moreover, the test results confirm the assumption (no proper subset) remains a subject for future
that the set of faults detected by March RAW1 analysis, as no individual devices could be picked
respectively March AB1 is a subset of March RAW from the test flow in the production test environ-
respectively March AB [7], [9]. Figure 3c shows ment used in our study.

As defined above, efficient combinations of test
FRAW1  FRAW (6) algorithms are those where the intersection is low
and the union is high at the same time. One of
and
these combinations is SCAN with Ham5W (Qeff ¼

FAB1  FAB : (7) 0:016; see Figure 3e). However, for an efficient
test selection, the whole set of algorithms that is
March RAW1 and March AB1 are assigned to applied needs to be taken into account. Although
single-cell dynamic faults whereas March RAW and the combination of SCAN and Ham5W is very
March AB additionally detect two-cell dynamic efficient, both algorithms are covered by March
faults [9]. So, the intersection of March RAW and RAW. Hence, if March RAW is used in a test set,
March RAW1, and the intersection of March AB and none of the other algorithms would improve the
March AB1 denote those faults within our experi- test results significantly. All relationships between
mental results that contain single-cell dynamic SCAN, Ham5W, and March RAW are illustrated in
faults, and the remaining faults detected by March Figure 3e.
RAW respectively March AB are then assumed to be For any combination of algorithms, the data are
two-cell coupling faults. The results permit an esti- analyzed and are usedVtogether with the theory
mation of the ratio of single-cell to two-cell dynamic about characteristic march elementsVfor the clas-
faults. In our results, 584 faults are detected by sification of test algorithms and FFMs.
March RAW but not by March RAW1, and the inter-
section of these two algorithms contains 979 faults. Grouping and Classification
The union of these algorithms contains 1604 faults The previous section described how to deter-
(see Figure 3c). So, about one third of the faults (584 mine and to describe similar performance of mem-
of 1604) is exclusively detected by March RAW. This ory test algorithms. The findings of sets, subsets, and
third contains the two-cell dynamic faults. About supersets of test algorithms are now used for the
two thirds of the faults (979 of 1604) are detected by following classification of algorithms and faults. In
both algorithms. They contain the single-cell dyna- addition to our experimental gathered results, struc-
mic faults. However, the part of static faults is not tural similarities of test algorithms are also taken into
excluded in the results. Assuming that static faults account for the grouping. In literature introducing
are uniformly distributed, the ratio of single-cell to new test algorithms, the fault coverage for specific
two-cell dynamic faults in our results is approxi- fault models of the new algorithms is compared to
mately 2 : 1. that of recent algorithms by simulation [4], [6], [8],
Two algorithms (SCAN and SCAN+) are completely [9]. We, however, combine theoretical approaches,
covered by March G (Figure 3d). So, all faults detected e.g., characteristic march sequences (Table 4) de-
by SCAN or SCAN+ are already covered by March G. scribed in [4] which are related to FFMs, and the
So, F SCAN and F SCANþ are proper subsets of F G findings of our experiments described in the Exper-
FSCAN  FG (8) imental Test Results section. The biggest difference
between simulation based comparison and our ap-
and proach is that we do not know the kind of fault from
our results. Thus, the information about detectability
FSCANþ  FG : (9)
of specific fault models, i.e., the properties of test
However, the set of faults detected by SCAN is algorithms, is taken from previous published work. For
not a proper subset of SCAN+, although this should the classification based on our statistical analysis, four

50 IEEE Design & Test

 Table 5 Sets of algorithms and FFMs.

kinds of functional faults are taken into account. rithms for production test sets, as similar algo-
These are rithms, and so redundant testing, can be avoided.
From the sets determined and the analysis of
h simple static single-cell faults; similarity and efficiency, the following conclusions
h simple static coupling faults; can be drawn:
h linked faults;
h dynamic faults. h sets I and II are covered by set III;
h the march sequences of March LR are similar to
Based on theory, i.e., the formal description of those of algorithms in set III;
which algorithms are able to detect specific fault h march RAW covers other algorithms of set V;
models given in literature, and also based on the h Ham_Walk covers algorithms of set IV and III.
evaluation of or test results, the algorithms within
our test set are classified into five sets. Table 5 lists An efficient test set which detects many different
the groups of algorithms and allocated FFMs. Here, faults would consist of algorithms of different sets
the similarity of algorithms is necessary to determine which are irredundant. Hence, a combination of
whether algorithms should be in the same set. This March RAW and Ham_Walk would be expected to
classification is similar to that shown in [5], be very efficient. For the evaluation of our results,
grouping simple march algorithms like SCAN, this means that 2347 out of a total of 2439 faults are
MATS, and March C-, and fault modes. detected by the combination of these algorithms.
Each set of algorithms is allocated to a certain That means 96.2% of the faults can be covered with
number of FFMs which are detected predominantly an effort of only two test algorithms. However, this is
by these algorithms, but not only. For example, not yet 100% fault coverage, but our results have
algorithms of set I, II, III, and IV may also detect some shown that at least 13 test algorithms would have
dynamic faults, but the major part of dynamic faults been necessary to detect all faults. This would
is allocated to algorithms of set V. The allocation of mean too much effort for production testing as the
FFMs is based on the description of typical march MBIST needs to be reconfigured for each algorithm
sequences and test algorithms in [4]. in the test set. Hence, our approach is useful for
This grouping of algorithms and fault models is such test stages during a production test flow, where
the basis for an efficient selection of test algo- only a few test algorithms can be used as test time is

May/June 2014 51
 An Analysis of Industrial SRAM Test Results

very limited but a high fault coverage should be Acknowledgment

reached, e.g., during wafer testing. Anyway, for The authors would like to thank M. Huch and the
safety critical microcontrollers, testing alone cannot team of productive test engineering at Infineon
guarantee 100% fault coverage and absolute reli- Technologies AG for the help and support of this
ability. project.

Summary
In this paper, we present a comprehensive h References
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THE AUTHORS APPRECIATE the evaluation test Technol. Design Testing, 1997, pp. 71–78.
results gathered during burn-in of hundreds of
thousands of ICs. The enormous number of test Michael Linder is currently with NXP Semicon-
results gathered during this study enabled them to ductors, Hamburg, Germany, with an emphasis on
demonstrate the relationship between march test test development for security smart card devices.
algorithms and FFMs described in theory based on Linder has a Dipl-Ing (FH) in mechatronics from
statistical analysis in practice. h Hochschule Augsburg, Augsburg, Germany, an MS

52 IEEE Design & Test

in electrical engineering from the University of Ulster, honorary Doctor of Science from the University of
Jordanstown, Northern Ireland (both in 2008), and a Ulster, Jordanstown, Northern Ireland.
Dr-Ing in electrical engineering from the Technische
Universität München, Munich, Germany (2013). Klaus Oberländer is with Infineon Technologies
AG, Neubiberg, Germany, where he is responsible
Ulf Schlichtmann is Chair Professor for Elec- for top level design architecture of state-of-the-art
tronic Design Automation at the Technische Uni- automotive chips. His interests are memory architec-
versität München, Munich, Germany. His research ture and specifications of high-quality, safety and
interests include computer-aided design and analy- reliability SRAMs and their self-test modules that es-
sis of electronic circuits and systems, with an pecially suit the needs of automotive product devel-
emphasis on designing robust systems. Schlicht- opment. Oberländer has an MEng from the University
mann has a Dr-Ing in electrical engineering from the of Ulster, Jordanstown, Northern Ireland and a
Technische Universität München. Dipl-Ing (FH) from Hochschule Augsburg, Augs-
burg, Germany.
Alfred Eder is currently Professor Emeritus at
the Augsburg University of Applied Sciences,
Augsburg, Germany. His interests and current work h Direct questions and comments about this article
include automotive chip design, chip safety, and to Michael Linder, Faculty of Electrical Engineering,
MBIST design. Eder has a Dr-Ing from the Technical University of Applied Sciences Augsburg, Augsburg,
University of Munich, Munich, Germany and an Germany; michael.linder@hs-augsburg.de.

May/June 2014 53