Note: - Attempt all questions. All Questions carry equal marks. In case of any ambiguity or missing data, the same may be assumed and state the assumption made in the answer. Q 1. Answer any four parts of the following. 5x4=20 a) Describe instruction execution cycle with suitable example. b) How pipeline concept is used in MIPS? c) What is threading? Describe fine grained threading. d) What is the basic concept of cache memory? Justify you answer with proper example. e) How memory hierarchy is useful in architecture? Justify your answer. f) What is topology? Justify your answer with suitable example. Q 2. Answer any four parts of the following. 5x4=20 a) What is instruction set architecture? Describe with suitable example? b) What is multicycle pipeline? Justify your answer suitable example. c) What is hit and miss in cache memory? Justify your answer suitable example. d) Describe write strategy policy for cache with suitable example e) Describe cache optimization by adjusting associativity with suitable example. f) What is Omega Network? Justify your answer with suitable example. Q 3. Answer any two parts of the following. 10x2= 20 a) Describe the concept of instruction pipeline? How it is differ from arithmetic pipeline? Justify your answer with suitable example. b Define tomasulo’s approach with suitable example c) What is super scalar processor? Explain with suitable example.
Q 4. Answer any two parts of the following. 10x2= 20
a) What is branch prediction? Define with suitable figure and example. b) What is cache replacement technique? Describe any one technique with suitable example. c) What is Vectored interrupts? Explain with suitable example and diagram.
Q 5. Answer any two parts of the following. 10x2= 20
a) What is virtual channel? Define with suitable figure and example. b) What is compiler optimization techniques for cache optimization? Define with suitable example. c) What is CUDA Programming? Define with suitable application and example.