RISC, CISC & other topics
RISC, CISC & other topics
Examples of RISC processors are SUN's SPARC, PowerPC, Microchip PIC processors,
RISC-V.
1. The RISC processor's performance is better due to the simple and limited number of
the instruction set.
2. It requires several transistors that make it cheaper to design.
3. RISC allows the instruction to use free space on a microprocessor because of its
simplicity.
4. RISC processor is simpler than a CISC processor because of its simple and quick
design, and it can complete its work in one clock cycle.
1. The RISC processor's performance may vary according to the code executed because
subsequent instructions may depend on the previous instruction for their execution in
a cycle.
2. Programmers and compilers often use complex instructions.
3. RISC processors require very fast memory to save various instructions that require a
large collection of cache memory to respond to the instruction in a short time.
RISC Architecture
It is a highly customized set of instructions used in portable devices due to system reliability
such as Apple iPod, mobiles/smartphones, Nintendo DS,
Features of RISC Processor
1. One cycle execution time: For executing each instruction in a computer, the RISC
processors require one CPI (Clock per cycle). And each CPI includes the fetch,
decode and execute method applied in computer instruction.
2. Pipelining technique: The pipelining technique is used in the RISC processors to
execute multiple parts or stages of instructions to perform more efficiently.
3. A large number of registers: RISC processors are optimized with multiple registers
that can be used to store instruction and quickly respond to the computer and
minimize interaction with computer memory.
4. It supports a simple addressing mode and fixed length of instruction for executing the
pipeline.
5. It uses LOAD and STORE instruction to access the memory location.
6. Simple and limited instruction reduces the execution time of a process in a RISC.
CISC
The CISC Stands for Complex Instruction Set Computer, developed by the Intel. It has a
large collection of complex instructions that range from simple to very complex and
specialized in the assembly language level, which takes a long time to execute the
instructions. So, CISC approaches reducing the number of instruction on each program and
ignoring the number of cycles per instruction. It emphasizes to build complex instructions
directly in the hardware because the hardware is always faster than software. However, CISC
chips are relatively slower as compared to RISC chips but use little instruction than RISC.
Examples of CISC processors are VAX, AMD, Intel x86 and the System/360.
The CISC architecture helps reduce program code by embedding multiple operations on each
program instruction, which makes the CISC processor more complex. The CISC architecture-
based computer is designed to decrease memory costs because large programs or instruction
required large memory space to store the data, thus increasing the memory requirement, and a
large collection of memory increases the memory cost, which makes them more expensive.
Advantages of CISC Processors
1. CISC chips are slower than RSIC chips to execute per instruction cycle on each
program.
2. The performance of the machine decreases due to the slowness of the clock speed.
3. Executing the pipeline in the CISC processor makes it complicated to use.
4. The CISC chips require more transistors as compared to RISC design.
5. In CISC it uses only 20% of existing instructions in a programming event.
Difference between the RISC and CISC Processors
RISC CISC
It is a hard wired unit of programming in the RISC Microprogramming unit in CISC Processor.
Processor.
It requires multiple register sets to store the It requires a single register set to store the
instruction. instruction.
RISC has simple decoding of instruction. CISC has complex decoding of instruction.
Uses of the pipeline are simple in RISC. Uses of the pipeline are difficult in CISC.
It uses a limited number of instruction that requires It uses a large number of instruction that
less time to execute the instructions. requires more time to execute the
instructions.
It uses LOAD and STORE that are independent It uses LOAD and STORE instruction in the
instructions in the register-to-register a program's memory-to-memory interaction of a program.
interaction.
RISC has more transistors on memory registers. CISC has transistors to store complex
instructions.
The execution time of RISC is very short. The execution time of CISC is longer.
RISC architecture can be used with high-end CISC architecture can be used with low-end
applications like telecommunication, image applications like home automation, security
processing, video processing, etc. system, etc.
The program written for RISC architecture needs to Program written for CISC architecture tends
take more space in memory. to take less space in memory.
Example of RISC: ARM, PA-RISC, Power Examples of CISC: VAX, Motorola 68000
Architecture, Alpha, AVR, ARC and the SPARC. family, System/360, AMD and the Intel x86
CPUs.
MICROINSTRUCTION:
A microinstruction is a single instruction in microcode, the most elementary instruction in the
computer.
Types of Microinstructions available
Types of microinstruction formats:
S.
No Horizontal µ-programmed CU Vertical µ-programmed CU
It is more flexible than a vertical It is less flexible than horizontal but more
5. micro-programmed control unit. flexible than that of a hardwired control unit.
Computer instructions are a set of machine language instructions that a particular processor
understands and executes. A computer performs tasks on the basis of the instruction
provided.
o The Operation code (Opcode) field which specifies the operation to be performed.
o The Address field which contains the location of the operand, i.e., register or memory
location.
o The Mode field which specifies how the operand will be located.
In Memory-reference instruction, 12 bits of memory is used to specify an address and one bit
to specify the addressing mode 'I'.
The Register-reference instructions are represented by the Opcode 111 with a 0 in the
leftmost bit (bit 15) of the instruction.
Note: The Operation code (Opcode) of an instruction refers to a group of bits that define
arithmetic and logic operations such as add, subtract, multiply, shift, and compliment.
Input-Output instruction
Just like the Register-reference instruction, an Input-Output instruction does not need a
reference to memory and is recognized by the operation code 111 with a 1 in the leftmost bit
of the instruction. The remaining 12 bits are used to specify the type of the input-output
operation or test performed.
Note
o The three operation code bits in positions 12 through 14 should be equal to 111.
Otherwise, the instruction is a memory-reference type, and the bit in position 15 is
taken as the addressing mode I.
o When the three operation code bits are equal to 111, control unit inspects the bit in
position 15. If the bit is 0, the instruction is a register-reference type. Otherwise, the
instruction is an input-output type having bit 1 at position 15.
INSTRUCTION FORMATS
ADD A, B, C
where A, B, and C are the three variables that are authorized to a different area in the
memory. ‘ADD’ is the operation that is implemented on operands. ‘A’ and ‘B’ are the source
operands and ‘C’ is the destination operand.
Therefore, bits are needed to determine the three operands. n bit is needed to determine one
operand (one memory address). Likewise, 3n bits are needed to define three operands (three
memory addresses). Bits are also needed to determine the ADD operation.
ADD A, B
where A and B are the two variables that are designated to a specific location in the memory.
‘ADD’ is the operation that is implemented on the operands. This instruction adds the content
of the variables A and B and saves the result in variable B. Here, ‘A’ is the source operand
and ‘B’ is treated as both source and destination operands.
Bits are needed to determine the two operands. n bit is needed to define one operand (one
memory address). Likewise, 2n bits are needed to determine two operands (two memory
addresses). Bits are also needed to definite the ADD operation.
ADD A
where A is the variable that is authorized to a specific location in the memory. ‘ADD’ is the
operation that is implemented on operand A. This instruction adds the content of the variable
A into the accumulator and saves the result in the accumulator by restoring the content of the
accumulator.
The locations of the operands in zero address instructions are represented implicitly. These
instructions store operands in a structure are known as a pushdown stack.
MICRO-OPERATION
A micro-operation is a simple operation performed on the data stored in one or more
registers. They transfer the data between registers. There are four types of micro-operations:-
Register micro-operations
Arithmetic micro-operations
Logic micro-operations
Shift micro-operations
For example, F <- A ∧ B means the registers A and B value will undergo AND micro-
table.
For example, F <- A ∧ B’ means the value of the registers A and complement B will undergo
F2 represents the truth table of inhibition AND logic micro-operation in the above truth table.
For example, F <- A’ ∧ B means the value of the complement register A and as it is B will
F4 represents the truth table of inhibition AND logic micro-operation in the above truth table.
F6 represents the truth table of Exclusive OR logic micro-operation in the above truth table.
For example, F <- A ⊕ B means the registers A and B value will undergo XOR micro-
The output will be 1 when either x =1 and y = 0 or x = 0 and y = 1.
For example, F <- A ∨ B means the registers A and B value will undergo OR micro-
operation in the above truth table.
For example, F <- A ∨ B’ means the value of the registers A and complement B will undergo
In the above truth table, F11 represents the truth table of this logic micro-operation.
For example, F <- A’ ∨ B means the complemented register A and B value will undergo OR
In the above truth table, F13 represents the truth table of this logic micro-operation.
For example, F <- (A ∨ B)’ means the registers A and B value will undergo NOR micro-
NOR logic micro-operation.
For example, F <- (A ⊕ B)’ means the registers A and B value will undergo Exclusive NOR
The output will be 1 when either x = 0 and y = 0 or x = 1 and y = 1.
For example, F <- (A ∧ B)’ means the registers A and B value will undergo NAND micro-
In the above truth table, F14 represents the truth table of NAND logic micro-operation.
Shift micro-operations
Shift micro-operations are those micro-operations that are used for the serial transfer of
information. These are also used in conjunction with arithmetic micro-operation, logic
micro-operation, and other data-processing operations. There are three types of shift micro-
operations: 1.
1. Logical Shift:
It transfers the 0 zero through the serial input. We use the symbols ‘<<‘ for the logical left
shift and ‘>>‘ for the logical right shift.
Logical Left Shift:
In this shift, one position moves each bit to the left one by one. The Empty least significant
bit (LSB) is filled with zero (i.e, the serial input), and the most significant bit (MSB) is
rejected.
The left shift operator is denoted by the double left arrow key (<<). The general syntax for
the left shift is shift-expression << k.
Logical Left Shift
Note: Every time we shift a number towards the left by 1 bit it multiplies that number by 2.
Logical Right Shift
In this shift, each bit moves to the right one by one and the least significant bit(LSB) is
rejected and the empty MSB is filled with zero.
The right shift operator is denoted by the double right arrow key (>>). The general syntax
for the right shift is “shift-expression >> k”.
Program control instructions has 5 major types which are explained below
1. BRANCH/JUMP
Branch word is used in direct addressing mode while Jump word is used in indirect
addressing mode with the same task. it moves from one location to another defined location.
2. SKIP
It works like a subroutine. When we CALL, it transfers control to a specific position when it
found RETURN it returns back to the next instruction from where It was called.
4. COMPARE
The test bit is used to set any value to zero to test the results. Mostly used in Flags.