Supervisory Circuits with Watchdog and

Manual Reset in 5-Lead SC70 and SOT-23

Data Sheet ADM823/ADM824/ADM825
FEATURES FUNCTIONAL BLOCK DIAGRAM
Precision 2.5 V to 5 V power supply monitor
ADM823
7 reset threshold options: 2.19 V to 4.63 V VCC
140 ms (minimum) reset timeout
VCC
Watchdog timer with 1.6 sec timeout (ADM823, ADM824) RESET
RESET
VREF GENERATOR
Manual reset input (ADM823, ADM825)
Push-pull output stages
MR DEBOUNCE
RESET (ADM823) WATCHDOG
RESET, RESET (ADM824/ADM825) DETECTOR

Low power consumption: 5 µA

04534-001
Guaranteed reset output valid to VCC = 1 V
GND WDI
Power supply glitch immunity
Figure 1.
Specified over automotive temperature range
5-lead SC70 and SOT-23 packages

APPLICATIONS
Microprocessor systems
Computers
Controllers
Intelligent instruments
Portable equipment

GENERAL DESCRIPTION
The ADM823/ADM824/ADM825 are supervisory circuits that These parts are available in a choice of seven reset threshold
monitor power supply voltage levels and code execution integrity options ranging from 2.19 V to 4.63 V. The reset and watchdog
in microprocessor-based systems. In addition to providing timeout periods are fixed at 140 ms (minimum) and 1.6 sec
power-on reset signals, an on-chip watchdog timer can reset the (typical), respectively.
microprocessor if it fails to strobe within a preset timeout The ADM823/ADM824/ADM825 are available in 5-lead SC70
period. A reset signal can also be asserted by an external push- and SOT-23 packages and typically consume only 5 µA, making
button, through a manual reset input. The three parts feature them suitable for use in low power, portable applications.
different combinations of watchdog input, manual reset input,
and output stage configuration, as shown in Table 1.

Table 1. Selection Table

Output Stage
Part No. Watchdog Timer Manual Reset RESET RESET
ADM823 Yes Yes Push-Pull –
ADM824 Yes – Push-Pull Push-Pull
ADM825 – Yes Push-Pull Push-Pull

Rev. D Document Feedback

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Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
ADM823/ADM824/ADM825 Data Sheet

TABLE OF CONTENTS
Features .............................................................................................. 1 Reset Output ..................................................................................9
Applications ....................................................................................... 1 Manual Reset Input .......................................................................9
Functional Block Diagram .............................................................. 1 Watchdog Input .............................................................................9
General Description ......................................................................... 1 Applications Information .............................................................. 10
Revision History ............................................................................... 2 Watchdog Input Current ........................................................... 10
Specifications..................................................................................... 3 Negative-Going VCC Transients ................................................ 10
Absolute Maximum Ratings ............................................................ 5 Ensuring Reset Valid to VCC = 0 V ........................................... 10
ESD Caution .................................................................................. 5 Watchdog Software Considerations ......................................... 10
Pin Configurations and Function Descriptions ........................... 6 Outline Dimensions ....................................................................... 11
Typical Performance Characteristics ............................................. 7 Ordering Guide .......................................................................... 11
Circuit Description ........................................................................... 9

REVISION HISTORY
7/13—Rev. C to Rev. D
Change to Figure 16 .......................................................................... 9
Updated Outline Dimensions ........................................................11
10/10—Rev. B to Rev. C
Updated Outline Dimensions ....................................................... 11
Changes to Ordering Guide .......................................................... 11
5/08—Rev. A to Rev. B
Changes to General Description Section ...................................... 1
Changes to Table 4 ............................................................................ 6
Changes to Ordering Guide .......................................................... 11
2/07—Rev. 0 to Rev. A
Updated Format .................................................................. Universal
Changes to Ordering Guide .......................................................... 11
10/04—Revision 0: Initial Version

Rev. D | Page 2 of 12
Data Sheet ADM823/ADM824/ADM825

SPECIFICATIONS
VCC = 4.75 V to 5.5 V for ADM82xL, VCC = 4.5 V to 5.5 V for ADM82xM, VCC = 3.15 V to 3.6 V for ADM82xT, VCC = 3 V to 3.6 V
for ADM82xS, VCC = 2.7 V to 3.6 V for ADM82xR, VCC = 2.38 V to 2.75 V for ADM82xZ, VCC = 2.25 V to 2.75 V for ADM82xY,
TA = TMIN to TMAX, unless otherwise noted.

Table 2.
Parameter Min Typ Max Unit Test Conditions/Comments
SUPPLY
VCC Operating Voltage Range 1 5.5 V TA = 0°C to 70°C
1.2 V TA = TMIN to TMAX
Supply Current 10 24 µA WDI and MR unconnected
ADM82xL/M
5 12 µA WDI and MR unconnected
ADM82xT/S/R/Z/Y
RESET THRESHOLD VOLTAGE
ADM82xL 4.56 4.63 4.70 V TA = 25°C
4.50 4.75 V TA = TMIN to TMAX
ADM82xM 4.31 4.38 4.45 V TA = 25°C
4.25 4.50 V TA = TMIN to TMAX
ADM82xT 3.04 3.08 3.11 V TA = 25°C
3.00 3.15 V TA = TMIN to TMAX
ADM82xS 2.89 2.93 2.96 V TA = 25°C
2.85 3.00 V TA = TMIN to TMAX
ADM82xR 2.59 2.63 2.66 V TA = 25°C
2.55 2.70 V TA = TMIN to TMAX
ADM82xZ (SC70 Only) 2.28 2.32 2.35 V TA = 25°C
2.25 2.38 V TA = TMIN to TMAX
ADM82xY (SC70 Only) 2.16 2.19 2.22 V TA = 25°C
2.13 2.25 V TA = TMIN to TMAX
RESET THRESHOLD TEMPERATURE COEFFICIENT 40 ppm/°C
RESET THRESHOLD HYSTERESIS 10 mV ADM82xL/M
5 mV ADM82xT/S/R/Z/Y
RESET TIMEOUT PERIOD 140 200 280 ms
VCC TO RESET DELAY 40 µs VTH − VCC = 100 mV
RESET/RESET
RESET Output Voltage 0.4 V VCC = VTH min, ISINK = 3.2 mA,
ADM82xL/M
0.3 V VCC = VTH min, ISINK = 1.2 mA,
ADM82xT/S/R/Z/Y
0.3 V TA = 0°C to 70°C, VCC = 1 V,
VCC falling, ISINK = 50 µA
VCC − 1.5 V VCC = VTH max, ISOURCE = 120 µA,
ADM82xL/M
0.8 × VCC V VCC = VTH max, ISOURCE = 30 µA,
ADM82xT/S/R/Z/Y
RESET Output Voltage (ADM824, ADM825) 0.4 V VCC = VTH max, ISINK = 3.2 mA,
ADM82xL/M
0.3 V VCC = VTH max, ISINK = 1.2 mA,
ADM82xT/S/R/Z/Y
0.8 × VCC V VCC ≥ 1.8 V, ISOURCE = 150 µA

Rev. D | Page 3 of 12
ADM823/ADM824/ADM825 Data Sheet
Parameter Min Typ Max Unit Test Conditions/Comments
WATCHDOG INPUT (ADM823, ADM824)
Watchdog Timeout Period 1.12 1.6 2.40 sec
WDI Pulse Width 50 ns VIL = 0.4 V, VIH = 0.8 × VCC
WDI Input Threshold, VIL 0.7 × VCC 0.3 × VCC V
WDI Input Current 120 160 µA VWDI = VCC, time average
−20 −15 µA VWDI = 0 V, time average
MANUAL RESET INPUT (ADM823, ADM825)
MR Input Threshold 0.7 × VCC 0.3 × VCC V
MR Input Pulse Width 1 µs
MR Glitch Rejection 100 ns
MR Pull-Up Resistance 35 52 75 kΩ
MR to Reset Delay 500 ns

Rev. D | Page 4 of 12
Data Sheet ADM823/ADM824/ADM825

ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted. Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
Table 3. rating only and functional operation of the device at these or
Parameter Rating any other conditions above those indicated in the operational
VCC −0.3 V to +6 V section of this specification is not implied. Exposure to absolute
Output Current (RESET, RESET) 20 mA maximum rating conditions for extended periods may affect
All Other Pins −0.3 V to (VCC + 0.3 V) device reliability.
Operating Temperature Range −40°C to +125°C
Storage Temperature Range −65°C to +150°C
θJA Thermal Impedance ESD CAUTION
SC70 146°C/W
SOT-23 270°C/W
Lead Temperature
Soldering (10 sec) 300°C
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C

Rev. D | Page 5 of 12
ADM823/ADM824/ADM825 Data Sheet

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

RESET 1 5 VCC RESET 1 5 VCC RESET 1 5 VCC

ADM823 ADM824 ADM825

GND 2 TOP VIEW GND 2 TOP VIEW GND 2 TOP VIEW
(Not to Scale) (Not to Scale) (Not to Scale)

04534-002

04534-003

04534-004
MR 3 4 WDI RESET 3 4 WDI RESET 3 4 MR

Figure 2. ADM823 Pin Configuration Figure 3. ADM824 Pin Configuration Figure 4. ADM825 Pin Configuration

Table 4. Pin Function Descriptions

Pin No. Mnemonic Description
1 RESET Active Low, Push-Pull Reset Output. Asserted whenever VCC is below the reset threshold, VTH.
2 GND Ground.
3 MR (ADM823) Manual Reset Input. This is an active low input which, when forced low for at least 1 µs, generates
a reset. It features a 52 kΩ internal pull-up.
RESET (ADM824/ADM825) Active High, Push-Pull Reset Output.
4 WDI (ADM823/ADM824) Watchdog Input. Generates a reset if the voltage on the pin remains low or high for the duration
of the watchdog timeout. The timer is cleared if a logic transition occurs on this pin or if a reset is
generated.
MR (ADM825) Manual Reset Input. This is an active low input which, when forced low for at least 1 µs, generates
a reset. It features a 52 kΩ internal pull-up.
5 VCC Power Supply Voltage Being Monitored.

Rev. D | Page 6 of 12
Data Sheet ADM823/ADM824/ADM825

TYPICAL PERFORMANCE CHARACTERISTICS

10.0 100
9.5
90
9.0
80
8.5

VCC TO RESET DELAY (µs)

8.0 ADM823L 70

7.5 60
7.0
ICC (µA)

50
6.5
6.0 40

5.5 ADM824Y 30
5.0
20
4.5
ADM825R 10
4.0
3.5 0

04534-005

04534-008
–40 –20 0 20 40 60 80 100 120 –40 –20 0 20 40 60 80 100 120
TEMPERATURE (°C) TEMPERATURE (°C)

Figure 5. Supply Current vs. Temperature Figure 8. Reset Comparator Propagation Delay vs. Temperature (VCC Falling)

80
340
75
70 320

MANUAL RESET TO RESET DELAY (ns)

65 300
60
280
55
50 260
45 240
ICC (µA)

40 220
35
200
30
25 180
20 160
15
140
10
5 120
0 100

04534-009
04534-006

0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 –40 –20 0 20 40 60 80 100 120
VCC (V) TEMPERATURE (°C)

Figure 6. Supply Current vs. Supply Voltage Figure 9. Manual Reset to Reset Propagation Delay vs. Temperature
(ADM823/ADM825)

1.05 250

1.04
240
NORMALIZED RESET THRESHOLD (V)

1.03
RESET TIMEOUT PERIOD (ms)

230
1.02
220
1.01

1.00 210

0.99
200
0.98
190
0.97
180
0.96

0.95 170
04534-007

04534-010

–40 –20 0 20 40 60 80 100 120 –40 –20 0 20 40 60 80 100 120

TEMPERATURE (°C) TEMPERATURE (°C)

Figure 7. Normalized Reset Threshold vs. Temperature Figure 10. Reset Timeout Period vs. Temperature

Rev. D | Page 7 of 12
ADM823/ADM824/ADM825 Data Sheet
2.0 190

1.8 180
WATCHDOG TIMEOUT PERIOD (s)

1.6

MR MINIMUM PULSE WIDTH (ns)

170
1.4
160
1.2
150
1.0
140
0.8
130
0.6
120
0.4

0.2 110

0 100

04534-011

04534-013
–40 –20 0 20 40 60 80 100 120 –50 0 50 100
TEMPERATURE (°C) TEMPERATURE (°C)

Figure 11. Watchdog Timeout Period vs. Temperature Figure 13. Manual Reset Minimum Pulse Width vs. Temperature
(ADM823/ADM824) (ADM823/ADM825)
160 3.8
RESET OCCURS ABOVE GRAPH
MAXIMUM VCC TRANSIENT DURATION (µs)

140 3.6

3.4
120
MINIMUM PULSE WIDTH (ns)
NEGATIVE PULSE
3.2
100
VTH = 4.63V
3.0
80
2.8
60
2.6
40
2.4 POSITIVE PULSE

20 2.2
VTH = 2.93V
0 2.0
04534-012

04534-014
10 100 1000 –40 10 60 110 160
OVERDRIVE VOD (mV) TEMPERATURE (°C)

Figure 12. Maximum VCC Transient Duration vs. Reset Threshold Overdrive Figure 14. Watchdog Input Minimum Pulse Width vs. Temperature
(ADM823/ADM824)

Rev. D | Page 8 of 12
Data Sheet ADM823/ADM824/ADM825

CIRCUIT DESCRIPTION
The ADM823/ADM824/ADM825 provide microprocessor MANUAL RESET INPUT
supply voltage supervision by controlling the reset input of the The ADM823/ADM825 feature a manual reset input (MR)
microprocessor. Code execution errors are avoided during which, when driven low, asserts the reset output. When MR
power-up, power-down, and brownout conditions by asserting a transitions from low to high, reset remains asserted for the
reset signal when the supply voltage is below a preset threshold. duration of the reset active timeout period before deasserting.
Errors are also avoided by allowing supply voltage stabilization The MR input has a 52 kΩ internal pull-up so that the input is
with a fixed timeout reset pulse after the supply voltage rises always high when unconnected. An external push-button
above the threshold. In addition, problems with microprocessor switch can be connected between MR and ground so that the
code execution can be monitored and corrected with a watchdog user can generate a reset. Debounce circuitry for this purpose is
timer (ADM823/ADM824). By including watchdog strobe
integrated on chip. Noise immunity is provided on the MR
instructions in microprocessor code, a watchdog timer can
input and fast, negative-going transients of up to 100 ns (typical)
detect whether the microprocessor code breaks down or becomes
are ignored. A 0.1 µF capacitor between MR and ground
stuck in an infinite loop. If this happens, the watchdog timer
provides additional noise immunity.
asserts a reset pulse that restarts the microprocessor in a known
state. If the user detects a problem with the system’s operation, a WATCHDOG INPUT
manual reset input is available (ADM823/ADM825) to reset the The ADM823/ADM824 feature a watchdog timer that monitors
microprocessor with an external push-button, for example. microprocessor activity. A timer circuit is cleared with every
RESET OUTPUT low-to-high or high-to-low logic transition on the watchdog
input pin (WDI), which detects pulses as short as 50 ns. If the
The ADM823 features an active low, push-pull reset output, and
timer counts through the preset watchdog timeout period (tWD),
the ADM824/ADM825 feature dual active low and active high
reset is asserted. The microprocessor is required to toggle the
push-pull reset outputs. For active low and active high outputs,
WDI pin to avoid being reset. Failure of the microprocessor to
the reset signal is guaranteed to be logic low and logic high,
toggle WDI within the timeout period, therefore, indicates a
respectively, for VCC ≥ 1 V.
code execution error, and the reset pulse generated restarts the
The reset output is asserted when VCC is below the reset microprocessor in a known state.
threshold (VTH), when MR is driven low, or when WDI is not
In addition to logic transitions on WDI, the watchdog timer is
serviced within the watchdog timeout period (tWD). Reset
also cleared by a reset assertion due to an undervoltage condi-
remains asserted for the duration of the reset active timeout
tion on VCC or by MR being pulled low. When reset is asserted,
period (tRP) after VCC rises above the reset threshold, after MR
the watchdog timer is cleared and does not begin counting again
transitions from low to high, or after the watchdog timer times
until reset is deasserted. The watchdog timer can be disabled by
out. Figure 15 illustrates the behavior of the reset outputs.
leaving WDI floating or by three-stating the WDI driver.
VCC VTH VTH
VCC VCC VTH
1V VCC
0V 1V
0V
VCC VCC
RESET tRP tRD RESET tRP tWD tRP
0V 0V
VCC

04534-021
VCC
WDI
04534-018

RESET tRP
1V tRD 0V
0V
Figure 16. Watchdog Timing Diagram
Figure 15. Reset Timing Diagram

Rev. D | Page 9 of 12
ADM823/ADM824/ADM825 Data Sheet

APPLICATIONS INFORMATION
WATCHDOG INPUT CURRENT WATCHDOG SOFTWARE CONSIDERATIONS
To minimize the watchdog input current (and minimize overall In implementing the microprocessor watchdog strobe code,
power consumption), leave WDI low for the majority of the quickly switching WDI low-to-high and then high-to-low
watchdog timeout period. When driven high, WDI can draw as (minimizing WDI high time) is desirable for current consumption
much as 160 µA. Pulsing WDI low-high-low at a low duty cycle reasons. However, a more effective way of using the watchdog
reduces the effect of the large input current. When WDI is function can be considered.
unconnected, a window comparator disconnects the watchdog A low-high-low WDI pulse within a given subroutine prevents
timer from the reset output circuitry so that reset is not asserted the watchdog timing out. However, if the subroutine becomes
when the watchdog timer times out. stuck in an infinite loop, the watchdog cannot detect this cond-
NEGATIVE-GOING VCC TRANSIENTS ition because the subroutine continues to toggle WDI. A more
To avoid unnecessary resets caused by fast power supply effective coding scheme for detecting this error involves using a
transients, the ADM823/ADM824/ADM825 are equipped with slightly longer watchdog timeout. In the program that calls the
glitch rejection circuitry. The typical performance characteristic subroutine, WDI is set high (see Figure 18). The subroutine sets
in Figure 12 plots VCC transient duration vs. the transient mag- WDI low when it is called. If the program executes without error,
nitude. The curves show combinations of transient magnitude WDI is toggled high and low with every loop of the program.
and duration for which a reset is not generated for 4.63 V and If the subroutine enters an infinite loop, WDI is kept low, the
2.93 V reset threshold parts. For example, with the 2.93 V watchdog times out, and the microprocessor is reset.
threshold, a transient that goes 100 mV below the threshold and
lasts 8 µs typically does not cause a reset, but if the transient is
any larger in magnitude or duration, a reset is generated. An START

optional 0.1 µF bypass capacitor mounted close to VCC provides

additional glitch rejection. SET WDI
HIGH
RESET
ENSURING RESET VALID TO VCC = 0 V
PROGRAM
Both active low and active high reset outputs are guaranteed to CODE
be valid for VCC as low as 1 V. However, by using an external
resistor with push-pull configured reset outputs, valid outputs INFINITE LOOP:
WATCHDOG
for VCC as low as 0 V are possible. For an active low reset output, SUBROUTINE
TIMES OUT

a resistor connected between RESET and ground pulls the output SET WDI
low when it is unable to sink current. For an active high reset LOW

output, a resistor connected between RESET and VCC pulls the

04534-020
output high when it is unable to source current. A large resist- RETURN

ance such as 100 kΩ should be used so that the reset output is

Figure 18. Watchdog Flow Diagram
not overloaded when VCC is above 1 V.
VCC VCC
VCC

100kΩ

ADM823/ RESET RESET

RESET ADM824/
ADM824/ ADM823 MICROPROCESSOR
ADM825 RESET
ADM825 100kΩ
MR WDI I/O
04534-017

04534-019

Figure 17. Ensuring Reset Valid to VCC = 0 V Figure 19. Typical Application Circuit

Rev. D | Page 10 of 12
Data Sheet ADM823/ADM824/ADM825

OUTLINE DIMENSIONS
2.20
2.00
1.80

1.35 5 4 2.40
1.25 2.10
1.15 1 2 3 1.80

0.65 BSC
1.00 0.40
1.10
0.90 0.10
0.80
0.70

0.46
SEATING 0.22
0.10 MAX 0.30 0.36
PLANE 0.08
COPLANARITY 0.15 0.26
0.10

072809-A
COMPLIANT TO JEDEC STANDARDS MO-203-AA

Figure 20. 5-Lead Thin Shrink Small Outline Transistor Package [SC70]
(KS-5)
Dimensions shown in millimeters

3.00
2.90
2.80

5 4 3.00
1.70
1.60 2.80
1.50 2.60
1 2 3

0.95 BSC
1.90
BSC
1.30
1.15
0.90
1.45 MAX 0.20 MAX
0.95 MIN 0.08 MIN
0.55
0.15 MAX 10° 0.45
0.05 MIN SEATING 5° 0.60
0.50 MAX PLANE BSC 0.35
0.35 MIN 0°
11-01-2010-A

COMPLIANT TO JEDEC STANDARDS MO-178-AA

Figure 21. 5-Lead Small Outline Transistor Package [SOT-23]

(RJ-5)
Dimensions shown in millimeters

ORDERING GUIDE
Model 1 Reset Threshold (V) Temperature Range Quantity Package Description Package Option Branding
ADM823LYKSZ-R7 4.63 −40°C to +125°C 3k 5-Lead SC70 KS-5 M4L
ADM823LYRJ-R7 4.63 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 N07
ADM823LYRJZ-R7 4.63 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 M4L
ADM823MYKSZ-R7 4.38 −40°C to +125°C 3k 5-Lead SC70 KS-5 M4L
ADM823MYRJZ-R7 4.38 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 M4L
ADM823TYKSZ-R7 3.08 −40°C to +125°C 3k 5-Lead SC70 KS-5 M4L
ADM823TYRJ-R7 3.08 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 N07
ADM823TYRJZ-R7 3.08 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 M4L
ADM823SYKSZ-R7 2.93 −40°C to +125°C 3k 5-Lead SC70 KS-5 M4L
ADM823SYRJ-R7 2.93 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 N07
ADM823SYRJZ-R7 2.93 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 M4L
Rev. D | Page 11 of 12
ADM823/ADM824/ADM825 Data Sheet
Model 1 Reset Threshold (V) Temperature Range Quantity Package Description Package Option Branding
ADM823RYRJZ-R7 2.63 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 M4L
ADM823ZYKSZ-R7 2.32 −40°C to +125°C 3k 5-Lead SC70 KS-5 M4L
ADM823YYKSZ-R7 2.19 −40°C to +125°C 3k 5-Lead SC70 KS-5 M4L
ADM824LYRJZ-REEL7 4.63 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 L9M
ADM824SYKSZ-REEL7 2.93 −40°C to +125°C 3k 5-Lead SC70 KS-5 M8G
ADM824RYKSZ-REEL7 2.63 −40°C to +125°C 3k 5-Lead SC70 KS-5 M8G
ADM824SYRJZ-REEL7 2.93 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 M8G
ADM825LYRJ-R7 4.63 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 N09
ADM825LYRJZ-R7 4.63 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 M8H
ADM825MYRJ-R7 4.38 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 N09
ADM825TYKSZ-R7 3.08 −40°C to +125°C 3k 5-Lead SC70 KS-5 M8H
ADM825TYRJ-R7 3.08 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 N09
ADM825TYRJZ-R7 3.08 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 M8H
ADM825SYKSZ-R7 2.93 −40°C to +125°C 3k 5-Lead SC70 KS-5 M8H
ADM825SYRJ-R7 2.93 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 N09
ADM825SYRJZ-R7 2.93 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 M8H
ADM825RYRJ-R7 2.63 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 N09
ADM825RYRJZ-R7 2.63 −40°C to +125°C 3k 5-Lead SOT-23 RJ-5 M8H
ADM825ZYKSZ-R7 2.32 −40°C to +125°C 3k 5-Lead SC70 KS-5 M8H
1
Z = RoHS Compliant Part.

©2004–2013 Analog Devices, Inc. All rights reserved. Trademarks and

registered trademarks are the property of their respective owners.
D04534-0-7/13(D)

Rev. D | Page 12 of 12