CMR Institute of Technology, Bangalore

Department(s): Electronics and Communication Engineering

Semester: 04 Section(s): C Lectures/week: 04
Subject: Computer Organization Code: BEC306C
and Architecture

Course Instructor(s): Prof. Sutapa Sarkar , Dr. Viji K., Dr. P. Susheelkumar S.

Course duration: August 2024 – December 2024

Module 1 CO Blooms
Sl. QUESTIONS Level
No.
1. Explain the operation of computer with neat block diagram. CO1 L1
or
With a neat diagram, discuss the operation concepts in a
computer highlighting the role of PC, MAR, MDR & IR.
Or
Explain basic operational concepts between the processor and memory
with neat block diagram.
2. Explain computer basic performance equation. CO1 L2
Or
Explain the various parameters affecting the performance of a computer
and also provide the basic performance equation
3. Explain following with an example CO1 L2
 Three- address instruction
 Two-address instruction
 One-address instruction
4. Explain single-BUS structure in computer. CO1 L2
5. Explain system software functions in computer. CO1 L2
6. What is operating system? Explain user program and OS routine sharing CO1 L2
the processor.
7. With a neat diagram, describe the functional units of a computer CO1 L2
8. Define byte-addressability. Explain little endian and big endian byte CO1 L2
address assignment with a neat diagram. Show how the number 34761395
is stored using these methods
9. Explain the IEEE standard used for single & double precision floating CO1 L2
point number representation with examples.
10. Perform the subtraction on the following pairs of numbers CO1 L3
using 5-bit signed 2’s complement format. Determine about
overflow in each case
i) +12 and +9 ii) -15 and -9 iii) +10 and -8
11. Define Addressing mode. Discuss the following modes with example: CO2 L2
i)Register ii)Direct iii)Indirect iv)Index.
12. Illustrate instruction and instruction sequencing using an example, CO2 L2
13. Represent 85.125 in IEEE floating point using single-precision. CO2 L2
14. What is system software? List functions of system software and explain CO2 L2
how the processor is shared between user program and OS routine.
15. Explain memory operations with example. CO2 L2
16. Explain condition codes with example. CO2 L2

Module 2

1. Discuss the following addressing modes with example: CO2 L2

i) Immediate
ii) Register
iii) Indirect
iv) Direct
v) Index
2. What are assembler directives? Answer any five assembler directives. CO2 L2
3. Define Stack, Explain push & pop operations on the stack CO2 L2
with neat diagrams and examples
4. Consider a register R1 to size 16 bits with initial data 5876d. With a neat CO2 L2
diagram, depict the output in each case after performing the following
operations i) LshiftL #2,R1 ii)AshiftR #1,R1 iii) RotateR #1,R1.
5. Consider a database of marks scored by students in 3 tests stored in CO2 L3
memory starting at address LIST. Each student record consists of a student
ID followed by marks in 3 tests. Assume each of them to be 4 bytes in
size. There are 50 students in the class & this value is stored at location
NUM
i) Sketch the memory map showing all the details
ii) Develop an ALP using indexed addressing mode to compute
the sum of scores by all the students in Test 2 and store the
results in location SUM. Write appropriate comments
6. Define subroutine. With a program segment illustrate parameter passing CO2 L2
using registers
7. Explain subroutine linkage with an example using linkage register CO2 L2
8. Explain the shift and rotate operations with examples. CO2 L2
9. Write a short note on the assembly and execution of programs. CO2 L1
10. With a neat diagram and program example, explain a single I/O task CO2 L2
between a processor, keyboard and display.
11. What is a subroutine? Illustrate subroutine function with parameter CO2 L2
passing by value and reference with suitable diagram.

Module 3

1. What is an interrupt? With an example illustrate the concept of interrupt. CO3 L2

2. Discuss in brief about interrupt hardware with a neat diagram. CO3 L2

3. Explain the concept of vectored interrupt. CO3 L2
4. Distinguish between memory-mapped I/O and standard I/O. CO3 L3
Develop a program segment to read a line of text from a keyboard and
display it.
5. Define interrupt. Point out and explain the various ways of enabling and CO3 L2
disabling interrupts.
6. Explain the operation of DMA with a neat diagram. CO3 L2
7. Illustrate the interrupt priority scheme with a neat diagram. CO3 L2
8. Show the possible register configuration in I/O interface, explain program- CO3 L2
controlled input/output.
9. Explain in detail the situations where a number of devices capable of CO3 L2
initiating interrupts are connected to a processor. How to resolve the
problems?
10. Explain the following methods of handling interrupts from multiple CO3 L2
devices. (i) Daisy chain method, (ii) Priority structure.
11. Explain the registers involved in the DMA interface, to illustrate DMA. CO3 L2
12. What is bus arbitration? Explain the centralized bus arbitration mechanism CO3 L2
with a neat diagram.
13. What is an interrupt? Explain about various implementation techniques of CO3 L2
interrupt.
14. Write a short note on (i) interrupt hardware and (ii) interrupt nesting. CO3 L2
15. Explain the concept of memory-mapped I/O with a neat diagram of the CO3 L2
I/O interface with a program example.

Module 4

1. With a neat diagram, explain the principles of working of magnetic disk CO4 L2
2. Explain the internal organization of 2M x 8 DRAM chip with a neat CO4 L2
diagram
Or
Draw and explain the internal organization of a 2M X 8 asynchronous
DRAM chip.
3. With a neat diagram , explain the organization of 1k X 1 memory chip CO4 L2
4. With a neat diagram , explain the organization of a 2M * 32 memory
module using 512K * 8 static memory chip.
5. Illustrate Internal structure of static memory CO4 L3
6. Discuss a single transistor dynamic memory cell. CO4 L2
7. What is cache memory? Explain direct mapping technique with a neat CO4 L2
diagram
8. Explain internal organization of 2M x 8 DRAM chip with neat diagram. CO4 L2
9. Discuss about four types of read only memory. CO4 L2
10. Briefly discuss the concept of virtual memory with a diagram. CO4 L2
Or
What is virtual memory? Explain its organization with neat diagram.
11. Explain internal organization of a 16 X 8 memory chip. CO4 L2
12. Explain a static RAM cell with a neat diagram. CO4 L2
13. Discuss the concept of cache memory. CO4 L2
14. Write a short note on ROM/ CO4 L2
15. Discuss about the use of cache memory in the processor system. CO4 L2
16. Explain about Direct Memory Mapping Technique in cache memory CO4 L2
17. What is mapping? Explain set associative cache mapping techniques. CO4 L2
18. Define ROM. List and explain various types of ROM. CO4 L2
19. List and explain four major functions of Disk Controller. CO4 L2
20. Explain how data is organized on Magnetic Tape. CO4 L2
 Module 5

1. Explain Single bus organization of the datapath inside a processor with CO5 L2
neat diagram
2. Develop the complete control sequence for the execution of instruction CO5 L3
Add (R3), R1
3. Describe multiple bus/three-bus organization of the datapath with a neat CO5 L2
diagram
4. Discuss Hardwired control unit organization with relevant diagram CO5 L2
5. Explain Single bus organization of the data path inside a processor with CO5 L2
neat diagram.
6. Write the decimal values 6, -3,16, -11, 25, -17, 50, -42 and -8 as signed 8 CO5 L1
bit numbers in the following binary formats. i) Sign and magnitude
ii)1’scomplement iii)2’s complement
7. Discuss micro programmed control unit design with relevant diagrams and CO5 L2
example.
Or
What is microprogrammed control? Explain its basic organization with
suitable diagram and example.
8. Discuss Hardwired control unit organization with relevant diagram. CO5 L2
9. Convert the following pairs of decimal numbers to 5-bit, signed 2’s CO5 L2
complement binary number and add them. State whether or not overflow
occurs in each case i) 6and10 ii)-14and12 iii)-6and7 iv)-4and-7 v)-11
and-12 vi) 8 and 11
10. Compare and contrast the following: CO5 L2
i)Hardwired control v/s ii) Microprogrammed control
11. Explain the process of fetching a data word from memory using respective CO5 L2
registers of a processor with neat diagram.
12. Expalin the control signal generation required for proper sequence of CO5 L2
instructions in the processor.
13. Draw and explain organization of the control unit to allow conditional CO5 L2
branching in the microprogram.
14. Write short notes on: CO5 L2
i. Hardwired control
ii. Micro programmed control
1. Discuss Pipelining and illustrate an example of pipeline Processing CO5 L2
2. Explain parallel processing with a diagram of processor with multiple CO5 L2
functional units.
3. With a diagram of SIMD array processor organization, explain SIMD CO5 L2
array processor.
4. Describe four segment CPU pipeline with a neat diagram. CO5 L2