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AEC LAB Manual For Students Experiment 1,2,3

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61 views16 pages

AEC LAB Manual For Students Experiment 1,2,3

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renukasutar1705
Copyright
© © All Rights Reserved
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DAYANANDA SAGAR UNIVERSITY

Devarahaggalahalli, Harohalli, Kanakapura Main Road,


Ramnanagara District – 562 112

Department of Electronics & Communication


Engineering

Analog Circuits
Lab Manual
(Course Code: 22EC2403)

Prepared By

Dr. Gayathri K M
Associate Professor
Vision
To create innovative Engineers and Entrepreneurs with technological excellence,
professional commitment and social responsibility for serving national and global needs.

Mission
Inculcate Academic Excellence through innovative teaching and learning processes and
espousing appropriate pedagogical parameters.

Reinforce the Students with desired technical aptitude, entrepreneurial and leadership skill
sets enabling them to face the challenges of globalization and technological sophistication.

Initiation with understanding the psychology of students, socio-cultural aspects of the


bidirectional learners, vitality of interdisciplinary approach, value addition through
interactive and collaborative learning. This is followed by systematic and sequential
implementation of syllabus upgradations on par with industrial revolution.

Program Educational Objectives (PEO) - UG

• Our Graduates will have in-depth knowledge of Electronics and Communication


Engineering with promising professional careers in private and public sector or higher
education.
• Our Graduates will be successful in solving Engineering Problems with innovative
ideas and acquire managerial skills for desired outcomes.
• Our Graduates will have the motivation for perennial learning and progress their
careers by inculcating interpersonal, leadership and social skills.

Program Specific Outcome (PSOs) - UG


• Apply the knowledge of Electronics and Communication to solve Engineering
Problems in various domains of Engineering Sciences.
• Adopting analytical skills and complementing the cross-cutting technology to
arrive at optimum solutions for Engineering Problems.
• Adaptability to dynamic work environment to address the societal needs with
ethical approach.
Program Outcomes (PO's)

• A graduate of the Electronics and Communication Engineering Program will


demonstrate:
• PO1 - Engineering knowledge: Apply the knowledge of mathematics, science,
engineering fundamentals, and an engineering specialization to the solution of
complex engineering problems.
• PO2 - Problem analysis: Identify, formulate, review research literature, and
analyze complex engineering problems reaching substantiated conclusions using
first principles of mathematics, natural sciences, and engineering sciences
• PO3 - Design/development of solutions: Design solutions for complex
engineering problems and design system components or processes that meet the
specified needs with appropriate consideration for the public health and safety, and
the cultural, societal, and environmental considerations.
• PO4 - Conduct investigations of complex problems: Use research-based
knowledge and research methods including design of experiments, analysis and
interpretation of data, and synthesis of the information to provide valid conclusions.
• PO5 - Modern tool usage: Create, select, and apply appropriate techniques,
resources, and modern engineering and IT tools including prediction and modeling
to complex engineering activities with an understanding of the limitations.
• PO6 - The engineer and society: Apply reasoning informed by the contextual
knowledge to assess societal, health, safety, legal and cultural issues and the
consequent responsibilities relevant to the professional engineering practice.
• PO7 - Environment and sustainability: Understand the impact of the professional
engineering solutions in societal and environmental contexts, and demonstrate the
knowledge of, and need for sustainable development.
• PO8 - Ethics: Apply ethical principles and commit to professional ethics and
responsibilities and norms of the engineering practice.
• PO9 - Individual and team work: Function effectively as an individual, and as a
member or leader in diverse teams, and in multidisciplinary settings.
• PO10 - Communication: Communicate effectively on complex engineering
activities with the engineering community and with society at large, such as, being
able to comprehend and write effective reports and design documentation, make
effective presentations, and give and receive clear instructions.
• PO11 - Life-long learning: Recognize the need for, and have the preparation and
ability to engage in independent and life-long learning in the broadest context of
technological change.
• PO12 - Project management and finance: Demonstrate knowledge and
understanding of the engineering and management principles and apply these to
one’s own work, as a member and leader in a team, to manage projects and in
multidisciplinary environments.
Course Outcome
• Demonstrate the applications of PN junction diode and zener diode
• Analyze small signal behavior of BJT and MOSFET amplifiers.
• Design of dc operational amplifiers and study of frequency response and compensation techniques
of op-amp
• Apply the knowledge of op-amp for various switching circuits, oscillators and signal generators.
• Evaluate the performance of OpAmp in linear, nonlinear circuits, data convertors and active
filters.

List of Laboratory/Practical Experiments activities to be conducted (if any) :


1.Testing of Diode clipping circuits.
2. Testing of Clamping circuits.
3. RC coupled Single stage BJT amplifier - Determination of the gain-frequency response,
input and output impedances.
4. MOSFET V-ICharacteristics
5. Design of Summing Amplifier, Integrator, Differentiator, Voltage Follower using Op-
Amp
6. Design of Comparators, Zero crossing detector, Schmitt Trigger using Op-Amp.
7. IC 555 timer as Multivibrator
8. Op-Amp as Instrumentation Amplifier.
9. Design of Active Filters - BPF, LPF, HPF for given frequency range
10. Design of Phase shift and Wein Bridge oscillator using Op-Amp.
11. 4- bit DAC using Op-Amp.
12. Open ended experiment- session 1
13. Open ended experiment- session 2
EXPERIMENT 1.

DIODE CLIPPING CIRCUITS

Aim: To construct and test different clipping circuits


Apparatus:
Bread board
Regulated dual power
supply Function generator
Resistors
Connecting
wires CRO
Diodes
Theory:
Clipping circuits are used to select for transmission that of a part of an arbitrary waveform which
lies above or below some reference voltage level. These circuits are also referred to as voltage
limiters, amplitude selectors or slicers. Limiting circuits usually fall into one of the following
configurations.
1. A series combination of diode resistor and reference power supply
2. A network consisting of several diodes, resistors and reference voltage
3. Two emitter coupled transistors operating as an over driven difference amplifier.
In the single diode clipper operation the signal is transmitted to the output without attenuation
during the diode OFF condition and the signal part is attenuated during ON condition. In this
case this diode may be series element or shunt element
The use of a diode as a series element has the disadvantage that when the diode is OFF and it
is intended that there be no transmission of fast signals or high frequency waveforms and may
be transmitted to the output through the diode capacitance
The use of the diode as a shunt element has the disadvantage that when the diode is OFF and it
is intended that there be transmission, the diode capacitance together with all other capacitance
in shunt with the output terminal will round sharp edges of the input waveforms and attenuate
high frequency signals.
Circuit Diagrams and Explanations:
There are two types of clipper circuits, the series and parallel diode clipping circuits.

SERIES DIODE CLIPPING CIRCUIT


In these type of circuits, the diode is connected between the input and output voltage terminals
POSITIVE CLIPPING

NEGATIVE CLIPPING

Parallel Clipping

DOUBLE SIDED CLIPPING

DESIGN:
Assume Forward Resistance of Diode, Rf =100 Ω;
Reverse Resistance of Diode, Rr =1MΩ
The series resistance is calculated such that 𝑅𝑅 = �𝑅𝑅𝑓𝑓 . 𝑅𝑅𝑟𝑟 = 10𝐾𝐾𝐾𝐾
Note: If you are using 1N4001 Rf and Rr may be assumed to be 30 Ω and 300K Ω respectively
and R=3.3 K Ω The series resistor is used to limit the current through the diode.
PROCEDURE:
1. Connections are made as per the above explained circuit diagrams – 12 circuits.
2. Apply a 10V peak to peak sinusoidal wave input with a suitable frequency of 1KHz
3. Adjust the reference DC voltage VR to some convenient values. Note the changes in the
Output due to variations in the reference voltage VR = 0V, 2V, etc.
4. Observe the output waveform in the CRO and Obtain the transfer characteristics of Clipper
circuit, by keeping CRO in X-Y mode.
5. Repeat the same procedure for other circuits and note down the waveforms against
the circuits.
RESULT:
Different combinations of clipping circuits are implemented and waveforms observed.
EXPERIMENT 2.
DIODE CLAMPING CIRCUITS
Aim: To construct and test different clamping circuits
Apparatus:
Bread board
Regulated dual power
supply Function generator
Resistors Connecting wires CRO
Diodes
Theory:
A clamping circuit adds a d.c component to the signal in such a way that it pushes the signal either on the positive
side or on the negative side. When the circuit pushes the signal on the positive side then the negative peak of the
signal falls on the zero level, this circuit is called a positive clamper. When the circuit pushes the signal on the
negative side, this is called a negative clamper circuit.

Circuit Diagram:
Negative Clamping

Positive Clamping

Procedure:
1. Connect the circuit as shown in the circuit diagram.
2. Note down the output on CRO.
3. Use the dc/ac switch of CRO to calculate the added dc level to the wave.
Observation Table:

Clamper

Input (V) Output (V)

Positive

Negative

Waveform:

RESULT:
Different combinations of clamping circuits are implemented and waveforms observed.

INFERENCE:
EXPERIMENT 3:

RC COUPLED SINGLE STAGE BJT AMPLIFIER

Aim: To design and measure the gain-frequency response, input impedance and output impedance of
CE R-C coupled Amplifier for the following specifications:
Given IC=1.5mA, VCC=15V, β = 100

Apparatus:
BC 107
Function generator
(1MHz) AC
millivoltmeter
Regulated power supply (0-30) V
Resistors- based on design
Capacitors
Bread board
Cathode Ray Oscilloscope Connecting wires

THEORY:
The CE configuration is widely used as a basic amplifier as it has both voltages and current
amplification. The resistors R1 and R2 provide required biasing conditions. The circuit is designed
such that the transistor operates in a linear active region and Vmax peak to peak output signals are
possible. Resistors R1 and R2 form a voltage divider network across the base of the transistor. The
function of this network is to provide necessary biasing in order to operate the transistor as an
amplifier, thus keeping the operating point in the active region.

For an amplifier the Q point is to be placed such that the load line is bisected; therefore the
Vce is set to Vcc/2. The emitter resistor Re is required to obtain the DC quiescent stability. However
the inclusion of Re in the circuit causes a decrease in amplification at higher frequency in order to
avoid such a condition it is bypassed by a capacitor so that it acts as short circuit for ac and
contributes stability for DC quiescent conditions. Hence a capacitor is connected in parallel with
emitter resistance.
The bypass capacitor (Emitter bypass capacitor) is used to short circuit the emitter resistance
and thus increase the gain at higher frequency. The coupling capacitors cause the fall off in the low
frequency response of the amplifier
The input impedance = VS-VI/R
The output impedance = Resistance at which voltage equal to Vo/2
Amplifier Operation
Once the Q-point is fixed through DC bias, an AC signal is applied at the input using coupling capacitor
C1. During the positive half cycle of the signal VBE increases leading to increased IB. Therefore IC
increases by times leading to decrease in the output voltage, VCE. Thus the CE amplifier produces an
amplified output with a phase reversal. The voltage Gain of the common emitter amplifier is equal to the
ratio of the change in the output voltage to the change in the input voltage. Thus, Av= Vout/Vin

The input (Zi) and output (Zo) impedances of the circuit can be computed for the case when the emitter
resistor RE is completely bypassed by the capacitor, CE:
Zi = R1 ||R2||βre and Zo = RC||r0
where re (26mV/IE) and ro are the emitter diode resistance and output dynamic resistance (can be
determined from output characteristics of the transistor). Usually ro_10 RC, thus the gain can be
approximated as Av = Vout/Vin = -βIB(Rc||r0) /βIBre = -Rc/re
The negative sign accounts for the phase reversal at the output.

Frequency Response Curve

The performance of an amplifier is characterized by its frequency response curve that shows output
amplitude (or, more often, voltage gain) plotted versus frequency (often in log scale). Typical plot of the
voltage gain of an amplifier versus frequency is shown in the figure below. The frequency response of an
amplifier can be divided into three frequency ranges. The frequency response begins with the lower
frequency range designated between 0 Hz and lower cutoff frequency. At lower cutoff frequency, fL , the
gain is equal to 0.707 Amid. Amid is a constant mid-band gain obtained from the mid-frequency range. Third,
the higher frequency range covers frequency between upper cutoff frequency and above. Similarly, at
higher cutoff frequency, fH, the gain is equal to 0.707 Amid. Beyond this the gain decreases with frequency
increases and dies off eventually.

The Lower Frequency Range


Since the impedance of coupling capacitors increases as frequency decreases, the voltage gain of a BJT
amplifier decreases as frequency decreases. At very low frequencies, the capacitive reactance of the
coupling capacitors may become large enough to drop some of the input voltage or output voltage. Also,
the emitter-bypass capacitor may become large enough so that it no longer shorts the emitter resistor to
ground.
The Higher Frequency Range
The capacitive reactance of a capacitor decreases as frequency increases. This can lead to problems for
amplifiers used for high-frequency amplification. The ultimate high cutoff frequency of an amplifier is
determined by the physical capacitances associated with every component and of the physical wiring.
Transistors have internal capacitances that shunt signal paths thus reducing the gain. The high cutoff
frequency is related to a shunt time constant formed by resistances and capacitances associated with a
node.

(a)Self-Bias Circuit (b) Thevenin’s equivalent circuit

Design:Can be done as per the steps shown below OR using the Thevenin's equivalent circuit and
the expression for stability factor.

𝑉𝑉𝑐𝑐𝑐𝑐 15
Let 𝑉𝑉𝐸𝐸 = = = 1.5 𝑉𝑉
10 10

𝑉𝑉𝐸𝐸 𝑉𝑉𝐸𝐸 1.5


𝑅𝑅𝐸𝐸 = ≅ = = 1𝑘𝑘 𝛺𝛺
𝐼𝐼𝐸𝐸 𝐼𝐼𝐶𝐶 1.5𝑚𝑚
Let RE=1 KΩ

To find R1 and R2
𝑉𝑉𝐵𝐵 = 𝑉𝑉𝐸𝐸 + 𝑉𝑉𝐵𝐵𝐵𝐵 = 2.2𝑉𝑉

𝐼𝐼𝐶𝐶 1.5 𝑚𝑚𝑚𝑚


𝐼𝐼𝐵𝐵 = = = 15𝜇𝜇𝜇𝜇
𝛽𝛽 100
𝑉𝑉𝐶𝐶𝐶𝐶 −𝑉𝑉𝐵𝐵 15−2.2
𝑅𝑅1 = = =85K
10 𝐼𝐼𝐵𝐵 10∗15𝜇𝜇
Use R1 = 100Kohms

𝑉𝑉𝐵𝐵 2.2
𝑅𝑅2 = = = 16.29𝐾𝐾𝐾𝐾
9 ∗ 𝐼𝐼𝐵𝐵 9 ∗ 15𝜇𝜇
Use R2 = 10Kohm

To find RC:
𝑉𝑉𝐶𝐶𝐶𝐶 = 𝑉𝑉𝐶𝐶𝐶𝐶 − 𝐼𝐼𝐶𝐶 𝑅𝑅𝐶𝐶 − 𝑉𝑉𝑅𝑅𝑅𝑅

(𝑉𝑉𝐶𝐶𝐶𝐶 −𝑉𝑉𝐶𝐶𝐶𝐶 −𝑉𝑉𝑅𝑅𝑅𝑅 )


𝑅𝑅𝑐𝑐 =
𝐼𝐼𝐶𝐶
(15 − 7.5 − 1.5)
𝑅𝑅𝑐𝑐 =
1.5 𝑚𝑚

= 4Kohm

Use RC = 4.7Kohm

To find C1: Zi = 1.1K ohm


1.1𝐾𝐾𝐾𝐾
𝑋𝑋𝐶𝐶1 ≤
10
1
𝑋𝑋𝑐𝑐1 = ≤ 0.11𝐾𝐾𝐾𝐾
2𝜋𝜋𝑓𝑓𝐿𝐿 𝐶𝐶1

1
𝑋𝑋𝑐𝑐1 = ≤ 0.11𝐾𝐾𝐾𝐾
2𝜋𝜋 ∗ 200 ∗ C1

C1 ≥ 7.2μF, so select C1 = 10μF

To find C2:
𝑍𝑍𝑜𝑜
𝑋𝑋𝑐𝑐2 ≤
10
Zo = RC = 4.7KΩ
1 𝑍𝑍𝑜𝑜 4.7 𝐾𝐾𝐾𝐾
𝑋𝑋𝑐𝑐2 = ≤ =
2𝜋𝜋𝜋𝜋𝐶𝐶2 10 10
C2 ≥ 112.87μF- Select C2 = 100μF

𝑅𝑅𝐸𝐸
To find CE : 𝑋𝑋𝐶𝐶𝐶𝐶 ≤
10

1 𝑅𝑅𝐸𝐸
≤ ⇒
2𝜋𝜋𝜋𝜋𝐶𝐶𝐸𝐸 10

10
𝐶𝐶𝐸𝐸 ≥
2𝜋𝜋𝜋𝜋 𝑅𝑅𝐸𝐸

10
𝐶𝐶𝐸𝐸 =
2𝜋𝜋 ∗ 100 ∗ 1𝐾𝐾

𝐶𝐶𝐸𝐸 ≥ 15.9 𝜇𝜇𝜇𝜇


Select CE = 10μF
CIRCUIT DIAGRAM:

Circuit 1 for measurement of input impedance:

Circuit 1 for measurement of output impedance:

PROCEDURE: -
Method 1 to find input and output impedance
1. The amplifier circuit is rigged up.
2. The input frequency is kept constant at 1 KHz, the voltage Vin less than Vinmax is applied.
For Input Impedance:
3. The DRB in zero ohms position is connected in series with the input as shown in the figure.
4. The DRB is increased until the output becomes half of the previous value with the same input
voltage as in step 2.
5. The DRB resistance will give the input impedance of the amplifier.
For Output Impedance:
6..The DRB in maximum position (say 100KΩ) is connected across the output terminals as shown in
the figure.
7. The DRB is reduced until the output becomes half of the previous value with the same input
voltage as in step 2.
8. The DRB resistance will give the output impedance of the amplifier.
Procedure to plot the frequency response
1. Measure and record all the values of resistance and capacitance of the transistor using a
multimeter. Configure the circuit as per the diagram.
2. Apply supply voltage to the circuit. Measure and record all the dc parameters listed inTable 1 in
absence of the ac signal.
3. Next, set the function generator in 20 Hz “Frequency” range. Also, set the “Attenuation”button at
40dB. Connect the output to the oscilloscope and adjust the “Amplitude” knob till you get a
sinusoidal input signal, Vi _ 100-200 mV peak-to-peak value. DO NOT CHANGE THIS
SETTING THROUGHOUT THE EXPERIMENT.
4. Now apply this input signal to the circuit you have made keeping the connection to the
oscilloscope intact. Feed the output of the circuit to the other channel of the oscilloscope.
***Take care to make all the ground pins common***
5. With input signal amplitude always constant, increase signal frequency slowly. Observe,measure
and record the output voltage, Vo. Scan the entire frequency in the range 20 Hz –2 MHz. You may
have to measure Vi and take the ratio Vo/Vi each time in case input fluctuation is too large to hold
constant.
6. Calculate the voltage gain for each frequency. Observe the inverted output.
7. Plot the frequency response curve, i.e. voltage gain in dB versus frequency on a semi-log graph-
sheet.
8. Estimate the mid-frequency gain and also the lower and higher cut off frequencies and hence the
bandwidth.
Frequency Response : Vin = 20mV

S.n Frequenc Output voltage Vo in volts Voltage Gain Voltage gain in


o y Av =Vo/Vi dB
20 log10 (Vo/Vin)
Expected Graph: Frequency response

METHOD 1 -Value of Input Impedance:


Value of Output Impedance:

RESULT: Designed CE self-bias amplifier by calculating the required values of R1, R2, RE,
Rc and measured input & output impedance and the frequency response
INFERENCE:

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