Inductive Position Sensor IC IPS2550 Datasheet

Description Features
The IPS2550 is a magnet-free, inductive position sensor IC that  Position sensing based on an inductive principle
can be used for high-speed absolute position sensing in auto-  Cost-effective; no magnet required
motive, industrial, medical, and consumer applications. The
 Immune to magnetic stray fields; no shielding required
IPS2550 uses the physical principle of eddy currents to detect the
position of a simple metallic target that is moving above a set of  Suitable for harsh environments and extreme temperatures
coils, consisting of one transmitter coil and two receiver coils.  Differential and single-ended sine and cosine outputs
The three coils are typically printed as copper traces on a printed  Automatic gain control with programmable limits
circuit board (PCB). They are arranged such that the transmitter  Nonvolatile user-configurable memory, programmable via I2C
coil induces a secondary voltage in the two receiver coils, which interface
depends on the position of the metallic target above the coils.  Programmable through analog or digital interface
A signal representative of the target’s position over the coils is  Single IC supports on-axis and off-axis rotation, linear motion,
obtained by demodulating and processing the secondary voltages and arc motion sensing
from the receiver coils. The target can be any kind of metal, such  Adaptable to any full-scale angle range through coil design
as aluminum, steel, or a PCB with a printed copper layer.
 High accuracy: ≤ 0.1% full scale (with ideal coils)
The IPS2550 provides two independent output interfaces:  Rotation sensing up to a 360º angle range
 A high-speed analog interface providing position information  Over-voltage and reverse-polarity protection:
in the form of demodulated analog sine/cosine raw data ±18V on both supply and output pins
 An I2C digital interface for diagnostics and programming  Facilitates redundant design requirements
The IPS2550 operates at rotation speeds up to 600000 RPM  Suitable for implementation in safety-related systems
(relating to coil designs using 1 period per turn). An ultra-low propa- compliant to ISO26262 up to ASIL-C on a single IC and
gation delay of 4µs provides high dynamic control for fast spinning ASIL-D on dual ICs
motors.
 Fast diagnostic alarm via interrupt pin
The IPS2550 has been developed according to ISO26262 for  Wide operation temperature: -40 C up to +160°C
implementation in safety-relevant systems up to ASIL C for a single
 Supply voltage programmable for 3.3V±10% or 5.0V±10%
IC and ASIL D for dual, redundant ICs. It is available in a 16-pin
exposed pad TSSOP package and qualified for automotive use  Small 16-TSSOP exposed pad package (4.4mm 5.0mm)
at -40°C to +160°C ambient temperature.
Application Circuit Example
Available Support
Renesas provides reference designs that demonstrate IPS2550
rotary position sensing applications. 1 16
ADR_IRQN SDA

2 15
RX1 SCL
Typical Applications Rx
(sin) 3
RX2 14
 Rotor position detection for brushless DC motors; adaptable SIN_SCL
IPS2550

4
to any pole pair count RX3 SINN
13
Rx
 Replacement of resolvers (cos) 5 COS_SDA
12
RX4
11
6 COSN
TX1
Tx CT 10 3.3V / 5V
7 VDD
TX2
CVDD
8 9
VDDA GND
CVA

© 2022 Renesas Electronics Corporation 1 March 11, 2022

 IPS2550 Datasheet

Contents
1. Pin Assignments ...........................................................................................................................................................................................5
2. Pin Descriptions............................................................................................................................................................................................5
3. Receiver Coil Connection Options ................................................................................................................................................................7
4. Absolute Maximum Ratings ..........................................................................................................................................................................9
5. Operating Conditions ....................................................................................................................................................................................9
6. Ambient Temperature Range .....................................................................................................................................................................11
7. Electrical Characteristics ............................................................................................................................................................................12
8. Circuit Description ......................................................................................................................................................................................20
8.1 Overview............................................................................................................................................................................................20
9. Sampling Rate, Resolution, Output Data Rate, and Propagation Delay .....................................................................................................22
10. Output Modes .............................................................................................................................................................................................23
11. Operating at High Speed ............................................................................................................................................................................23
12. Digital Diagnostics and Programming Interfaces ........................................................................................................................................24
13. Block Diagram ............................................................................................................................................................................................25
14. Detailed Block Descriptions ........................................................................................................................................................................26
14.1 Power Management ..........................................................................................................................................................................26
14.2 LC Oscillator ......................................................................................................................................................................................26
14.3 Analog Signal Path ............................................................................................................................................................................26
14.3.1 Rx Coil Diagnostics ............................................................................................................................................................26
14.3.2 Receiver Signal Low-Pass Filter .........................................................................................................................................26
14.3.3 Offset and Gain Matching ...................................................................................................................................................26
14.3.4 Demodulation .....................................................................................................................................................................26
14.3.5 Automatic Gain Control (AGC) ...........................................................................................................................................27
14.4 Signal Channel Swapping .................................................................................................................................................................27
14.5 Output Buffers ...................................................................................................................................................................................27
14.6 Temperature Sensor..........................................................................................................................................................................27
15. ECU Connection Options ...........................................................................................................................................................................28
15.1 Embedded vs. Remote Connection ...................................................................................................................................................28
15.2 Supply Voltage Operation: 3.3V or 5V ...............................................................................................................................................30
15.3 I2C Interface ......................................................................................................................................................................................30
15.3.1 I2C with Address Selection (Default) ..................................................................................................................................30
15.3.2 Avoiding a Parasitic Path through ADR_IRQN Pin during Loss of GND or Loss of VDD ...................................................31
15.3.3 I2C Interface with Interrupt (Programming Option) .............................................................................................................32
16. Over-Voltage Protection .............................................................................................................................................................................33
16.1 I/O Protection.....................................................................................................................................................................................33
17. Programming Options.................................................................................................................................................................................33
17.1 Programming the Device to Use the Other Supply Voltage Option ...................................................................................................35
17.2 Lock Feature (Cyber Security) ...........................................................................................................................................................35

© 2022 Renesas Electronics Corporation 2 March 11, 2022

 IPS2550 Datasheet

17.3 Programming Options........................................................................................................................................................................35

18. Functional Safety and Diagnostics .............................................................................................................................................................36
18.1 Functional Safety ASIL and ISO Compliance ....................................................................................................................................36
18.2 Diagnostic Mode Indication through Analog Outputs.........................................................................................................................36
18.2.1 Shorted and Broken Wire Detection ...................................................................................................................................37
18.3 Diagnostic Features...........................................................................................................................................................................41
18.4 Internal Register and Memory Errors ................................................................................................................................................42
18.5 LC Oscillator Frequency Out of Range ..............................................................................................................................................42
19. Redundant Connections .............................................................................................................................................................................43
20. Application Examples .................................................................................................................................................................................44
21. Electromagnetic Compatibility (EMC) .........................................................................................................................................................45
22. 16-TSSOP Package Outline Drawings .......................................................................................................................................................45
23. Marking Diagram ........................................................................................................................................................................................46
23.1 Marking of Production Parts ..............................................................................................................................................................46
24. Ordering Information...................................................................................................................................................................................46
25. Revision History..........................................................................................................................................................................................46

List of Figures
Figure 1. Pin Assignments for 16-TSSOP Package – Top View ........................................................................................................................5
Figure 2. LC Oscillator Connection in ASIL-C Configuration with Split TX Capacitors .......................................................................................7
Figure 3. LC Oscillator Connection in Compatibility Mode Configuration with Split TX Capacitors ....................................................................8
Figure 4. Maximum Supply Current vs Ambient Temperature, with and without Ground Plane .......................................................................11
Figure 5. Parallel Resonator Circuit ..................................................................................................................................................................13
Figure 6. Response of the IPS2550..................................................................................................................................................................20
Figure 7. Coil Design for a Linear Motion Sensor .............................................................................................................................................21
Figure 8. Coil Design for a 360° Rotary Sensor ...............................................................................................................................................22
Figure 9. Output Signals: Sine-Cosine Analog Differential Mode .....................................................................................................................23
Figure 10. Output Signals: Sine-Cosine Analog Single-Ended Mode .................................................................................................................23
Figure 11. Block Diagram ...................................................................................................................................................................................25
Figure 12. Embedded Application: Sensor and MCU are on the same PCB ......................................................................................................28
Figure 13. Remote Application with Pull-Up Resistors for Diagnosis .................................................................................................................29
Figure 14. Remote Application with Pull-Down Resistors for Diagnosis .............................................................................................................29
Figure 15. I2C Address Select Bits ......................................................................................................................................................................31
Figure 16. I2C Interface with Address Select .....................................................................................................................................................31
Figure 17. I2C Interface with Address Selection by Hardware Pin Strapping Through ADR_IRQN Pin .............................................................32
Figure 18. I2C Interface Configuration with Interrupt on a Single Slave .............................................................................................................32
Figure 19. I2C Interface Configuration with Multi-slave Interrupt ........................................................................................................................32
Figure 20. Programming the IPS2550 over the I2C Interface .............................................................................................................................33
Figure 21. End of Line Programming of the IPS2550 Through the Analog Outputs ...........................................................................................34
Figure 22. Operating Range and Diagnostic Range ...........................................................................................................................................36

© 2022 Renesas Electronics Corporation 3 March 11, 2022

 IPS2550 Datasheet

Figure 23. Selection of Diagnostic Range ..........................................................................................................................................................37

Figure 24. Parasitic currents with Broken VDD or Broken GND lines................................................................................................................39
Figure 25. Parasitic currents through ADR_IRQN pin .......................................................................................................................................40
Figure 26. Application Diagram: Dual Redundant Sensors, Dual Supply ...........................................................................................................43
Figure 27. Coil Design and Signal Output for a 360° Rotary Sensor..................................................................................................................44
Figure 28. Coil Design and Signal Output for a 2  180° Rotary Sensor ...........................................................................................................44
Figure 29. Coil Design and Signal Output for a 3  120° Rotary Sensor ...........................................................................................................45
Figure 30. Coil Design and Signal Output for a 4  90° Rotary Sensor .............................................................................................................45

List of Tables
Table 1. Pin Descriptions...................................................................................................................................................................................5
Table 2. Output Configuration ...........................................................................................................................................................................6
Table 3. Digital Interface Configuration .............................................................................................................................................................7
Table 4. Absolute Maximum Ratings .................................................................................................................................................................9
Table 5. Operating Conditions ...........................................................................................................................................................................9
Table 6. IPS2550 Electrical Characteristics, 3.3V Mode .................................................................................................................................12
Table 7. IPS2550 Electrical Characteristics, 5.0V Mode .................................................................................................................................12
Table 8. LC Oscillator Specifications ...............................................................................................................................................................13
Table 9. Coil Receiver Front-End Specifications .............................................................................................................................................14
Table 10. Automatic Gain Control (AGC) ..........................................................................................................................................................15
Table 11. Diagnostic Checks .............................................................................................................................................................................16
Table 12. Back-End Specification, Analog Outputs SIN_SCL, SINN, COS_SDA, COSN .................................................................................16
Table 13. Digital I2C Control Interface, Pins SDA and SCL ..............................................................................................................................17
Table 14. I2C Interface via Analog Outputs .......................................................................................................................................................18
Table 15. Digital I2C Control Interface, Pin ADR_IRQN ....................................................................................................................................19
Table 16. Nonvolatile Memory ...........................................................................................................................................................................19
Table 17. Electrostatic Discharges (ESD) .........................................................................................................................................................19
Table 18. Propagation Delay .............................................................................................................................................................................22
Table 19. Output Modes and Maximum Speed .................................................................................................................................................24
Table 20. Internal Chip Temperature Sensor Characteristics............................................................................................................................27
Table 21. I2C Address Selection Options in NVM ..............................................................................................................................................30
Table 22. Programming Options Overview ........................................................................................................................................................35
Table 23. Detection of Shorts between Wires ...................................................................................................................................................38
Table 24. Diagnostic Levels with Pull-Up Resistors ..........................................................................................................................................40
Table 25. Diagnostic Levels with Pull-Down Resistors ......................................................................................................................................40
Table 26. Diagnostic Features...........................................................................................................................................................................41

© 2022 Renesas Electronics Corporation 4 March 11, 2022

 IPS2550 Datasheet

1. Pin Assignments
The IPS2550 is available in a 16-TSSOP 4.4mm  5.0mm RoHS package with exposed pad RoHS package. It is qualified for an ambient
temperature of -40°C to +160°C.

Figure 1. Pin Assignments for 16-TSSOP Package – Top View

1 ADR_IRQN SDA 16

2 RX1 SCL 15

3 RX2 SIN_SCL 14
IPS2550

4 RX3 SINN 13

5 RX4 COS_SDA 12

6 TX1 COSN 11

7 TX2 VDD 10

8 VDDA GND 9

2. Pin Descriptions
Table 1. Pin Descriptions

Pin Number Name Type Description

1 Address-select digital input for I2C interface address selection; push/pull interrupt output
Digital (programmable options, see Table 3).
ADR_IRQN
Input/Output When used as I2C address-select input, use a pull-up or pull-down resistor ≥4k7 to select the
I2C address.
2 ASIL-C Configuration Mode (default) : receiver Compatibility Mode: receiver coil 1
RX1 coil 1 (Sine, see Figure 2) (Sine, see Figure 3)
3 ASIL-C Configuration Mode (default): receiver Compatibility Mode: receiver coil 1
RX2 coil 2 (Cosine, see Figure 2) (inverted sine, see Figure 3)
Analog Input
4 ASIL-C Configuration Mode (default): receiver Compatibility Mode: receiver coil 2
RX3 coil 1 (inverted sine, see Figure 2) (Cosine, see Figure 3)
5 ASIL-C Configuration Mode (default): receiver Compatibility Mode: receiver coil 2
RX4 coil 2 (inverted cosine, see Figure 2) (inverted cosine, see Figure 3)
6 TX1 Connect the transmitter coil between the TX1 and TX2 pins. The resonant frequency is adjusted
Analog with capacitors CTx1 from TX1 to GND and CTx2 from TX2 to GND as shown in Figure 2 and
7 Input/Output Figure 3. CTx1 and CTx2 must have the same capacitance value. They can be calculated with
TX2
Equation 3.
8 VDDA Supply Internal analog voltage supply. Connect a capacitor CVA (see Table 5) to the GND pin.
9 GND Supply Common ground connection.

© 2022 Renesas Electronics Corporation 5 March 11, 2022

 IPS2550 Datasheet

Pin Number Name Type Description

10 VDD Supply External supply voltage. Connect two parallel capacitors CVD (see Table 5) to the GND pin.
11 COSN Analog Output Buffered analog output; see Table 2.
Analog Output, Buffered analog output; digital I2C data input/output during Programming Mode; see Table 2.
12 COS_SDA
Digital I/O
13 SINN Analog Output Buffered analog output; see Table 2.
Analog Output, Buffered analog output; digital I2C clock input during Programming Mode; see Table 2.
14 SIN_SCL
Digital Input
Clock input for digital programming and diagnostic I2C interface.
15 SCL Digital Input Connect a pull-up resistor for normal operation, see Table 13.
If not used, connect SCL to GND.
Open drain bi-directional data I/O line for digital programming and diagnostic I2C interface.
Digital
16 SDA Connect a pull-up resistor for normal operation, see Table 13.
Input/Output
If not used, terminate using a pull-up or pull-down resistor ≥4.7kΩ.
Heat sink only. It can be connected with short, direct connection to GND (pin #9), or left
Exposed Pad Heat sink unconnected. Refer to Figure 4 for details.
Do not connect the exposed pad to any other potential than GND.

Table 2. Output Configuration

Pin (See Figure 1) Output Depending on Mode Diagnostic State, Program Options
Analog Analog Single- Disabled Mode1 Mode2 Mode3
Pin Number Pin Name Programming
Differential Ended
14 SIN_SCL SIN SIN SCL SIN SIN Hi-Z Hi-Z
13 SINN SINN REF Not used SINN Hi-Z SINN Hi-Z
12 COS_SDA COS COS SDA COS COS Hi-Z Hi-Z
11 COSN COSN REF Not used COSN Hi-Z COSN Hi-Z

[a] Abbreviations used in Table 2:

SIN: Sine channel output, bias voltage = VDD/2
SIN: Inverted sine channel output, bias voltage = VDD/2
COS: Cosine channel output, bias voltage = VDD/2
COSN: Inverted cosine channel output, bias voltage = VDD/2
REF: DC output bias voltage, VDD/2
SCL: Serial clock input for I2C programming
SDA: Serial bi-directional data I/O port for I2C programming
Hi-Z: Output is high ohmic; diagnostics are indicated by external pull-up or pull-down resistors

© 2022 Renesas Electronics Corporation 6 March 11, 2022

 IPS2550 Datasheet

Table 3. Digital Interface Configuration

Pin (See Figure 1) Input/Output Depending on Interface Mode [a]

TSSOP Pin Number Pin Name I2C with Address Select I2C with Interrupt
16 SDA SDA
15 SCL SCL
1 ADR_IRQN ADR IRQN

[a] Abbreviations used in Table 3:

ADR_IRQN: Combined address select input and interrupt output
ADR: Hardware address-select input for I2C Mode (two address options, depending on digital input level at the ADR_IRQN pin)
SDA: Serial bi-directional data I/O port for I2C Modes`
SCL: Serial clock input for I2C Modes
IRQN: Interrupt output

3. Receiver Coil Connection Options

The IPS2550 can be configured in two user-programmable modes related to the connection of the receiver coils:
 The ASIL-C Configuration Mode (default) improves the failure detection rate of the chip because it avoids a short circuit of any receiver
coil by a short between two neighboring pins.
 The Compatibility Mode (programming option) provides pin-to-pin compatibility with the IPS2200 inductive sensor IC.

Figure 2. LC Oscillator Connection in ASIL-C Configuration with Split TX Capacitors

VDD VDD VDD

RADR RSDA RSCL

1 16
ADR_IRQN SDA
2 15
RX1 SCL
Rx
14
(sin) 3 SIN_SCL
RX2 COut1
13
4 SINN
Configuration in ASIL-C mode with split capacitors CTx1 = CTx2,
IPS2550

RX3
COut2
Rx Tx coil series resistors RTx1 = RTx2 and Output capacitors
5 12
(cos) COS_SDA
RX4 COut1 = COut2 = COut3 = COut4 for improved EMC performance.
COut3
11
RTx1 6 TX1 COSN
Tx COut4
VDD 3.3V / 5V
RTx2 7 TX2 10
CTx1 CTx2 GND CVDD
8 9
VDDA
CVA

© 2022 Renesas Electronics Corporation 7 March 11, 2022

 IPS2550 Datasheet

Figure 3. LC Oscillator Connection in Compatibility Mode Configuration with Split TX Capacitors

VDD VDD VDD

RADR RSDA RSCL

1 16
ADR_IRQN SDA
2 15
RX1 SCL
Rx
14
(sin) 3 SIN_SCL
RX2 COut1
Configuration in compatibility mode with split capacitors CTx1 =
13
4 SINN CTx2, Tx coil series resistors RTx1 = RTx2 and Output capacitors
IPS2550
RX3
COut2
Rx COut1 = COut2 = COut3 = COut4 for improved EMC performance.
5 12
(cos) COS_SDA
RX4
COut3
11
RTx1 6 TX1 COSN
Tx COut4
VDD 3.3V / 5V
RTx2 7 TX2 10
CTx1 CTx2 GND CVDD
8 9
VDDA
CVA

The oscillator frequency is determined by the values of coil L and capacitors CTx1 and CTx2 as the following:
Oscillator frequency: 1
𝑓𝑇𝑋 =
𝐿 × 𝐶𝑇𝑥1 × 𝐶𝑇𝑥2 Equation 1
2𝜋√
𝐶𝑇𝑥1 + 𝐶𝑇𝑥2

For CTx1 = CTx2 : 1

𝑓𝑇𝑋 =
𝐶𝑇𝑥1 Equation 2
2𝜋√𝐿
2

2
CTx1 = CTx2 =
𝐿(2𝜋𝑓𝑇𝑋 )² Equation 3
Where:
fTX = Oscillator frequency in MHz
L = Coil impedance in µHenry
CTx1, CTx2 = Capacitance in µFarad
Note: RTx1 = RTx2 = 22Ohm (typical)

© 2022 Renesas Electronics Corporation 8 March 11, 2022

 IPS2550 Datasheet

4. Absolute Maximum Ratings

The absolute maximum ratings are stress ratings only. Stresses greater than those listed below can cause permanent damage to the device.
Functional operation of the IPS2550 at the absolute maximum ratings is not implied. Exposure to absolute maximum rating conditions could
affect device reliability.
All voltage levels refer to GND.

Table 4. Absolute Maximum Ratings

Symbol Parameter Conditions Minimum Maximum Units

VVDDmax External supply voltage Continuous -18 18 V
SIN_SCL, SINN,COS_SDA and COSN
VOUT Continuous -18 18 V
output voltage
VRX1 Receiver coil pin: RX1
VRX2 Receiver coil pin: RX2
-12 12 V
VRX3 Receiver coil pin: RX3
VRX4 Receiver coil pin: RX4
VDIGITAL Digital IO pins: SCL, SDA, ADR_IRQN -0.3 VDD+0.3 V
VTx1_2 Transmitter pins, TX1, TX2 -0.3 5.6 V
VVDDAmax VDDA is internally regulated with
VDDA internal LDO output external capacitor to GND. No other Refer to VVDDA,Table 5 V
connection to external voltages.

5. Operating Conditions
Conditions: VDD = 5V ±10%, TAMB = -40°C to +160°C, unless otherwise noted.

Table 5. Operating Conditions

Note: See important notes at the end of the table.

Symbol Parameter Conditions Minimum Typical Maximum Units

TAMB_TSSOP Ambient temperature 16-TSSOP package with exposed pad -40 1601 ºC
TJ Junction temperature -40 165 ºC
Unmounted units must be limited to 10
TSTOR Storage temperature -55 160 ºC
hours at temperatures above 125°C
Thermal resistance junction to Copper ground planes under exposed
ambient: 16-TSSOP package pad on 4 layer PCB, 3x3 thermal vias 35.48
with exposed pad. between layers.
RTHJA_TSSOP Velocity = 0m/s K/W
Copper ground planes under exposed
JEDEC MO-153. pad on 2 layer PCB, 3x3 thermal vias 39.96
between layers.

1 Ambient temperature above 155°C limited to 120 hours over lifetime.

© 2022 Renesas Electronics Corporation 9 March 11, 2022

 IPS2550 Datasheet

Symbol Parameter Conditions Minimum Typical Maximum Units

Without PCB ground plane under
61.26
exposed pad.
Thermal resistance junction to
RTHJC_TSSOP Junction to bottom of package 6.42 K/W
case
Power-on reset (POR) to valid output
tpup Start-up time 5 ms
signal
Input rotational velocity, Electrical revolutions per minute 600 000 rpm
VEL Electrical speed; sine or cosine
periods Input frequency 10 kHz

Power-on reset (POR), high The device is activated when VDDA 2.49
VVDDA_TH_H V
threshold increases above this threshold
The device is deactivated when VDDA
VVDDA_TH_L: Power-on reset, low threshold 2.08 V
decreases below this threshold
VDDAPOR_HYST Power-on reset hysteresis At VDDA pins 110 mV
VDDA must be connected to a capacitor
VDDA short circuit current
IVDDA CVA. No other external load allowed at 40 85 mA
limitation
this pin.
Without coils, no load 5 12 mA

ICC Current consumption Programmable transmitter coil drive

current (depending on inductance of the For values, refer to Table 8. mA
transmitter coil)
Capacitor from VDDA pin to
CVA 100 nF
GND
CVDD Capacitor from VDD pin to GND Nominal value 70 nF
Accuracy, 3.3V Mode, VDD=
% FS
INLuv3V under-voltage alarm level to ±0.2 [a]
3.0V
Accuracy, 3.3V Mode,
INL3V ±0.1 % FS
VDD= 3.0 to 3.6V With ideal sinusoidal input signals,
Accuracy, 3.3V Mode, VDD= 150mVpk-pk
INLov3V ±0.2 % FS
3.6V to over-voltage alarm level Differential output mode,
Accuracy, 5V Mode, VDD= Transmitter frequency = 3.5MHz
INLuv5V under-voltage alarm level to AGC = on ±0.2 % FS
4.5V Channel swapping = 0ff
Accuracy, 5.0V Mode,
INL5V ±0.1 % FS
VDD= 4.5 to 5.5V
Accuracy, 5.0V Mode, VDD=
INLov5V ±0.2 % FS
5.5V to over-voltage alarm level

[a] % FS = percent of full scale = accuracy in % per period, where 100% is the angle range of one electrical period.
For rotary multi-period designs, one electrical period = 360° (one full turn) divided by the number of periods per turn, see examples in section 20.

© 2022 Renesas Electronics Corporation 10 March 11, 2022

 IPS2550 Datasheet

6. Ambient Temperature Range

The minimum ambient temperature for the IPS2550 is -40°C.
The maximum ambient temperature depends on the following factors:
 The maximum junction temperature, see Table 5 for details.
 The supply current. The total power consumption of the chip depends on the supply voltage, the internal supply current, and the user
programmable transmitter coil current. The programmable transmitter coil current is shown in Table 8 and the internal circuit current
consumption is shown in Table 5.
 The minimum usable coil current in a given application. Typically, smaller coils require more transmitter coil current and larger coils can
operate with less coil current. Typical coil designs in the range of 25mm to 30mm coil diameter can require approximately 3mA to 5mA
coil current, respectively around 12mA to 14mA supply current. The IPS2550 can drive as high as 20mA of transmitter coil current.
 The temperature range of the supplier part qualification. The IPS2550 is qualified for -40°C to +160°C ambient temperature.
 The thermal resistance of the package in combination with a copper ground plane area on the PCB.
The maximum supply current at VDD = 5.5V versus the ambient temperature with different PCB layers and no airflow cooling is shown in the
circled areas of Figure 4. For example, the maximum supply current (internal current + transmitter coil current) at Tambient = 160°C for a PCB
with copper ground plane under the exposed pad is 25.6mA for a 4-layer PCB and 22.8mA for a 2-layer PCB. The ground plane is assumed
having minimum the same rectangular area as the exposed pad and copied to all layers with a 3x3 array of interconnect vias between each
layer.
Note: ignore the small half circles extended at each short side of the exposed pad on the package drawing at the end of this document, they do
not need to be copied to the PCB ground plane.
Without copper ground plane(s) under the exposed pad, the maximum current consumption at 160°C ambient temperature is 14.8mA. If the
maximum ambient temperature is less than 155°C and the maximum current consumption is below 29.7mA, no PCB ground planes are needed.
If the maximum supply current is below 18mA, no PCB ground planes are needed up to an ambient temperature of 159°C

Figure 4. Maximum Supply Current vs Ambient Temperature, with and without Ground Plane

© 2022 Renesas Electronics Corporation 11 March 11, 2022

 IPS2550 Datasheet

7. Electrical Characteristics
The following electrical specifications are valid for the operating conditions as specified in Table 5: (TAMB is -40°C to 160°C).

Table 6. IPS2550 Electrical Characteristics, 3.3V Mode

Symbol Parameter Conditions Minimum Typical Maximum Units

VDD3 Supply voltage 3.0 3.3 3.6 V
An over-voltage alarm is created if
V3OVR Over-voltage detection, VDD rising 3.7 3.86 4.1 V
VDD rises above this limit
An over-voltage alarm is cleared if
V3OVF Over-voltage detection, VDD falling 3.65 3.79 4.0 V
VDD falls below this limit
V3OVH Over-voltage detection hysteresis 70 mV
An under-voltage alarm is created if
V3UVR Under-voltage detection, VDD falling 2.65 2.75 2.90 V
VDD falls below this limit
An under-voltage alarm is cleared if
V3UVF Under-voltage detection, VDD rising 2.70 2.85 3.00 V
VDD rises above this limit
V3UVH Under-voltage detection hysteresis 100 mV
Internally regulated. Connect
VDDA3 Analog supply voltage capacitor CVA = 100nF between 2.85 3.0 3.1 V
VDDA and GND (see Table 5)
An under-voltage alarm is created if
V3VDDAUVF VDDA under-voltage detection 2.59 2.80 V
VDDA falls below these limits.
An under-voltage alarm is cleared if
V3VDDAUVRr VDDA under-voltage detection 2.63 2.85 V
VDDA rises above these limits.
VDDA Under-voltage detection
V3VDDAUVH 45 mV
hysteresis

Table 7. IPS2550 Electrical Characteristics, 5.0V Mode

Symbol Parameter Conditions Minimum Typical Maximum Units

VDD5 Supply voltage 4.5 5.0 5.5 V
An over-voltage alarm is created if
V5OVR Over-voltage detection, VDD rising 5.60 5.84 6.10 V
VDD rises above this limit
An over-voltage alarm is cleared if
V5OVF Over-voltage detection, VDD falling 5.55 5.76 6.05 V
VDD falls below this limit
V5OVH Over-voltage detection hysteresis 80 mV
An under-voltage alarm is created
V5UVR Under-voltage detection, VDD falling 4.10 4.33 4.45 V
if VDD falls below this limit
An under-voltage alarm is cleared
V5UVF Under-voltage detection, VDD rising 4.20 4.40 4.49 V
if VDD rises above this limit
V5UVH Under-voltage detection hysteresis 70 mV

© 2022 Renesas Electronics Corporation 12 March 11, 2022

 IPS2550 Datasheet

Symbol Parameter Conditions Minimum Typical Maximum Units

Internally regulated. Connect a
VDDA5 Analog supply voltage capacitor CVA = 100nF between 3.9 4.0 4.1 V
VDDA and GND (see Table 5)
A VDDA under-voltage alarm is
V5VDDAUVF VDDA under-voltage detection triggered when VDDA falls below 3.50 3.79 V
these limits.
A VDDA under-voltage alarm is
V5VDDAUVRr VDDA under-voltage detection cleared if VDDA rises above these 3.60 3.87 V
limits.
VDDA Under-voltage detection
V5VDDAUVH 65 mV
hysteresis

Table 8. LC Oscillator Specifications

Symbol Parameter Conditions Minimum Typical Maximum Units

Equivalent parallel resistance
RP,eq See Equation 4 250 Ω
of the LC resonant circuit

LC oscillator frequency is determined

fLC Excitation frequency 2.0 5.6 MHz
by external components L and C.
Peak-to-peak voltage; pins TX1 vs.
VTX_P LC oscillator amplitude TX2; all modes. Adjustable by coil 6 11 Vpp
current.
Equivalent DC current.
Programmable transmitter
ILC Programmable, depending on 0 3 20 mA
coil drive current
transmitter coil inductance.
RTx1,RTx2 TX Series resistor For reduced EMC emission 22 Ohm

Figure 5. Parallel Resonator Circuit

L
C C V L
V RPeq L RPeq
V
RS
CTX1 CTX2

© 2022 Renesas Electronics Corporation 13 March 11, 2022

 IPS2550 Datasheet

The equivalent parallel resistance RPeq of the LC oscillator can be calculated using Equation 4. It defines the minimum loss resistance that the
oscillator can drive for safe operation.
Note: for improved EMC performance, it is recommended to split capacitor C into two equal capacitors with double capacitance, connected to
GND: CTX1 = CTX2 = 2C. See also Figure 2 and Figure 3 for further details.

1 L
RPeq = × Equation 4
RS C
Where
RPeq Equivalent parallel resistance of the LC oscillator.
RS Serial resistance of the transmitter coil at the transmitter frequency.
L Coil reactance at the resonant frequency.
C Capacitance of the parallel capacitor CT.

Note that the capacitor losses are not included in the equation, since in case of C0G or NP0 ceramics they can be neglected.

Table 9. Coil Receiver Front-End Specifications

Symbol Parameter Conditions Minimum Typical Maximum Units

Input signal full range to maintain AGC
target levels: 3.0V p-p AGC target, gain 25 1500
boost bit disabled
Input signal full range to maintain AGC
target levels: 3.0V p-p AGC target, gain 13 780
boost bit enabled
VRX Receiver coil amplitude. mVpp
Input signal full range to maintain AGC
target levels: 1.8V p-p AGC target, gain 15 920
boost bit disabled
Input signal full range to maintain AGC
target levels: 1.8V p-p AGC target, gain 8 470
boost bit enabled
Maximum amplitude Programmable individual gain 13 20 %
ΑIN_mm mismatch correction mismatch correction of Receiver coil
Amplitude mismatch step size signals (SIN and COS) 0.1 0.15 %
Maximum positive input offset
AIN_OFFSET_POS% +0.17 +0.23 %
correction.
Maximum negative input Differential input offsets of sine or
AIN_OFFSET_NEG% -0.25 -0.17 %
offset correction. cosine signal, percentage of transmitter
coil amplitude.
Input offset correction range
AIN_OFFSET_mV at typical oscillator amplitude -7.5 7.5 mV
(see Table 8).

© 2022 Renesas Electronics Corporation 14 March 11, 2022

 IPS2550 Datasheet

Symbol Parameter Conditions Minimum Typical Maximum Units

OFFCORR_RES Input offset correction step
0.0015 %
size

Coil receiver DC input Common mode to GND 20 kΩ

RRx
resistance Differential 100 kΩ
CRX1
CRX2 Receiver input filter
For improved EMC immunity 100 pF
CRX3 capacitors

CRX4

Table 10. Automatic Gain Control (AGC)

Symbol Parameter Conditions Minimum Typical Maximum Units

Output signal amplitude, Program option1, for 3.3V Mode and

VOUTAGC1 1.4 1.8 2.2 VPP
single ended, AGC enabled 5V mode (default)

Output signal amplitude,

VOUTAGC2 Program option2, for 5V mode 2.6 3.0 3.4 VPP
single ended, AGC enabled

Overall gain adjustment Default setting 2 120

GAINAFE range, sine and cosine signal V/V
channel With gain boost bit set 4 240

AGC attack time,

AGCAttack increase/decrease in same 10 µs
direction

0 ms
AGC reversing direction, 30
AGCDecay AGC decay time
programmable decay time 100
300
10 µs
Channel swapping functional safety 50
tswap Channel swapping cadence feature enabled, programmable
cadence time 100
200

© 2022 Renesas Electronics Corporation 15 March 11, 2022

 IPS2550 Datasheet

Table 11. Diagnostic Checks

Symbol Parameter Conditions Minimum Typical Maximum Units

Failure reaction time, (time to flag an
tfail Chip internal diagnostic checks 500 µs
error condition at the ADR_IRQN pin)
Load current on any analog
Debounce time for switching off the output exceeding the current
toc_assert analog output amplifiers in case of limit (IOL); all four analog 135 tfail µs
overcurrent outputs are switched off (tri-
state) after this time. [a]
Common mode volatage on
any analog output exceeding
Debounce time for switching off the
the VCM limit (DCOFF_AL); all
tcm_assert analog output amplifiers in case of output 40 tfail µs
four analog outputs are
common mode failure
switched off (tri-state) after this
time. [b]
Following an overcurrent
Debounce time for temporary release of switch-off condition, all outputs
toc_deassert 4.61 4.68 4.75 ms
analog outputs after overcurrent failure are turned on again after this
time
Following an output common
Debounce time for temporary release of
mode switch-off condition, all
tcm_deassert analog outputs after output common see toc_deassert ms
outputs are turned on again
mode failure
after this time
R_open_th Resistance of Rx coil, open coil detection Rx coil error flag activated 91 154 k
External resistance from any coil input to
R_short_GND Rx coil error flag activated 68 117 k
GND, short-to-ground detection
External resistance from any coil input to Rx coil error flag activated;
R_short_VDD 14 233 k
VDD, short to VDD detection VDD = 3.0 to 5.5V
R_short_th Rx coil error flag cleared Rx coil error flag cleared 50 130 k
Absolute value relative to
DC common mode output offset alarm
DCOFF_AL VDD/2. Output offset alarm flag 75 195 mV
limits
activated.
[a] Overcurrent durations shorter than these limits are ignored.
[b] Common Mode failure durations shorter than these limits are ignored.

Table 12. Back-End Specification, Analog Outputs SIN_SCL, SINN, COS_SDA, COSN

Symbol Parameter Conditions Minimum Typical Maximum Units

V3OUT Analog output range, 3.3V option -1.5mA ≤ IOUT ≤ 1.5mA
GND + 0.4 VDD – 0.4 V
V5OUT Analog output range, 5V option -2.5mA ≤ IOUT ≤ 2.5mA
Output DC offset voltage, common All modes,
VDDOUT_CM -35 0 35 mV
mode voltage Deviation from VDD/2
DCOFFDRIFT DC offset voltage drift Over temperature range -50 50 μV/°C

© 2022 Renesas Electronics Corporation 16 March 11, 2022

 IPS2550 Datasheet

Symbol Parameter Conditions Minimum Typical Maximum Units

Voltage change ±6mV
IOUT3 Output current; 3.3V option -3 +3 mA
relative to no load
Voltage change ±10mV
IOUT5 Output current; 5V option -5 +5 mA
relative to no load
IOL Output overload current Short circuit current limit 15 30 mA
Maximum gain, no output
Noise Device output noise filtering, shorted coil 2 5 mVrms
inputs
COUT1
COUT2 For improved EMC
Output filter capacitors immunity, placed close to 47 nF
COUT3 IC output
COUT4

Table 13. Digital I2C Control Interface, Pins SDA and SCL

Symbol Parameter Conditions Minimum Typical Maximum Units

VIH High level input voltage, all modes IRQN address select input, 0.7VDD VDD+0.3 V
SCL clock input,
VIL Low level input voltage, all modes SDA data input -0.3 0.3VDD V
ILEAK Input leakage current VDD = 0V to 5.5V -8 1.5 µA
VI_STR_hyst Hysteresis of Schmitt trigger input SCL clock input 0.1 V
VOL SDA low level output voltage open drain 3mA sink current 0 0.4 V
IOL Low level output current VOL = 0.4V, VDD=5.5V, RP=2kΩ 3 mA
CIN Capacitance of SDA/SCL pin Pad and ESD protection 10 pF
fSCL SCL clock frequency 0 100 kHz
tLOW LOW period of SCL clock 4.7 µs
tHIGH HIGH period of SCL clock 4.0 µs
tR Rise time SDA/SCL VIHmin to VILmax 1 µs
tF Fall time SDA/SCL VIHmax to VILmin 0.3 µs
CB External capacitive load for each bus line 400 pF
Resistor value and capacitive load
RSDA, External pull-up resistor at pins SDA and on these pins are limiting the
maximum clock frequency 1.8 4.7 kΩ
RSCL SCL

RADR
External resistor at pin ADR_IRQN for I2C Pull-up or pull-down, depending
1.8 4.7 kΩ
address selection on I2C address setting.

© 2022 Renesas Electronics Corporation 17 March 11, 2022

 IPS2550 Datasheet

Table 14. I2C Interface via Analog Outputs

Symbol Parameter Conditions Minimum Typical Maximum Units

SIN_SCL/COS_SDA high level
VIH 0.7VDD VDD+0.3 V
input voltage
SIN_SCL/COS_SDA low level
VIL -0.3 0.3VDD V
input voltage
Hysteresis of Schmitt trigger
VI_STR_hyst inputs, SIN_SCL and 0.1 V
COS_SDA
COS_SDA low level output
VOL 3mA sink current 0 0.4 V
voltage, open-drain
COS_SDA Low level output VOL = 0.4V, VDD=5.5V,
IOL 3 mA
current RP=1.8kΩ
SIN_SCL/COS_SDA input
IIN VDD = 0V to 5.5V -1.5 8 µA
leakage current
Capacitance of SCL and SDA
CIN Pad and ESD protection 10 pF
pins
fSCL SCL clock frequency 4 25 kHz
tLOW LOW period of SCL clock 20 125 µs
tHIGH HIGH period of SCL clock 20 125 µs
tF Fall time SIN_SCL/COS_SDA VIHmin to VILmax 0.8 1.2 µs
External capacitive load for
CB 47 nF
SIN_SCL and COS_SDA
First time window to
Program Entry window after
tPEU start sending unlock 1.5 5 ms
POR
command
Second time window to
Program Start window after
tPW complete first 75 ms
Unlock
programming command
Optional; for diagnostic
See Table 24 kΩ
indication

RPU External pull-up resistors Optional; during

programming on pins
1.8 kΩ
SIN_SCL and
COS_SDA
Optional; for diagnostic
RPD External pull-down resistors See Table 25 kΩ
indication

© 2022 Renesas Electronics Corporation 18 March 11, 2022

 IPS2550 Datasheet

Table 15. Digital I2C Control Interface, Pin ADR_IRQN

Symbol Parameter Conditions Minimum Typical Maximum Units

ADR_IRQN High level
VIH 0.7VDD VDD+0.3 V
input voltage
ADR_IRQN Low level input
VIL -0.3 0.3VDD V
voltage
Hysteresis Schmitt trigger
VI_STR_hyst 0.1 V
input
ILEAK Input leakage current -8 1.5 µA
ADR_IRQN high level
VOH 0.8VDD VDD+0.3 V
output voltage ADR_IRQN configured
ADR_IRQN low level as interrupt pin
VOL -0.3 0.2VDD V
output voltage

Table 16. Nonvolatile Memory

Symbol Parameter Conditions Minimum Typical Maximum Units

> 100 at 25°C
Data retention According to AEC Q100 Years
>15 at 100°C
Write temperature Allowed ambient temperature -40 135 °C
range for read and write
Read temperature access -40 160 °C

Endurance[a] 1000 NVM Write Cycles

Over product lifetime
Read Cycles 5x 1011 1x 1012 NVM Read events
[a] Verified number of program/erase cycles. Qualified with 2000 cycles

Table 17. Electrostatic Discharges (ESD)

Symbol Parameter Conditions Minimum Typical Maximum Units

ESD tolerance for all pins: Human Body Model According to AEC-Q100-002
VESD ±2 kV
(HBM) 100pF/ 1.5kΩ classification H2
ESD tolerance for pins with potential external
According to AEC-Q100-002
VESD,OUT cable connection: SIN_SCL, COS_SDA, SINN, ±4 kV
classification H3A
COSN, ADR_IRQN, VDD (HBM 100pF / 1.5kΩ)
ESD tolerance for all pins: Charged-Device According to AEC-Q100-011
VCDM ±500 V
Model (CDM) classification C3B
ESD tolerance for corner pins ADR_IRQN, SDA, According to AEC-Q100-011
VCDM,C ±750 V
VDDA, GND (CDM) classification C3B

© 2022 Renesas Electronics Corporation 19 March 11, 2022

 IPS2550 Datasheet

8. Circuit Description
The IPS2550 sensor circuit consists of one transmitter coil and two receiver coils, which are typically designed as traces on a printed circuit
board. The two receiver coils have a sinusoidal shape and are shifted by 90° with respect to each other; refer to Figure 7 and Figure 8 for typical
coil shapes. A metal target is placed above the coil arrangement.
Circuit signal flow:
1. The IPS2550 drives AC current into the transmitter coil and generates an alternating magnetic field.
2. The magnetic field induces voltages in the receiver coils. Without a metallic target, due to the balanced, anti-serial connection of their
segments, the voltages are compensated to achieve zero output at each pair of terminals.
3. If a metal target is placed above the coils:
a. The magnetic field induces eddy currents on the surface of the metal target.
b. The eddy currents generate a counter magnetic field, thus reducing the total flux density underneath.
c. The voltage induced in the receiver coil areas underneath the target is reduced, creating an imbalance in the anti-serial coil segment
voltages
d. An output voltage occurs on the terminals, changing amplitude and polarity with the target position.
4. The IPS2550 IC performs a synchronous demodulation of the received signals, and then filters and outputs them for external signal
processing.
Due to the 90° phase shift of the two receiver coils, the output signals also have a 90° phase shift in relation to the target position, generating
ratiometric sine and cosine signals. The signals can be converted into an absolute position, for example by applying an arctangent operation of
Vsin and Vcos.
Vsin
Position = arctan ( ) Equation 5
Vcos

8.1 Overview

Figure 6. Response of the IPS2550

VDD ADR_IRQN
Power Digital Interface for
VDDA SDA Diagnostics and
Supply
GND SCL Programming

Tx CT

Transmitter

Rx Receiver COS_SDA
(cos) Coil 1 COSN Analog Output
for Programming,
Position and
Rx Receiver SIN_SCL Diagnostics
(sin) Coil 2 SINN

IPS2550
Position, Rotation Angle Position, Rotation Angle

© 2022 Renesas Electronics Corporation 20 March 11, 2022

 IPS2550 Datasheet

Figure 7 shows an example of a linear motion sensor with one transmitter coil (transmitter loop) and two receiver coils (Sin loop and Cos loop).
Due to the alternating clockwise and counterclockwise winding direction of each segment in a loop (for example RxCos = clockwise Cos Loop1
+ counterclockwise Cos Loop 2), the induced voltages in each segment have alternating opposite polarity.

VCos Loop1 = -VCos Loop2 Equation 6

If no target is present, the secondary voltages cancel each other:

VCos = VCos Loop1 + VCos Loop2 = 0V Equation 7

With a target placed above the coils, the secondary voltage induced in the covered area is lower than the secondary voltage without a target
above it.

VCos Loop1 ≠ -VCos Loop2 Equation 8

This creates an imbalance of the secondary voltage segments, and thus, a secondary voltage ≠ 0V is generated, depending on the location of
the target.

VCos = VCos Loop1 + VCos Loop2 ≠ 0V Equation 9

Figure 7. Coil Design for a Linear Motion Sensor

Sin Loop 1 Sin Loop 2

(cw) (ccw) Tx Loop

RxSin

Tx

RxCos

Metallic Target
Cos Loop 2 Cos Loop 3
(ccw) (cw)
Cos Loop 1
(cw)

© 2022 Renesas Electronics Corporation 21 March 11, 2022

 IPS2550 Datasheet

The same principles shown for the linear motion sensor in Figure 7 can be applied to an arc or rotary sensor as shown in Figure 8.

Figure 8. Coil Design for a 360° Rotary Sensor

Sin Loop 1
(cw)
Tx Loop

Cos Loop 1
(cw)
Cos Loop 2
(ccw)

Metallic
Target
Sin Loop 2
(ccw)

9. Sampling Rate, Resolution, Output Data Rate, and Propagation Delay

Since the IPS2550 uses analog signal processing (no ADC), there is no sampling rate and the resolution is virtually infinite.
Due to the internal filtering and demodulation processes, there is a short signal propagation delay between analog input and output signals.
This delay is factory trimmed to a fixed value, independent of the transmitter oscillation frequency.
The coil receiver circuit automatically locks to the transmitter coil oscillator frequency. It automatically corrects for LC oscillator frequency drifts
due to temperature changes or air gap changes for the target.

Table 18. Propagation Delay

Symbol Parameter Conditions Minimum Typical Maximum Units

Propagation delay of receiver input Factory trimmed; over specified
tPD signals 1 and 2 at Sine and Cosine operating temperature and supply 3.2 4 4.9 µs
outputs. voltage range

© 2022 Renesas Electronics Corporation 22 March 11, 2022

 IPS2550 Datasheet

10. Output Modes

Figure 9. Output Signals: Sine-Cosine Analog Differential Mode

COS SIN COS_N SIN_N

Vout
VDD

VDD/2

0V α (el), 1 period
0° 90° 180° 270° 360°

Figure 10. Output Signals: Sine-Cosine Analog Single-Ended Mode

COS SIN COS_N SIN_N

Vout
VDD

VDD/2

0V α (el), 1 period
0° 90° 180° 270° 360°

11. Operating at High Speed

The IPS2550 uses analog signal processing, so it can handle inputs signals at very high speed. The input signal can have a frequency of up to
10kHz, which is equivalent to 600000 RPM (electrical phases per minute). Even higher frequencies and therefore higher speeds are possible,
but with reduced performance and signal amplitude.
The mechanical rotor speed can be calculated with Equation 10:
rpm (el)
rpm(mech) = Equation 10
coil periods

Where
rpm (mech) Rotation speed of the rotor (and target) in revolutions per minute
rpm (el) Maximum electrical input frequency of the sensor in rpm (electrical)
= 600000 electrical periods per minute (rpm)
= 10000 electrical periods per second = 10 kHz
coil periods Number of electrical periods per turn
= number of coil periods per 360° circle
= number of metal target segments

© 2022 Renesas Electronics Corporation 23 March 11, 2022

 IPS2550 Datasheet

For example, Figure 29 shows a design for a 6 pole motor (having 3 pole pairs) using a 3-periodic coil design.
The maximum mechanical rotation speed of this motor is calculated according to Equation 11.
600krpm(el)
= 200krpm(mech) Equation 11
3

Table 19. Output Modes and Maximum Speed

SIN/COS Output Mode Maximum Rotor Speed

Mechanical
Target Design (metal / no metal) Sine, Cosine Cycles per Revolution Speed
1  (180° / 180°) 1  360° 600krpm
2  (90° / 90°) 2  180° 300krpm
3  (60° / 60°) 3  120° 200krpm
4  (45° / 45°) 4  90° 150krpm
6  (30° / 30°) 6 60° 100krpm
8  (22.5° / 22.5°) 8  45° 75krpm
10  (18° / 18°) 10  36° 60krpm
… 1 cycle per target 600 krpm / targets per wheel

12. Digital Diagnostics and Programming Interfaces

In order to program the IPS2550 and to enable fast diagnostics without interrupting the analog high speed signal path, an additional I2C digital
serial interface is available.
The I2C interface can be operated in two modes:
 I2C interface with address select (default)
 I2C interface with interrupt (programming option)

© 2022 Renesas Electronics Corporation 24 March 11, 2022

 IPS2550 Datasheet

13. Block Diagram

Figure 11 shows the block diagram of the IPS2550.

Figure 11. Block Diagram

VDDA

VDD
Power
VDDDigital IPS2550
Management Offset Sin Offset
GND
Offset Cos Control
SIN_SCL
Voltage monitoring Gain Sin Gain
Gain Cos Control
Sin_n SINN
RX1
Protection
Rx Sine RX2
Analog Front-End: Time Automatic
Continuous Gain COS_SDA
Input Filter,
Offset and Demodulator Control
RX3 Gain Setting
Rx
Cosine RX4 Cos_n COSN

TX1
Configuration, SDA
Tx Oscillator Temperature Programming and Diagnostics
TX2 NVM Sensor Interface (I2C) SCL

ASIL-C Diagnostics, Internal Oscillator ADR_IRQN

The main building blocks include the following:

 Power management: Power-on-reset (POR) circuit; low drop-out (LDO) regulators for analog and digital supplies.
 Overvoltage and undervoltage monitoring for VDD, VDDA and internal voltage VDDDigital
 Oscillator: Generation of the transmitter coil signal.
 Analog front-end: Input filter, offset, and gain control for the receive signals.
 Offset control: Correction of offsets at the receiver coil inputs RX1-RX2 and RX3-RX4.
 Gain setting: Correction of amplitude mismatch between receiver coil input signals Rx1-RX2 and RX3-RX4.
 Time Continuous Demodulator: Converting RF amplitude modulated position signal to LF demodulated position signal.
 Gain control: Correction of amplitude mismatch from RX1/RX2 and RX3/RX4 input signals.
 Automatic Gain Control: Overall automatic adjustment of sine and cosine channel gain.
 Configuration, NVM: Nonvolatile storage of factory and user-programmable settings.
 Programming and Diagnostics Interface: Available over SIN and COS analog output interface and as a separate I2C interface.
 Temperature Sensor: Monitoring the chip temperature.
 ASIL-C Diagnosis, Internal Oscillator: Internal diagnosis of critical blocks to ensure functional safety. The factory trimmed Internal
Oscillator is used for chip-internal timings and as a time base for the Transmitter frequency measurement
 4 buffered analog/digital outputs with over-voltage and reverse-polarity protection.
 There are three interface options for the SIN_SCL, SINN, COS_SDA, and COSN pins (see Table 2):
 Differential analog output.
 Single-ended analog output with reference.
 Programming

© 2022 Renesas Electronics Corporation 25 March 11, 2022

 IPS2550 Datasheet

14. Detailed Block Descriptions

Refer to the block diagram in Figure 11 for an illustration of the following blocks.

14.1 Power Management

The IPS2550 can be operated with a power supply at either VDD = 3.3V ±10% or VDD = 5.0V ±10%. An internal LDO generates the supply
voltages for the analog and digital circuits. The analog supply (VDDA) is buffered by an external capacitor CVA. The digital power supply is
connected internally only.
VDD is over-voltage and reverse-polarity protected and constantly monitored for over-voltage or under-voltage.

14.2 LC Oscillator
The LC oscillator generates the RF magnetic field for the sensor. It operates in the frequency range of ~2MHz to 5MHz.The frequency is
adjusted by external components L (the transmitter coil) and C (external capacitor). See Table 8 for further details.
The IPS2550 accepts a large range of coil inductance, and the coil drive current is user programmable.
The LC oscillator is continuously checked for the correct frequency or failures such as open/short circuits or an oscillator failure.

14.3 Analog Signal Path

For maximum speed, the IPS2550 uses two parallel analog signal channels: one for sine and one for cosine and all-analog signal processing.

14.3.1 Rx Coil Diagnostics

The receiver coils Rx Sine and Rx Cosine are continuously checked for open/short circuits to ground, shorts to VDD, and shorts to the opposite
coil. As shown in Figure 2 and Figure 3, the receiver coils can be connected in the following two ways:
 ASIL C connection: preventing possible short-circuit of receiver coils due to a short of two neighboring pins.
 Compatibility connection: providing pin-to-pin compatibility to the industrial grade IPS2200.

14.3.2 Receiver Signal Low-Pass Filter

The receive signal is an amplitude-modulated signal where the carrier frequency is the frequency of the LC oscillator and the signal amplitude
is representative of the target position. In a rotating system, the LF signals are sine and cosine shaped, where one period of the LF signal is
equivalent to one period of the coil shape. See section 20 for examples of coil designs and their corresponding LF signal.
In a first step, the amplitude-modulated signals are low-pass filtered to suppress possible RF electromagnetic disturbances.

14.3.3 Offset and Gain Matching

After the signals are filtered, the RF signal is corrected for a possible offset and amplitude mismatch, originating from imperfect coil designs.
The amount of offset and fine gain correction can be user programmed to a fixed value in the NVM or corrected on-the-fly in embedded
applications; see section 15.1 for further details.

14.3.4 Demodulation
The time-continuous demodulator removes the carrier from the input signal, generating the demodulated LF signal.

© 2022 Renesas Electronics Corporation 26 March 11, 2022

 IPS2550 Datasheet

14.3.5 Automatic Gain Control (AGC)

The signal magnitude strength of the demodulated signal, M = √sin2 + cos2 , is permanently checked by a peak detector and compared against
a nominal level. If needed (for example, due to change of airgap between sensor and target), the overall gain of the sine and cosine channels
is corrected accordingly to bring the signal back to the nominal level.
The AGC generates an alarm if the gain leaves a user programmed range to alert for input signals that are too strong or too weak; for example
from a missing target.

14.4 Signal Channel Swapping

An effective method to improve the detection of internal gain errors is a Renesas patent-pending signal channel swapping feature, available as
a configuration option. When enabled, the chip periodically swaps the sine and cosine signal channels between the two analog signal paths.
By applying this method, any gain mismatch between sine and cosine signal channels is immediately detectable at the analog signal outputs,
even in static (non-rotating) operation.

14.5 Output Buffers

The four analog signals (sine, inverted sine, cosine and inverted cosine) are individually buffered at the corresponding output pins.
The buffer outputs are over-voltage and reverse-polarity protected and checked for shorts to ground, shorts to VDD, or common-mode voltage
disruption. In the diagnostic state, if enabled, the buffers are turned off, allowing diagnostics indication by the external MCU through external
pull-up or pull-down resistors.

14.6 Temperature Sensor

The IPS2550 features an internal chip temperature sensor to generate an alarm in the event of an over-temperature event. The temperature
sensor has two levels of alarm:
1. The junction temperature exceeds the warning threshold: a diagnostics alarm is generated, the output buffers for SIN_SDA, COS_SCL,
SINN, COSN are turned off to reduce the power consumption.
2. The junction temperature exceeds a critical alarm level. In addition, as a programming option, the LC oscillator can also be turned off to
further reduce the power consumption.

Table 20. Internal Chip Temperature Sensor Characteristics

Symbol Parameter Conditions Minimum Typical Maximum Units

TOVT_WARN Over-temperature warning threshold 175 180 185 °C
TOVT_ERR Over-temperature error threshold 180 185 190 °C
ACCTS Temperature sensor absolute accuracy -10 +10 ºC
THYST Temperature hysteresis 8 10 12 ºC

© 2022 Renesas Electronics Corporation 27 March 11, 2022

 IPS2550 Datasheet

15. ECU Connection Options

Note: In Figure 12, Figure 13, and Figure 14, the various connection options between the IPS2550 and the electric control unit (ECU) are shown.
The IPS2550 must be programmed properly to match to the correct VDD voltage supply level (3.3V or 5.0V).

15.1 Embedded vs. Remote Connection

In an embedded connection, both the sensor and microcontroller (MCU) are mounted on the same printed circuit board (PCB). In these
applications, the number of connections between the two chips is not critical. The MCU can take advantage of the separate digital I2C interface
to constantly monitor the diagnostic registers without interrupting the analog signal flow or to change offset or gains on-the-fly.
ADR_IRQ Pin is used in IRQ mode for diagnosis.
When using the digital interface pins, SDA and SCL, IPS2550 and ECU must share the same VDD voltage supply level in order to match the
digital high and low signal levels.
The circuit diagram, shown in Figure 12, include external components required for improved EMC performance in embedded operation.
Note: Capacitors COut1 to COut4 depend on ADC input specifications of the connected MCU.

Figure 12. Embedded Application: Sensor and MCU are on the same PCB

VDD

RSDA RSCL

IRQ input
1 I/O
16
ADR_IRQN

Connector
SDA SDA I/O Digital
2 15
RX1 SCL SCL I/O Interface
Rx 14 I/O
CRx2 3 SIN_SCL
RX2 COut1
CRx1
13
MCU

4 SINN
IPS2550

RX3
COut2
Rx ADC
5 12 inputs
RX4 COS_SDA
CRx3 CRx4 COut3
11
RTx1 6 TX1 COSN
Tx COut4
VDD
RTx2 7 TX2 10 VDD
VDD
CTx1 CTx2 GND CVDD CVDD_ECU
8 9
VDDA GND
CVA

Sensor module

In a remote application, the sensor module is separate from the ECU, connected by a cable. For cost efficiency, the number of wires on the
cable and the number of connector pins should be kept as small as possible, typically four wires (VDD, GND, Sine, Cosine) for single-ended
configuration and six wires (VDD, GND, Sine, Inverted Sine, Cosine, Inverted Cosine) for differential configuration.
In an error case, the analog outputs are switched to tristate mode; a diagnostic state is indicated by either pushing the output voltage to VDD
using pull-up resistors (as shown in Figure 13 ) or by pulling the output voltage to ground, using pull-down resistors (as shown in Figure 14).
See 18.2 for further details on diagnostic indication.
The circuit diagrams, shown in Figure 13 and Figure 14 include external components required for improved EMC performance in remote
operation.

© 2022 Renesas Electronics Corporation 28 March 11, 2022

 IPS2550 Datasheet

Figure 13. Remote Application with Pull-Up Resistors for Diagnosis

VDD VDD

RIRQ RSDA RSCL VDD

1 I/O
16

Connector
ADR_IRQN SDA I/O
RP1 RP2 RP3 RP4 Digital
2 15 Interface
RX1 SCL I/O
Rx 14 I/O
CRx2 3 SIN_SCL
RX2 COut1
CRx1
13
4 SINN
IPS2550

RX3
COut2

MCU
ADC
Rx 12
5 COS_SDA inputs
RX4
CRx3 CRx4
11
COut3 Cable
RTx1 6 TX1 COSN
Tx COut4
RTx2 7 TX2 10 VDD VDD
VDD VDD
CTx1 CTx2 CVDD CVDD_ECU
8 9
VDDA GND GND
CVA

Connector
Connector

Sensor module Electric Control Unit (ECU)

Figure 14. Remote Application with Pull-Down Resistors for Diagnosis

VDD
VDD

RIRQ RSDA RSCL

16 I/O
1
SDA

Connector
ADR_IRQN I/O Digital
15
2 SCL I/O Interface
RX1
Rx 14 I/O
CRx2 3 SIN_SCL
RX2 COut1
CRx1
13
4 SINN
IPS2550

RX3
COut2

MCU
ADC
Rx 12
5 COS_SDA inputs
RX4
CRx3 CRx4
11
COut3 Cable
RTx1 6 TX1 COSN
Tx COut4
RP1 RP2 RP3 RP4
RTx2 7 TX2 10 VDD VDD
VDD VDD
CTx1 CTx2 CVDD
8 9
VDDA GND GND
CVA
Connector

Connector

CVDD_ECU
Sensor module Electric Control Unit (ECU)

© 2022 Renesas Electronics Corporation 29 March 11, 2022

 IPS2550 Datasheet

15.2 Supply Voltage Operation: 3.3V or 5V

The IPS2550 can be programmed to operate with either a 3.3V ±10% or a 5.0V ±10% supply voltage, the default is 5V. Refer to section 17.1
for changing the default supply voltage.”

15.3 I2C Interface

The IPS2550 includes a standard I2C interface. The I2C address is programmable. In addition, the ADR_IRQN pin can be programmed as
either an I2C address selection pin or as an interrupt output (IRQN) pin when using the I2C interface (see Table 3). The IPS2550 is configured
as an I2C slave; several slaves can be connected in parallel on the I2C bus. A detailed description of the programming features is available in
the IPS2550 User Programming Manual.
Two wires, serial data (SDA, pin 16) and serial clock (SCL, pin 15), carry information between the devices connected to the bus. Both SDA and
SCL are connected to the positive supply voltage VDD via an external pull-up resistor. When the bus is free, both lines are high. The output
stages of devices connected to the bus must have an open-drain or open-collector to perform the wired-AND function.
An external master (host controller) initiates a transfer, generates clock signals, and terminates a transfer. The implementation supports the
I2C slave function, which is addressed by the master and supports the I2C bus specification version 2.1.
Since the analog outputs might contain passive filters or EMC capacitors, the rise and fall times might be longer compared to the digital I2C
interface. Therefore, the I2C clock rate during programming of the IPS2550 over the analog outputs must be adapted accordingly.

15.3.1 I2C with Address Selection (Default)

When the IPS2550 is programed to use the I2C interface with address selection, the ADR_IRQN pin is used to select the
I2C slave address by hardware pin strapping.
By default, the ADR_IRQN pin (#1) is used to define the IPS2550 I2C slave address by hardware pin strapping.
The status of this pin is mirrored in I2C address Bit A3 and the inverted status of this pin is mirrored in I2C address Bit A0
of the 7-bit I2C address (see Figure 15).
The default setting of I2C address bit is A4 =1.
If ADR_IRQN is tied to Ground, the IPS2550 default slave address is 0010001 (binary) = 0x11 (Hex),
while if this pin is connected to VDD, the I2C address is set to 0011000 (binary) = 0x18 (Hex).
I2C address selection through hardware pin strapping can be disabled and a fixed I2C address can be defined in the NVM
address bits A6…A3 (see further details in the IPS2550 Programming Guide document).
Table 21 shows the different options for selecting the I2C address by combinations of pin addressing and NVM address
register setting.
I2C address bits A3 to A6 can be configured in the NVM for an individual I2C address, allowing up to 14 devices to be
addressed in parallel. See the IPS2550 Programming Guide document for more information.

Table 21. I2C Address Selection Options in NVM

I2C Address Selection Mode A6 A5 A4 A3 A2 A1 A0

Default setting 0 0 1 Pin#1 0 0 Pin#1 inverted
User programmable range, with I2C address selection by pin #1 001 to 110 (binary) Pin#1 0 0 Pin#1 inverted
User programmable range, with fixed I2C address 0001 to 1110 (binary) 0 0 0

© 2022 Renesas Electronics Corporation 30 March 11, 2022

 IPS2550 Datasheet

Figure 15. I2C Address Select Bits

A3 A0
A6 A5 A4 A2 A1 INV_
RnW
ADDR ADDR

I2C Slave Address

Figure 16. I2C Interface with Address Select

VDD

RSDA RSCL

SDA Data In/Out SDA

IPS2550
#1 SCL Clock SCL MCU
ADR_IRQN VDD
RADR

SDA
IPS2550
#2 SCL
ADR_IRQN
RADR
GND

15.3.2 Avoiding a Parasitic Path through ADR_IRQN Pin during Loss of GND or Loss of VDD
In safety critical applications, a loss of ground or VDD must be monitored and reacted to in case of failure. Cases for a loss of the GND or
VDD wire in a remote application and their proper diagnostic configuration are shown in Figure 24.

If the ADR_IRQN pin is used for selecting the I2C address through hardware pin strapping, it is recommended not to connect it directly to
VDD or GND. Connected it to VDD or GND with a 4.7kΩ resistor (see Figure 17) to avoid parasitic supply currents flowing through the
ADR_IRQN pin in case of broken GND or VDD wires that might put the chip in an undefined state.

© 2022 Renesas Electronics Corporation 31 March 11, 2022

 IPS2550 Datasheet

Figure 17. I2C Interface with Address Selection by Hardware Pin Strapping Through ADR_IRQN Pin

RADR RSDA RSCL

RSDA RSCL VDD
VDD
SDA Data In/Out SDA
VDD
SCL Clock SCL VDD
IPS2550 ADR_IRQN
MCU
ADR_IRQN RADR
SDA Data In/Out SDA
IPS2550 MCU
GND GND SCL Clock SCL

GND GND

15.3.3 I2C Interface with Interrupt (Programming Option)

When the IPS2550 is programed to use the I2C interface with the interrupt function, it operates as a standard I2C interface. The I2C address is
programmable. In addition, the ADR_IRQN pin is used as an interrupt output for fast signaling of a diagnostic event.

Figure 18. I2C Interface Configuration with Interrupt on a Single Slave

VDD

RSDA RSCL

SDA Data In/Out SDA

MCU
IPS2550 SCL Clock SCL
ADR_IRQN Interrupt IRQ

Figure 19. I2C Interface Configuration with Multi-slave Interrupt

Note: In this mode, several I2C slaves are connected in parallel. Note that each I2C slave must have an individual I2C address.
VDD

RSDA RSCL

SDA Data In/Out SDA

IPS2550
#1 SCL Clock SCL MCU
ADR_IRQN Interrupt IRQ1
IRQ2
SDA
IPS2550
#2 SCL
ADR_IRQN Interrupt

For a detailed description of the I2C interface, refer to the IPS2550 Programming Guide.

© 2022 Renesas Electronics Corporation 32 March 11, 2022

 IPS2550 Datasheet

16. Over-Voltage Protection

16.1 I/O Protection

In order to meet the automotive requirements for over-voltage and reverse-polarity protection on both the output and power supply pins, the
IPS2550 includes several protection and diagnosis features:
1. Protection against short circuit of the output pins SIN, SINN, COS, and COSN to GND or to VDD
2. Over-voltage and reverse-polarity protection:
a. On supply pin VDD to GND
b. On analog output pins SIN, SINN, COS, and COSN to GND

17. Programming Options

The IPS2550 family offers a variety of programming options. The main programming functions are described in Table 22.
The IPS2550 can be accessed and programmed in one of two ways:
 Over the I2C interface pins SDA and SCL
 Through the analog outputs SIN_SCL and COS_SDA
Note: For programming details, see the IPS2550 Programming Guide, which is available from Renesas on request.
The I2C interface, available at pins SDA and SCL, allows simultaneous access to the internal registers and on-the-fly modification of gain and
offset settings without interruption of the analog output signals. The IPS2550 can also be programmed via this interface in the same way using
a standard I2C protocol; see Figure 20.
Note that the SDA and SCL pins do not contain internal pull-up resistors. If this interface is used, external pull-up resistors need to be installed,
either on the sensor module or externally.

Figure 20. Programming the IPS2550 over the I2C Interface

VDD
VDD

RIRQ RSDA RSCL

1 16
ADR_IRQN SDA SDA
2 15
RX1 SCL SCL (Master)
Rx 14
CRx2 3 SIN_SCL
RX2 COut1
CRx1
Programmer

13
4 SINN
IPS2550

RX3
COut2
Rx 12
5 COS_SDA
RX4
CRx3 CRx4 COut3
11
RTx1 6 TX1 COSN
Tx COut4
VDD = 5V or
RTx2 7 TX2 10 VDD VDD = 3.3V
VDD
CTx1 CTx2 CVDD
8 9
VDDA GND GND
CVA
Connector

Sensor module

In some cases, particularly in remote applications, where the number of connector pins and wires is kept at a minimum and where permanent
access to the internal registers is not needed, it is also possible to program the IPS2550 over two analog outputs (SIN_SCL and COS_SDA;
see Figure 21).

© 2022 Renesas Electronics Corporation 33 March 11, 2022

 IPS2550 Datasheet

This method is typically used for end-of-line programming for a final, assembled sensor module, where the digital interface pins SDA and SCL
are no longer accessible.
In order to avoid unintentional programming of the IPS2550, a few safety locks are implemented:
 The programming enable window is open for a few milliseconds after power-up. If there is no external enable command sent within this
time window, the IPS2550 resumes normal power up.
 Following this first level of enabling programming mode, another password must be sent within a second, longer window to unlock
Programming Mode. See the IPS2550 Programming Guide document for details.
 After programming, the chip can be locked for further writing, and in addition it can also be locked for reading. Once the chip is locked, it
cannot be unlocked (Cyber Security feature).
Since the analog outputs could contain external passive EMC filters that will slow down the data rate, the programmer must also be able to run
at lower speeds.
In order to hit the programming time window after power-up, the programmer must be able to sense the VDD ramp-up of the IPS2550. Optionally,
the programmer can actively cycle the power for the IPS2550 as illustrated in Figure 21.

Figure 21. End of Line Programming of the IPS2550 Through the Analog Outputs

VDD
VDD

RADR RSDA RSCL

2x Pull-up resistors:
1 16 1.8 – 10k
ADR_IRQN SDA
15
2 SCL
RX1
Rx 14
CRx2 3 SIN_SCL SCL (Master)
RX2 COut1
CRx1
13
4 SINN
IPS2550

RX3

Programmer
COut2
Rx 12
5 COS_SDA SDA
RX4
CRx3 CRx4 COut3
11 VDD monitoring
RTx1 6 TX1 COSN
Tx COut4 Power on
VDD = 5V or
RTx2 7 TX2 10 VDD VDD = 3.3V
VDD
CTx1 CTx2 CVDD
8 9
VDDA GND GND
CVA
Connector

Sensor module

Note: For improved EMC and ESD performance, do not leave unused I2C interface pins floating. Connect the SCL and SDA pins to VDD using
series resistors RSDA and RSCL, see Table 13 for recommended component values.

© 2022 Renesas Electronics Corporation 34 March 11, 2022

 IPS2550 Datasheet

17.1 Programming the Device to Use the Other Supply Voltage Option
The IPS2550 can be programmed for two operation supply voltages: 3.3V ±10% or 5.0V ±10%.
If an IPS2550 that is programmed for 5V supply is connected to a 3.3V supply, it will remain in a (5V) under-voltage state and not boot up.
However, in this state, the NVM Programming Mode can be enabled, so the chip can be re-programmed to a 3.3V supply voltage. After a power-
on-reset, the IPS2550 will re-boot as a 3.3V device and operate normally in a 3.3V environment.
If an IPS2550 that is programmed for 3.3V supply is connected to a 5V supply, it will start-up, flag a (3.3V) over-voltage alarm, and enter the
diagnostic state. However, despite the alarm, Programming Mode can still be enabled, so the IPS2550 can be re-programmed to 5V supply
voltage. After a power-on-reset, the IPS2550 will re-boot as a 5V device and operate normally in a 5V environment.

17.2 Lock Feature (Cyber Security)

The IPS2550 contains a lock bit option, which can be set by the user. The lock feature is user selectable for write lock only or read+write lock.
Once the write lock bit or write+read lock bit is set, no further writing to the IPS2550 is possible. A locked IPS2550 cannot be unlocked.
Note: The detailed IPS2550 Programming Guide is available from Renesas on request.

17.3 Programming Options

Table 22. Programming Options Overview

Function Programming Option

Supply voltage range 3.3V ±10% or 5.0V ±10%, alarm levels
High speed interface Sine/cosine differential or single-ended
Digital diagnostic and programming interface I2C with address select or I2C with interrupt
I2C interface Slave address, I2C mode with address select or with interrupt
Analog output pins are high ohmic in diagnostic state. (SIN, COS) and (SINN,
Diagnostic signaling on high speed analog interface
COSN) can be enabled/disabled separately
Security lock function Access to internal registers of the device can be set to read-only or R/W lock
Receiver overall gain Overall gain coarse adjustment
Sine, cosine channel gain Amplitude mismatch correction, fine adjustment
Sine, cosine offset Pre-adjustment of input offsets
Transmitter oscillator Bias current, optimization of coil performance
Time base counter Measurement of transmitter oscillator frequency, and upper/lower frequency alarm
Interrupt Enable/disable/clear interrupt events
Automatic gain control Upper/lower gain limit

© 2022 Renesas Electronics Corporation 35 March 11, 2022

 IPS2550 Datasheet

18. Functional Safety and Diagnostics

18.1 Functional Safety ASIL and ISO Compliance

The IPS2550 has been developed according to ISO26262 as a Safety Element out of Context (SEooC) for implementation in safety relevant
systems up to ASIL C for a single IC and ASIL D for dual, redundant ICs, using internal and external safety mechanisms.
Integration of IPS2550 products into safety-related applications requires a safety analysis performed by the user.
Internal safety mechanisms include, but are not limited to, the following:
 Detection of broken or shorted receive or transmitter coils
 Under-voltage and over-voltage detection
 Broken-chip detection
 Data integrity checks (ECC and parity)
 Silicon chip over-temperature detection
 Detection of output buffer failures
See Table 26 for additional IPS2550 safety features.
External safety mechanisms must be performed by the receiving microcontroller unit (MCU). They include, but are not limited to, the following:
 Cable harness checks (open, short to GND, short to VDD)
 Plausibility and failure checks of the sine and cosine signals (offset, amplitude, phase)
 Position output synchronicity (for systems using dual ICs)

18.2 Diagnostic Mode Indication through Analog Outputs

In addition to the diagnostic flag indication through the I2C interface and interrupt output pins, the IPS2550 offers diagnostic indication through
the analog output pins by putting them in diagnostic mode. This diagnostic mode is indicated by an output voltage that is outside the normal
operating range, see Figure 22.

Figure 22. Operating Range and Diagnostic Range

VOUT
VDD Diagnostic high range

VDD/2 Normal operating range

Diagnostic low range

0V
0° 90° 180° 270° 360°
Position (electrical °)
When the AGC is enabled, the normal operating range is:
 VDD/2 ±1.5V = 1.0 to 4.0V for 5V mode
 VDD/2 ±900mV = 0.75 to 2.55V for 3.3V mode or 5V mode (default)
When the AGC is disabled, the operating output voltage range is not limited and defined by the input voltage multiplied by the total gain in the
signal path. Note that the gain has to be set correctly otherwise the output voltage moves into the diagnostic ranges.

© 2022 Renesas Electronics Corporation 36 March 11, 2022

 IPS2550 Datasheet

The limits for the diagnostic ranges are defined by the user. Typical diagnostic ranges are:
 Diagnostic low ≤ 3 to 5% VDD
 Diagnostic high ≥ 95 to 97%VDD.
For the IPS2550, the output voltage in diagnostic mode depends on the error condition and the value of the external pull-up or pull-down
resistors, see Table 24 and Table 25 for details.
The IPS2550 provides the following options for diagnostics indication through the analog outputs:
 Diagnostics indication on output pins disabled
 Diagnostics only on SIN_SCL and COS_SDA pins
 Diagnostics only on SINN and COSN pins
 Diagnostics on all four analog output pins
Each individually checked error can be enabled or disabled for diagnostics indication.
If diagnostic is enabled and an error occurs, the selected outputs are switched off. By connecting external pull-up or pull-down resistors, the
output voltage is either pulled towards VDD into the Diagnostic high range or pulled towards GND into the Diagnostic low range, see Figure 23.

Figure 23. Selection of Diagnostic Range

Pull-Up
resistor on
Receiver end

VDD
VDD VDD
IPS2550

Diagnostic
MCU

High
Output
switched off
in error case
GND GND

VDD
VDD VDD
IPS2550

Diagnostic
MCU

Low
Output
switched off
in error case GND
GND
Pull-Down
resistor on
Receiver end

Note that during programming through the analog outputs using the I2C interface, the SIN_SCL and COS_SDA pins need to be connected to
external pull-up resistors. If the Sensor module includes on-board pull-down resistors, the external pull-up resistors for programming must be
selected properly to provide adequate high levels that does not exceed the load current on the outputs. Therefore, if the IPS2550 is to be
programmed on module level, for example for end-of-line calibration, the use of pull-up resistors for diagnostics indication is recommended.

18.2.1 Shorted and Broken Wire Detection

A failure from a broken or shorted wire occurs when the sensor is connected to a control unit (MCU, ECU) by a cable.

18.2.1.1 Shorted Wires

Shorts between Ground, Signal and Supply wires can be safely detected, as shown in Table 23:

© 2022 Renesas Electronics Corporation 37 March 11, 2022

 IPS2550 Datasheet

Table 23. Detection of Shorts between Wires

Cable connections Supply Output Ground

Short between two supplies. Short between Supply and Output.
Only applicable for isolated, Output switches off when the output Short between Supply and Ground.
redundant sensor IC supplies. Must current exceeds the overcurrent Overcurrent in the supply line.
Supply be monitored and controlled by the threshold. Diagnostic state depends Must be monitored and controlled
external power supply unit on whether pull-up or pull-down by the external power supply unit
supplying the sensors. resistors are installed at the receiver supplying the sensor.
side.
Short between Output and Supply. Short between two different outputs. Short between Output and Ground.
Output switches off when the output Outputs switch off when their output Output switches off when the
current exceeds the overcurrent current exceeds the overcurrent output current exceeds the
Output threshold. Diagnostic state depends threshold. Diagnostic state depends overcurrent threshold. Diagnostic
on whether pull-up or pull-down on whether pull-up or pull-down state depends on whether pull-up
resistors are installed at the resistors are installed at the receiver or pull-down resistors are installed
receiver side. side. at the receiver side.
Short between Ground and Output. Short between two Ground wires.
Short between Ground and Supply. Output switches off when the output Only applicable for isolated,
Overcurrent in the supply line. Must current exceeds the overcurrent redundant sensor IC supplies.
Ground be monitored and controlled by the threshold. Diagnostic state depends Must be monitored and controlled
external power supply unit on whether pull-up or pull-down by the external power supply unit
supplying the sensor. resistors are installed at the receiver supplying the sensors”
side.

18.2.1.2 Broken Wires

Most of the broken Supply, GND, or Signal wire errors are easily detectable, see the left column of Figure 24.
For the following cases, the parasitic current inside the Sensor IC can cause unwanted, too high voltage drops across the pull-up or pull-down
resistors and does not indicate the error condition properly (see right column of Figure 24):
 a broken Supply wire with external pull-up resistors at the receiving end:
parasitic current flows from VDD on the receiver end  external pull-up resistor output pin of the Sensor IC device internal parasitic
path to GND.
 a broken GND wire with external pull-down resistors at the receiving end:
parasitic current flows from VDD on the Sensor IC device internal parasitic path to output pin  external pull-down resistor  GND
For these special cases, the maximum resistance value for these resistors must be selected according to the required diagnostic range, see
Table 24 and Table 25.

© 2022 Renesas Electronics Corporation 38 March 11, 2022

 IPS2550 Datasheet

Figure 24. Parasitic currents with Broken VDD or Broken GND lines

Uncritical Error cases: Critical Error cases:

Pull-Up
resistor on
Broken Broken Receiver end
VDD VDD
Line! Line! VDD
No current
VDD VDD VDD VDD

Sensor IC
Sensor IC

Diagnostic OUT Diagnostic

MCU
MCU
OUT
Low High?
Pull-Down Parasitic
resistor on current
Receiver end
GND GND GND GND

Pull-Up
resistor on
Receiver end VDD VDD
VDD VDD VDD VDD

Sensor IC
Sensor IC

Diagnostic OUT Diagnostic

MCU
MCU
OUT High Low?
Parasitic
current
No current GND GND
GND GND
Broken Broken Pull-Down
GND GND resistor on
Line! Line! Receiver end

VDD VDD
Sensor IC

Broken
Signal line Diagnostic
MCU

OUT
Low
Pull-Down
resistor on
Receiver end
GND GND

Pull-Up
resistor on
Receiver end VDD
VDD VDD
Broken
Sensor IC

OUT Signal line Diagnostic

MCU

High

GND GND

In case of an open connection of the VDD or GND pins, a parasitic supply current can flow through other pins (such as ADR_IRQN, SDA or
SCL) if they are directly connected to VDD or GND, see Figure 25. To avoid such parasitic supply currents, connect these pins to VDD or GND
via a ≥4.7kΩ resistor, as shown in Figure 25.

© 2022 Renesas Electronics Corporation 39 March 11, 2022

 IPS2550 Datasheet

Figure 25. Parasitic currents through ADR_IRQN pin

Critical Error cases, using ADR_IRQN as Input:

4.7k
ADR_IRQN ADR_IRQN
VDD VDD VDD VDD
Sensor IC

Sensor IC
Open VDD pin Open VDD pin

MCU
Parasitic supply

MCU
No Parasitic
current! supply current 

GND GND GND GND

VDD VDD VDD VDD

Sensor IC

Sensor IC
Parasitic supply
MCU

current! No Parasitic

MCU
supply current 
4.7k
ADR_IRQN
ADR_IRQN
GND GND GND GND
Open GND pin
Open GND pin

Table 24. Diagnostic Levels with Pull-Up Resistors

Diagnostic Level >95% VDD >96% VDD >97%VDD Unit

Error indication during normal operation ≤10 kΩ
Broken GND line Not critical, see Figure 24, left column kΩ
Broken VDD line, 5V mode ≤4.7 ≤3.82 ≤2.84 kΩ
Broken VDD line, 3.3V mode ≤3.96 ≤3.2 ≤2.4 kΩ

Table 25. Diagnostic Levels with Pull-Down Resistors

Diagnostic level <3% VDD <4% VDD <5%VDD Unit

Error indication during normal operation ≤10 kΩ
Broken VDD line Not critical, see Figure 24, left column kΩ
Broken GND line, 5V mode ≤1.48 ≤2.0 ≤2.56 kΩ
Broken GND line, 3.3V mode ≤1.65 ≤2.23 ≤2.85 kΩ

Note: Another potential parasitic supply current path during open GND pin or open VDD pin connection can occur when the ADR_IRQN pin is
used as I2C address selector and hard-wired to GND or VDD. See chapter 15.3.2 for details. It is therefore recommended to connect the
ADR_IRQN pin to GND or VDD using a series resistor RADR. See Table 13 for recommended component values.

© 2022 Renesas Electronics Corporation 40 March 11, 2022

 IPS2550 Datasheet

18.3 Diagnostic Features

The diagnostics described in Table 26 are performed on the chip level and are flagged in corresponding registers if a fault detection occurs.
Each of these diagnostic functions can be enabled or disabled to generate an interrupt event at the ADR_IRQN output. In addition, an interrupt
event can also be signaled through the high speed interface pins (SIN, SINN, COS, COSN; see Table 2) by putting them into the diagnostic
state.
Alarm types marked as “Static” will remain set while the error persists and are cleared only by power-on-reset (POR); alarm types marked as
“Temporary” will be cleared when the source of the error is removed.
Diagnostic flags marked as “Continuous” are continuously tested; diagnostic flags marked as “Start-up” are checked at start-up only.

Table 26. Diagnostic Features

Diagnostic Flag Type Active Description

If the external supply voltage exceeds the maximum limit of typical +10%, this flag
VDD over-voltage Temporary Continuous is asserted. To avoid a flag toggling, a comparator hysteresis is implemented. See
Table 6 for alarm levels in 3.3V Mode and Table 7 for alarm levels in 5V Mode.

If the external supply voltage falls short of the minimum limit of typical -10%, this
VDD under-voltage Temporary Continuous flag is asserted. To avoid flag toggling, a comparator hysteresis is implemented.
See Table 6 for alarm levels in 3.3V Mode or Table 7 for alarm levels in 5V Mode.

Under-voltage condition at VDDA. See Table 6 for alarm levels in 3.3V Mode or
VDDA under-voltage Temporary Continuous Table 7 for alarm levels in 5V Mode.

Data access failure Temporary Continuous Chip internal failure.

Protocol integrity failure Temporary Continuous Failure in the I2C data transfer.
Shadow register DED Static Continuous Shadow register bank double-bit error detection (DED).
Shadow register bank single-bit error detection (SED). Each single-bit error
Shadow register SED Temporary Continuous
detection triggers a single-bit error correction (SEC) of the register output.
NVM double-bit error detection. Each individual addressed word is checked and
Nonvolatile memory DED Static Start-up
flagged for bit error.
NVM single-bit error detection. Each individual addressed word is checked and
flagged for bit errors.
Nonvolatile memory SED Temporary Start-up
Each single-bit error detection will automatically trigger a single-bit error
correction (SEC) of the NVM output.
LC oscillator frequency This flag is set when the LC oscillator frequency is out of range. The frequency
Temporary Continuous
failure range is programmable.
LC oscillator general
Temporary Continuous This flag is set when the LC oscillator stops running.
failure
Internal oscillator failure Static Continuous Failure of the chip internal oscillator.
Internal bus failure Temporary Continuous Chip internal failure.
A cyclic interrupt request can be initiated by starting a watchdog counter. Once
IRQN watchdog failure Static Continuous the timer is expired, the interrupt flag is asserted and the timer will be restarted.
The timer can be stopped by resetting the watchdog value to zero.
Mechanical damage Static Continuous The chip is checked for mechanical damage (cracks in the silicon).

© 2022 Renesas Electronics Corporation 41 March 11, 2022

 IPS2550 Datasheet

Diagnostic Flag Type Active Description

This flag is set when the mean value of analog outputs (SIN+SINN) or
(COS+COSN) differs from (VDD/2) by more than specified limits, see parameter
Temporary
DCOFF_AL in Table 11. This error will always turn off the analog outputs, regardless
of the analog output diagnostics mode.
Output buffer failure Continuous If the output buffer failure condition still persists after eight temporary buffer failure
checks, all four analog outputs are permanently turned off to avoid overheating of
Static the chip and the static output buffer failure flag is set.
This state can be cleared by power-on-reset or by clearing the static output buffer
failure flag through the I2C interface.
This flag is set when the load current on one or more analog output buffers is
above the overcurrent limit (IOL). After a debounce time toc_assert , all four outputs
are switched off (tri-state).
Temporary A temporary output overload check is performed following debounce time
toc_deassert : the outputs are turned on and the overcurrent condition is asserted
again.
Output buffer overload Continuous See Table 11 and Table 12 for parameters.
If the output overload condition still persists after 8 temporary output overload
checks, all four analog outputs are permanently turned off to avoid overheating of
Static the chip and the static output buffer overload flag is set.
This state can be cleared by power-on-reset or by clearing the static output buffer
overload flag through the I2C interface.
This flag is set if one of the following malfunctions of the receiver coils occurs:
Receiver coils failure Temporary Continuous
short between coils, short to GND, short to VDD, open coil.
Transmitter coil failure Temporary Continuous This flag is set if there is failure at the transmitter coil.
Junction temperature
Temporary Continuous Over-temperature warning or failure of the chip internal temperature sensor.
warning/failure
Internal supply failure Static Continuous Failure of the chip’s internal supply voltages.
AGC error Temporary Continuous This flag is set when the gain of the AGC has reached user programmed limits.
Internal digital error Static Continuous Error of the internal digital circuit.
BIST diagnostics error Static Start-up Failure of self-test mechanisms.

18.4 Internal Register and Memory Errors

For all registers, volatile and nonvolatile memories, an error correcting code (ECC) is implemented, allowing 2-bit error detection and 1-bit error
correction. An alarm flag is set when an ECC error occurs.

18.5 LC Oscillator Frequency Out of Range

The typical LC oscillator frequency ranges from ~2MHz to 5MHz, between the medium-wave radio band (0.52MHz to 1.73MHz) and the short-
wave radio band (5.8MHz to 6.3MHz). Due to the use of external components (printed inductor and discrete capacitor), the transmitter oscillation
frequency will change over temperature, mainly depending on the temperature coefficient of the discrete capacitor (see CT in the application
circuit on page 1).
Recommendation: Use a capacitor with a low temperature coefficient.

© 2022 Renesas Electronics Corporation 42 March 11, 2022

 IPS2550 Datasheet

In order to ensure that the oscillation frequency is within the boundaries of a given application, the oscillation frequency of the transmitter
oscillator is internally measured and stored as a proportional value in a register. The user can select upper and lower limits for these register
values that will create an alarm flag when the oscillation frequency is outside of these programmable boundaries.

19. Redundant Connections

In applications requiring extended reliability, a redundant set-up using two separate IPS2550 circuits can be used, as shown in Figure 26.
Physically, they share the same target and share the same coil area but are electrically isolated from one another with the transmitter and
receiver coils placed at different PCB layers.
Depending on the coil design, the two transmitter coils can be magnetically coupled with each other. For fail-safe operation, the ideal coupling
between the two transmitter coils needs to be evaluated in each case.

Figure 26. Application Diagram: Dual Redundant Sensors, Dual Supply

Sensor #1: Sensor #2:

Supply Voltage VDD1 Supply Voltage VDD2
VDD VDD VDD VDD VDD VDD
Shared
RSCL RSDA RADR Target RADR RSDA RSCL

16 1 1 16
SDA ADR_IRQN ADR_IRQN SDA
15 2 2 15
SCL RX1 RX1 SCL
14 Rx Rx
14
SIN_SCL 3 (sin) (sin) 3 SIN_SCL
COut1 RX2 RX2 COut1
13 13
SINN 4 4 SINN
IPS2550

IPS2550
RX3 RX3
COut2 Rx Rx COut2
12 5 (cos) (cos) 12
COS_SDA 5 COS_SDA
RX4 RX4
COut3 COut3
11 11
COSN 6 RTx1 Tx Tx RTx1 6 TX1 COSN
COut4 TX1 COut4
VDD1 VDD VDD2
10 7 RTx2 RTx2 7 TX2 10
VDD TX2
CVDD CTx2 CTx1 CTx1 CTx2 GND CVDD
9 8 8 9
GND VDDA VDDA
CVA CVA

© 2022 Renesas Electronics Corporation 43 March 11, 2022

 IPS2550 Datasheet

20. Application Examples

Typical coil and target arrangements are shown in Figure 27 to Figure 30: As examples, rotary designs for 1  360°, 2  180°, 3  120° and
4  90° are shown. Many other combinations (essentially any n x 360/n) are possible, where n is an integer number.
For example, in sensor designs for brushless DC rotor position feedback, n could be the number of pole pairs on the rotor. In such cases, the
output signal of the IPS2550 would be one electric period per each pole pair.
Note that multi-periodic designs improve the mechanical accuracy, compared to a one-periodic coil design. A 4-periodic coil design (4 × 90°)
has a typical mechanical accuracy of ±0.2% per 90° = ±0.18°

Figure 27. Coil Design and Signal Output for a 360° Rotary Sensor

Figure 28. Coil Design and Signal Output for a 2  180° Rotary Sensor

© 2022 Renesas Electronics Corporation 44 March 11, 2022

 IPS2550 Datasheet

Figure 29. Coil Design and Signal Output for a 3  120° Rotary Sensor

Figure 30. Coil Design and Signal Output for a 4  90° Rotary Sensor

21. Electromagnetic Compatibility (EMC)

Guidelines for EMC compliant circuit designs are available in a separate document “IPS2550 EMC recommendations” on request.

22. 16-TSSOP Package Outline Drawings

The package outline drawings are appended at the end of this document and are accessible from the link below. The package information is
the most current data available.
https://www.renesas.com/sg/en/document/psc/16-tssop-package-outline-drawing-50-x-44-mm-body-epad-27-x-33-mm-065mm-pitch-eng16p3

© 2022 Renesas Electronics Corporation 45 March 11, 2022

 IPS2550 Datasheet

23. Marking Diagram

23.1 Marking of Production Parts

Line 1: First characters of part code (IPS); “ES” is added for engineering samples
IPS Line 2: Next four characters of the part code (2550) followed by
D = Design revision
2550DE
E = Operation temperature range, Extended automotive
LOT
Line 3: “LOT” = Lot number
YYWW R Line 4: “YYWW” = Manufacturing date:
YY = last two digits of manufacturing year
WW = manufacturing week
R = RoHS compliant statement

24. Ordering Information

Orderable Part Number Description and Package MSL Rating Carrier Type Temperature
IPS2550DE1R 16-TSSOP with exposed pad, 4.4 5.0 mm 1 13” Reel, 4000 parts / reel -40° to +160°C
IPS2550STKIT IPS2550 Starter Kit including USB communication board, IPS2550 sensor module and connection cables

25. Revision History

Revision Date Description of Change
March 11, 2022  I2C default interface connection updated
 Output common mode failure description updated
 Figure 13, Figure 14, Figure 16, Figure 17, Figure 18, Figure 19, Figure 21, Table 11, Table 13, Table 21,Table
26 updated
January 11, 2022  Parameter descriptions VIH VIL corrected in Table 14 and Table 15
 COS Signal labeling corrected in Figure 27 to Figure 30
September 14, 2021 Reference updated in Programming Options section
September 8, 2021 Added description of output buffer overload protection in Table 11 and Table 26
June 24, 2021 Minor corrections throughout the document
June 2, 2021 Section 15.3.2 updated with hardware pin strapping information.
January 26, 2021 Initial release

© 2022 Renesas Electronics Corporation 46 March 11, 2022

 16-TSSOP, Package Outline Drawing
5.0 x 4.4 mm Body, Epad 2.7 x 3.3 mm 0.65mm Pitch
ENG16P3, PSC-4761-03, Rev 03, Page 1

© Renesas Electronics Corporation

 16-TSSOP, Package Outline Drawing
5.0 x 4.4 mm Body, Epad 2.7 x 3.3 mm 0.65mm Pitch
ENG16P3, PSC-4761-03, Rev 03, Page 2

Package Revision History

Date Created Rev No. Description
Aug 27, 2021 Rev 03 Turn Off AutoCad SHX Software Setting
Aug 13, 2021 Rev 02 Update Exposed pad tolerance.
April 2, 2020 Rev 01 Update Epad Shape.
Dec 4, 2019 Rev 00 Initial Release

© Renesas Electronics Corporation

1RWLFH
 'HVFULSWLRQVRIFLUFXLWVVRIWZDUHDQGRWKHUUHODWHGLQIRUPDWLRQLQWKLVGRFXPHQWDUHSURYLGHGRQO\WRLOOXVWUDWHWKHRSHUDWLRQRIVHPLFRQGXFWRUSURGXFWV
DQGDSSOLFDWLRQH[DPSOHV<RXDUHIXOO\UHVSRQVLEOHIRUWKHLQFRUSRUDWLRQRUDQ\RWKHUXVHRIWKHFLUFXLWVVRIWZDUHDQGLQIRUPDWLRQLQWKHGHVLJQRI\RXU
SURGXFWRUV\VWHP5HQHVDV(OHFWURQLFVGLVFODLPVDQ\DQGDOOOLDELOLW\IRUDQ\ORVVHVDQGGDPDJHVLQFXUUHGE\\RXRUWKLUGSDUWLHVDULVLQJIURPWKHXVHRI
WKHVHFLUFXLWVVRIWZDUHRULQIRUPDWLRQ
 5HQHVDV(OHFWURQLFVKHUHE\H[SUHVVO\GLVFODLPVDQ\ZDUUDQWLHVDJDLQVWDQGOLDELOLW\IRULQIULQJHPHQWRUDQ\RWKHUFODLPVLQYROYLQJSDWHQWVFRS\ULJKWVRU
RWKHULQWHOOHFWXDOSURSHUW\ULJKWVRIWKLUGSDUWLHVE\RUDULVLQJIURPWKHXVHRI5HQHVDV(OHFWURQLFVSURGXFWVRUWHFKQLFDOLQIRUPDWLRQGHVFULEHGLQWKLV
GRFXPHQWLQFOXGLQJEXWQRWOLPLWHGWRWKHSURGXFWGDWDGUDZLQJVFKDUWVSURJUDPVDOJRULWKPVDQGDSSOLFDWLRQH[DPSOHV
 1ROLFHQVHH[SUHVVLPSOLHGRURWKHUZLVHLVJUDQWHGKHUHE\XQGHUDQ\SDWHQWVFRS\ULJKWVRURWKHULQWHOOHFWXDOSURSHUW\ULJKWVRI5HQHVDV(OHFWURQLFVRU
RWKHUV
 <RXVKDOOQRWDOWHUPRGLI\FRS\RUUHYHUVHHQJLQHHUDQ\5HQHVDV(OHFWURQLFVSURGXFWZKHWKHULQZKROHRULQSDUW5HQHVDV(OHFWURQLFVGLVFODLPVDQ\
DQGDOOOLDELOLW\IRUDQ\ORVVHVRUGDPDJHVLQFXUUHGE\\RXRUWKLUGSDUWLHVDULVLQJIURPVXFKDOWHUDWLRQPRGLILFDWLRQFRS\LQJRUUHYHUVHHQJLQHHULQJ
 5HQHVDV(OHFWURQLFVSURGXFWVDUHFODVVLILHGDFFRUGLQJWRWKHIROORZLQJWZRTXDOLW\JUDGHV6WDQGDUGDQG+LJK4XDOLW\7KHLQWHQGHGDSSOLFDWLRQVIRU
HDFK5HQHVDV(OHFWURQLFVSURGXFWGHSHQGVRQWKHSURGXFW VTXDOLW\JUDGHDVLQGLFDWHGEHORZ
6WDQGDUG &RPSXWHUVRIILFHHTXLSPHQWFRPPXQLFDWLRQVHTXLSPHQWWHVWDQGPHDVXUHPHQWHTXLSPHQWDXGLRDQGYLVXDOHTXLSPHQWKRPH
HOHFWURQLFDSSOLDQFHVPDFKLQHWRROVSHUVRQDOHOHFWURQLFHTXLSPHQWLQGXVWULDOURERWVHWF
+LJK4XDOLW\ 7UDQVSRUWDWLRQHTXLSPHQW DXWRPRELOHVWUDLQVVKLSVHWF WUDIILFFRQWURO WUDIILFOLJKWV ODUJHVFDOHFRPPXQLFDWLRQHTXLSPHQWNH\
ILQDQFLDOWHUPLQDOV\VWHPVVDIHW\FRQWUROHTXLSPHQWHWF
8QOHVVH[SUHVVO\GHVLJQDWHGDVDKLJKUHOLDELOLW\SURGXFWRUDSURGXFWIRUKDUVKHQYLURQPHQWVLQD5HQHVDV(OHFWURQLFVGDWDVKHHWRURWKHU5HQHVDV
(OHFWURQLFVGRFXPHQW5HQHVDV(OHFWURQLFVSURGXFWVDUHQRWLQWHQGHGRUDXWKRUL]HGIRUXVHLQSURGXFWVRUV\VWHPVWKDWPD\SRVHDGLUHFWWKUHDWWR
KXPDQOLIHRUERGLO\LQMXU\ DUWLILFLDOOLIHVXSSRUWGHYLFHVRUV\VWHPVVXUJLFDOLPSODQWDWLRQVHWF RUPD\FDXVHVHULRXVSURSHUW\GDPDJH VSDFHV\VWHP
XQGHUVHDUHSHDWHUVQXFOHDUSRZHUFRQWUROV\VWHPVDLUFUDIWFRQWUROV\VWHPVNH\SODQWV\VWHPVPLOLWDU\HTXLSPHQWHWF 5HQHVDV(OHFWURQLFVGLVFODLPV
DQ\DQGDOOOLDELOLW\IRUDQ\GDPDJHVRUORVVHVLQFXUUHGE\\RXRUDQ\WKLUGSDUWLHVDULVLQJIURPWKHXVHRIDQ\5HQHVDV(OHFWURQLFVSURGXFWWKDWLV
LQFRQVLVWHQWZLWKDQ\5HQHVDV(OHFWURQLFVGDWDVKHHWXVHU VPDQXDORURWKHU5HQHVDV(OHFWURQLFVGRFXPHQW
 :KHQXVLQJ5HQHVDV(OHFWURQLFVSURGXFWVUHIHUWRWKHODWHVWSURGXFWLQIRUPDWLRQ GDWDVKHHWVXVHU VPDQXDOVDSSOLFDWLRQQRWHV*HQHUDO1RWHVIRU
+DQGOLQJDQG8VLQJ6HPLFRQGXFWRU'HYLFHVLQWKHUHOLDELOLW\KDQGERRNHWF DQGHQVXUHWKDWXVDJHFRQGLWLRQVDUHZLWKLQWKHUDQJHVVSHFLILHGE\
5HQHVDV(OHFWURQLFVZLWKUHVSHFWWRPD[LPXPUDWLQJVRSHUDWLQJSRZHUVXSSO\YROWDJHUDQJHKHDWGLVVLSDWLRQFKDUDFWHULVWLFVLQVWDOODWLRQHWF5HQHVDV
(OHFWURQLFVGLVFODLPVDQ\DQGDOOOLDELOLW\IRUDQ\PDOIXQFWLRQVIDLOXUHRUDFFLGHQWDULVLQJRXWRIWKHXVHRI5HQHVDV(OHFWURQLFVSURGXFWVRXWVLGHRIVXFK
VSHFLILHGUDQJHV
 $OWKRXJK5HQHVDV(OHFWURQLFVHQGHDYRUVWRLPSURYHWKHTXDOLW\DQGUHOLDELOLW\RI5HQHVDV(OHFWURQLFVSURGXFWVVHPLFRQGXFWRUSURGXFWVKDYHVSHFLILF
FKDUDFWHULVWLFVVXFKDVWKHRFFXUUHQFHRIIDLOXUHDWDFHUWDLQUDWHDQGPDOIXQFWLRQVXQGHUFHUWDLQXVHFRQGLWLRQV8QOHVVGHVLJQDWHGDVDKLJKUHOLDELOLW\
SURGXFWRUDSURGXFWIRUKDUVKHQYLURQPHQWVLQD5HQHVDV(OHFWURQLFVGDWDVKHHWRURWKHU5HQHVDV(OHFWURQLFVGRFXPHQW5HQHVDV(OHFWURQLFVSURGXFWV
DUHQRWVXEMHFWWRUDGLDWLRQUHVLVWDQFHGHVLJQ<RXDUHUHVSRQVLEOHIRULPSOHPHQWLQJVDIHW\PHDVXUHVWRJXDUGDJDLQVWWKHSRVVLELOLW\RIERGLO\LQMXU\
LQMXU\RUGDPDJHFDXVHGE\ILUHDQGRUGDQJHUWRWKHSXEOLFLQWKHHYHQWRIDIDLOXUHRUPDOIXQFWLRQRI5HQHVDV(OHFWURQLFVSURGXFWVVXFKDVVDIHW\
GHVLJQIRUKDUGZDUHDQGVRIWZDUHLQFOXGLQJEXWQRWOLPLWHGWRUHGXQGDQF\ILUHFRQWURODQGPDOIXQFWLRQSUHYHQWLRQDSSURSULDWHWUHDWPHQWIRUDJLQJ
GHJUDGDWLRQRUDQ\RWKHUDSSURSULDWHPHDVXUHV%HFDXVHWKHHYDOXDWLRQRIPLFURFRPSXWHUVRIWZDUHDORQHLVYHU\GLIILFXOWDQGLPSUDFWLFDO\RXDUH
UHVSRQVLEOHIRUHYDOXDWLQJWKHVDIHW\RIWKHILQDOSURGXFWVRUV\VWHPVPDQXIDFWXUHGE\\RX
 3OHDVHFRQWDFWD5HQHVDV(OHFWURQLFVVDOHVRIILFHIRUGHWDLOVDVWRHQYLURQPHQWDOPDWWHUVVXFKDVWKHHQYLURQPHQWDOFRPSDWLELOLW\RIHDFK5HQHVDV
(OHFWURQLFVSURGXFW<RXDUHUHVSRQVLEOHIRUFDUHIXOO\DQGVXIILFLHQWO\LQYHVWLJDWLQJDSSOLFDEOHODZVDQGUHJXODWLRQVWKDWUHJXODWHWKHLQFOXVLRQRUXVHRI
FRQWUROOHGVXEVWDQFHVLQFOXGLQJZLWKRXWOLPLWDWLRQWKH(85R+6'LUHFWLYHDQGXVLQJ5HQHVDV(OHFWURQLFVSURGXFWVLQFRPSOLDQFHZLWKDOOWKHVH
DSSOLFDEOHODZVDQGUHJXODWLRQV5HQHVDV(OHFWURQLFVGLVFODLPVDQ\DQGDOOOLDELOLW\IRUGDPDJHVRUORVVHVRFFXUULQJDVDUHVXOWRI\RXUQRQFRPSOLDQFH
ZLWKDSSOLFDEOHODZVDQGUHJXODWLRQV
 5HQHVDV(OHFWURQLFVSURGXFWVDQGWHFKQRORJLHVVKDOOQRWEHXVHGIRURULQFRUSRUDWHGLQWRDQ\SURGXFWVRUV\VWHPVZKRVHPDQXIDFWXUHXVHRUVDOHLV
SURKLELWHGXQGHUDQ\DSSOLFDEOHGRPHVWLFRUIRUHLJQODZVRUUHJXODWLRQV<RXVKDOOFRPSO\ZLWKDQ\DSSOLFDEOHH[SRUWFRQWUROODZVDQGUHJXODWLRQV
SURPXOJDWHGDQGDGPLQLVWHUHGE\WKHJRYHUQPHQWVRIDQ\FRXQWULHVDVVHUWLQJMXULVGLFWLRQRYHUWKHSDUWLHVRUWUDQVDFWLRQV
 ,WLVWKHUHVSRQVLELOLW\RIWKHEX\HURUGLVWULEXWRURI5HQHVDV(OHFWURQLFVSURGXFWVRUDQ\RWKHUSDUW\ZKRGLVWULEXWHVGLVSRVHVRIRURWKHUZLVHVHOOVRU
WUDQVIHUVWKHSURGXFWWRDWKLUGSDUW\WRQRWLI\VXFKWKLUGSDUW\LQDGYDQFHRIWKHFRQWHQWVDQGFRQGLWLRQVVHWIRUWKLQWKLVGRFXPHQW
 7KLVGRFXPHQWVKDOOQRWEHUHSULQWHGUHSURGXFHGRUGXSOLFDWHGLQDQ\IRUPLQZKROHRULQSDUWZLWKRXWSULRUZULWWHQFRQVHQWRI5HQHVDV(OHFWURQLFV
 3OHDVHFRQWDFWD5HQHVDV(OHFWURQLFVVDOHVRIILFHLI\RXKDYHDQ\TXHVWLRQVUHJDUGLQJWKHLQIRUPDWLRQFRQWDLQHGLQWKLVGRFXPHQWRU5HQHVDV
(OHFWURQLFVSURGXFWV
1RWH 5HQHVDV(OHFWURQLFVDVXVHGLQWKLVGRFXPHQWPHDQV5HQHVDV(OHFWURQLFV&RUSRUDWLRQDQGDOVRLQFOXGHVLWVGLUHFWO\RULQGLUHFWO\FRQWUROOHG
VXEVLGLDULHV
1RWH 5HQHVDV(OHFWURQLFVSURGXFW V PHDQVDQ\SURGXFWGHYHORSHGRUPDQXIDFWXUHGE\RUIRU5HQHVDV(OHFWURQLFV

5HY1RYHPEHU

&RUSRUDWH+HDGTXDUWHUV &RQWDFW,QIRUPDWLRQ
72<268)25(6,$7R\RVX )RUIXUWKHULQIRUPDWLRQRQDSURGXFWWHFKQRORJ\WKHPRVWXSWRGDWH
Corporate Headquarters
.RWRNX7RN\R-DSDQ Contact Information
YHUVLRQRIDGRFXPHQWRU\RXUQHDUHVWVDOHVRIILFHSOHDVHYLVLW
ZZZUHQHVDVFRP ZZZUHQHVDVFRPFRQWDFW
TOYOSU FORESIA, 3-2-24 Toyosu, For further information on a product, technology, the most up-to-date version
Koto-ku, Tokyo 135-0061, Japan of a document, or your nearest sales office, please visit:
7UDGHPDUNV
www.renesas.com www.renesas.com/contact/
5HQHVDVDQGWKH5HQHVDVORJRDUHWUDGHPDUNVRI5HQHVDV(OHFWURQLFV
&RUSRUDWLRQ$OOWUDGHPDUNVDQGUHJLVWHUHGWUDGHPDUNVDUHWKHSURSHUW\
RIWKHLUUHVSHFWLYHRZQHUV

Trademarks
Renesas and the Renesas logo are trademarks of Renesas Electronics
Corporation. All trademarks and registered trademarks are the property of
their respective owners.

‹205HQHVDV(OHFWURQLFV&RUSRUDWLRQ$OOULJKWVUHVHUYHG