Table of contents

S. No. Name of Experiments Page No.

1 Introduction to digital electronics lab nomenclature of digital ICs, 7- 10

specification, study, study of the datasheet, concept of Vcc and
ground, verification of the truth table of logic gate using TTL ICs.
2 Implementation of the given Boolean function using logic gates in 11-13
both SOP and POS forms
3 Implementation and verification truth table of half Adder and Full 14-15
Adder.
4 To verify the operation of comparator. 16 - 18
5 To verify the operation of 4x1 multiplexer & Demultiplexer 19 - 22
6 To verify the truth tables of S-R, J-K, T & D type flip flops. 23-26
7 Design and verify the 4 bit Encoder(Binary to Gray code converter) 27-28
8 29-30
Design and Verify Code Converter (BCD to EXCESS-3).

9 21 - 32
Design and verify the 4-bit synchronous counter

10 33 - 35
To verify the operation of shift registers

2
Introduction to the equipments and resources of lab

List of equipments and resources:

1). Digital trainer kit.
2). Bread board.
3). Digital Integrated circuits.
4). Connecting wires.

The Breadboard (Introduction)

The breadboard consists of two terminal strips and two bus strips (often broken in the centre).
Each bus strip has two rows of contacts. Each of the two rows of contacts is a node. That is, each
contact along a row on a bus strip is connected together (inside the breadboard). Bus strips are
used primarily for power supply connections, but are also used for any node requiring a large
number of connections. Each terminal strip has 60 rows and 5 columns of contacts on each side
of the centre gap. Each row of 5 contacts is a node.
You will build your circuits on the terminal strips by inserting the leads of circuit components
into the contact receptacles and making connections with 22-26 gauge wire. There are wire
cutter/strippers and a spool of wire in the lab. It is a good practice to wire +5V and 0V power
supply connections to separate bus strips.

Fig.1 The breadboard, the lines indicate connected holes

The 5V supply must not be exceeded since this will damage the ICs (Integrated circuits) used
during the experiments. Incorrect connection of power to the ICs could result in exploding or
becoming very hot - with the possible serious injury occurring to the people working on the
experiment. Ensure that the power supply polarity and all components and connections are
correct before switching on power.

Connecting the Circuit: Throughout these experiments we will use TTL chips to build
circuits. The steps for wiring a circuit should be completed in the order described below:
a) Turn the power (Trainer Kit) off before you build anything.
b) Make sure the power is off before you build anything.

3
c) Connect the +5V and ground (GND) leads of the power supply to the power and
ground bus strips on the breadboard.
d) Plug the chips you will be using into the breadboard. Point all the chips in the same
direction with pin 1 at the lower-left corner (Pin 1 is often identified by a dot or a notch
next to it on the chip package).
e) Connect +5V and GND pins of each chip to the power and ground bus strips on the
breadboard.
f) Select a connection on your schematic and place a piece of hook-up wire between
corresponding pins of the chips on your breadboard. It is better to make the short
connections before the longer ones.
g) Get one of your group members to check the connections, before you turn the power
on.
h) If an error is made and is not spotted before you turn the power on, Then turn the
power off immediately before you begin to rewire the circuit.
i) At the end of the laboratory session, collect the wires, chips and all equipment and
return them to the demonstrator.
j) Tidy the area that you were working in and leave it in the same
condition as it was before you started.

Common Causes of Problems:

a) Not connecting the ground and/or power pins for all chips.
b) Leaving out wires.
c) Plugging wires into the wrong holes.
d) Driving a single gate input with the outputs of two or more gates. Modifying the circuit
while the power is on.
In all experiments, you will be expected to obtain all instruments, leads, components at the start
of the experiment and return them to the demonstrator proper place after you have finished the
experiment. Please inform the demonstrator or technician if you locate faulty equipment. If you
damage a chip, inform a demonstrator, don't put it back in the box of chips for somebody else to
use.

Example Implementation of a Logic Circuit:

Build a circuit to implement the Boolean function F = /(/A./B), please note that the notation /A
refers to . You should use that notation during the write-up of your laboratory experiments.

Fig. 2 The complete designed and connected circuit

4
 Sometimes the chip manufacturer may denote the first pin by a small circle above the first
pin of the chip. Place your chips in the same direction, to avoid confusion at a later stage.
Remember that you must connect power to the chips to get them work.

Some of the and their IC pin details:-

7400(NAND) 7402(NOR)

7404(NOT) 7408(AND)

7411(3-i/p AND) 7486(EX-OR)

5
 7410(3 i/p NAND) 7485 4-bit comparator

7476 JK Flip-Flop 7483 4-Bit Adder

Quad 2 Input 7400 Hex 7404 Inverter

Quad 2 Input 7432

6
 Experiment No. 1

Objective: Introduction to digital electronics lab nomenclature of digital ICs, specification, study,
study of the datasheet, concept of Vcc and ground, verification of the truth table of logic gate using
TTL ICs.

Apparatus Required: ICs 7408, 7432, 7404, 7400, 7402, 7486, Breadboard, Digital Trainer Kit,
Connecting wires, etc.

Fig. 1.1 Actual Photograph of the kit

Theory: There are many different types of logic in electronics, where gates are
made up of many different devices such as diodes, relays, transistors, and most importantly,
integrated circuits (ICs). Different types of logic gates including their output truth tables when
two Boolean inputs exist i.e. combination of input and their corresponding outputs of logic gates
can be represented by truth table. Given below is the various types of logic gates used in Digital
Electronics.

AND Gate
Fig 1.2 shows the circuit symbol and truth table of the AND gate.

Fig. 1.2 Circuit symbol and truth table of And gate.

7
OR Gate

Fig 1.3 shows the circuit symbol and truth table of the OR gate.

Fig. 1.3 Circuit symbol and truth table of OR gate.

NOR Gate

Fig 1.4 shows the circuit symbol and truth table of the NOR gate.

Fig. 1.4 Circuit symbol and truth table of NOR gate.

XNOR Gate

Fig 1.5 shows the circuit symbol and truth table of the XNOR gate.

Fig. 1.5 Circuit symbol and truth table of XNOR gate.

8
NAND Gate

Fig 1.6 shows the circuit symbol and truth table of the NAND gate.

Fig. 1.6 Circuit symbol and truth table of NAND gate.

XOR Gate
Fig 1.7 shows the circuit symbol and truth table of the XOR gate.

Fig. 1.7 Circuit symbol and truth table of XOR gate.

NOT Gate

Fig 1.8 shows the circuit symbol and truth table of the NOT gate.

9
 Fig. 1.8 Circuit symbol and truth table of NOT gate.

Procedure:
a. Verify the gates.
b. Switch on VCC and apply various combinations of input according to truth table.
c. For various inputs verify the corresponding output of the truth table with the help of logic
probe.
d. Perform the above steps to study all the gates using their corresponding ICs.

Result: All logic gates have been successfully studied and their truth tables have been verified.

Precautions:
a. Connect all the components properly.
b. Place ICs and other components on breadboard on their proper position.
c. Ensure connections are tight.
d. Ensure power supply at its proper position and proper value according to ICs.
e. Ensure power supply is switched off before placing and connecting the components on the
breadboard.
f. Pins of ICs should not be bent or broken. While inserting and removing it from the bread
board.
g. Make sure that power supply of the trainer board does not get short.

10
 Experiment No. 2

Objective: Implementation of the given Boolean function using logic gates in both SOP and
POS forms.

Apparatus Required: IC7432, IC7404, IC7408, Breadboard, Digital Trainer Kit,

Connecting wires, etc.

Fig. 2.1 Actual Photograph of the kit

Theory: The Boolean variables are either in complemented or in un- complemented form and
the terms are arranged in one of the two standard forms of Boolean functions.
1) Sum of product form (SOP)
2) Product of sum form (POS)

Implementation of sum of product form:

Let us consider following Boolean algebra and its logic circuit and truth is given in Fig: 2.2

Logic Diagram

11
 Truth Table

A B Output
0 0 0
0 1 1
1 0 1
1 1 1

Fig. 2.2 Circuit and truth table of SOP form.

Implementation of product of sum form:

Let us consider following Boolean algebra and its logic circuit and truth is given in Fig:

Logic Diagram

Truth Table
A B Output
0 0 0
0 1 0
1 0 0
1 1 1

Fig. 2.3 Circuit and truth table of POS form.

Procedure:
a. Make the connections as per the circuit diagram.
b. Switch on VCC and apply various combinations of input according to truth
table.
c. Verify the truth table of both the circuits.

12
Result: The logic diagram and truth table of the given Boolean expression have beensuccessfully
verified.

Precautions:
a. Connect all the components properly.
b. Place ICs and other components on breadboard on their proper position.
c. Ensure connections are tight.
d. Ensure power supply at its proper position and proper value according to ICs.
e. Ensure power supply is switched off before placing and connecting the components onthe
breadboard.
f. Pins of ICs should not be bent or broken. While inserting and removing it from thebread
board.
g. Make sure that power supply of the trainer board does not get short.
 EXPERIMENT NO. 3

Objective: Implementation and verification truth table of half Adder and Full Adder.

Apparatus Required: IC7432, IC7404, IC7408, Breadboard, Digital Trainer Kit,

Connecting wires.
Theory:

HALF ADDER
The half adder add two input bits and generate carry and sum which are the two outputs of half-
adder. The input variables of the half adder are called the augend and the addend bits. The output
variables are the sum and carry.

Diagram: Truth table:

A B Sum Carry
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1

Expression:
S = A.B’ + A’.B
C = A.B
FULL ADDER
A full-adder adds binary numbers and accounts for values carried in as well as out. A
one-bit full adder adds three one-bit numbers, often written as A, B and Cin; A and B are
the operands, and Cin is a bit carried in from the next less significant stage. The full adder
is usually a component in a cascade of adders, which adds 8, 16, 32, etc. bit binary
numbers.

Diagram: Truth Table:

A B Cin S Cout
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
Expression:
S = (A.B’ + A’.B).Cin’ + (A.B’ +
A’.B)’.CinCout = A.B + B.C + C.A

Procedure:
a. Verify the gates.
b. Switch on VCC and apply various combinations of input according to truth table.
c. For various inputs verify the corresponding output of the truth table with the help of logic
probe.
d. Perform the above steps to study all the gates using their corresponding ICs.

Result: Half adder and Full adder have been designed and verified.

Precautions:
a. Connect all the components properly.
b. Place ICs and other components on breadboard on their proper position.
c. Ensure connections are tight.
d. Ensure power supply at its proper position and proper value according to ICs.
e. Ensure power supply is switched off before placing and connecting the components on
the breadboard.
f. Pins of ICs should not be bent or broken. While inserting and removing it from the
bread board.
g. Make sure that power supply of the trainer board does not get short.

15
 Experiment No. 4

Objective: To verify the operation of magnitude comparator.

Apparatus Required: IC 7486, IC 7432, IC 7408, IC 7400 and IC 7485, Breadboard,

Digital Trainer Kit, Connecting wires.

Fig. 4.1 Actual Photograph of the kit

Theory:
Magnitude Comparator:

Magnitude Comparator compares two binary data signals A and B and generates the results of
comparison in form of three output signals A>B, A=B, A<B. IC 7485 is a 4-bit comparator.

Definition:
A magnitude comparator is a combinational circuit that compares two numbers
A and B to Determine.
i. A > B, or
ii. A = B, or
iii. A < B
Inputs:-
1) First n-bit number A
2) Second n-bit number B
Outputs:-
3 output signals (GT, EQ, and LT), where:

1) GT = 1 if A > B
2) EQ = 1 if A = B
3) LT = 1 if A < B

16
 Example: One bit Comparator

Fig. 4.2 One bit comparator and its truth table

Procedure:
a. Place the IC’s on the bread board provided on kit.
b. Make the connections as per the circuit diagram.
c. Switch on power.
d. Apply different combinations of input and verify the outputs.
e. The readings of outputs should be tabulated.
f. Now verify the truth table of the magnitude comparator.

Pin diagram & truth table:

IC Diagram

17
Truth Table:

Comparing Inputs Outputs

A3 , B3 A2 , B2 A1 , B1 A0 , B0 A>B A = A<B
B
A3 > B3 X X X 1 0 0
A3 < B3 X X X 0 0 1
A3 = B3 A2 > B2 X X 1 0 0
A3 = B3 A2 < B2 X X 0 0 1
A3 = B3 A2 = B2 A1 > B1 X 1 0 0
A3 = B3 A2 = B2 A1 < B1 X 0 0 1
A3 = B3 A2 = B2 A1 = B1 A0 > B0 1 0 0
A3 = B3 A2 = B2 A1 = B1 A0 < B0 0 0 1
A3 = B3 A2 = B2 A1 = B1 A0 = B0 0 1 0

Fig. 4.3 pin diagram of IC 7485 4-bit comparator and its truth table

Result: The truth table of the magnitude comparator has been successfully verified.

Precautions:

a. Connect all the components properly.

b. Place ICs and other components on breadboard on their proper position.
c. Ensure connections are tight.
d. Ensure power supply at its proper position and proper value according to ICs.
e. Ensure power supply is switched off before placing and connecting the
components on the breadboard.
f. Pins of ICs should not be bent or broken. While inserting and removing it from the bread
board.
g. Make sure that power supply of the trainer board does not get short.

18
 Experiment No. 5

Objective: To verify the operation of 4x1 multiplexer & Demultiplexer.

Apparatus Required: IC7404, IC7411, IC7432, connecting wires, Digital Trainer,

Multiplexer-Demultiplexer kit.

Theory:
Multiplexer- The multiplexer shortened to “MUX” is a combinational logic circuit designed
to switch one of several input lines to a single common output line by the application of a control
logic. In digital electronics, multiplexers are also known as data selectors because they can
“select” each input line.
Generally, the selection of each input line in a multiplexer is controlled by an additional set of
inputs called control lines or selection lines and according to the binary condition of these
control inputs, either “HIGH” or “LOW” the appropriate data input is connected directly to the
output. Normally, a multiplexer has an even number of 2N data input lines and “N”number of
“control” inputs that correspond with the number of data inputs.

Fig. 5.1 Block diagram of 2N:1 MUX

4 :1 MUX
A 4-to-1 multiplexer has a four input (D0 to D3), two selection lines (S1 and S0) and single
output (Y).

Fig. 5.2 Block Diagram of 4:1 MUX

19
 Fig. 5.3 Logic Diagram of 4:1 MUX

𝑌 = 𝑆̅1 𝑆̅0 0 + 𝑆̅1 𝑆0 𝐷1 + 𝑆1 𝑆̅0 𝐷2 + 𝑆1 𝑆0 𝐷3

Truth Table

Demultiplexer- A demultiplexer shortened to “DeMUX” is a device that takes a single input

line and routes it to one of several digital output lines. A demultiplexer of 2n outputs has “n”
select lines, which are used to select which output line to send the input. A demultiplexer is also
called a data distributor.

Fig. 5.4 Block Diagram of 1:2N DeMUX

1:4 DeMUX

A 1-to-4 demultiplexer has a single input (Din), two selection lines (S1 and S0) and four outputs
(Y0 to Y3). The input data goes to any one of the four outputs at a given time for a particular
combination of select lines.

20
 Fig. 5.5 Block Diagram of 1:4DeMUX

S1 S0

Fig. 5.6 Logic Diagram of 1:4 DeMUX

Truth Table

Result: Truth Tables of multiplexer & Demultiplexer have been verified.

21
Procedure:
a. Connect all the components properly.
b. Place ICs and other components on breadboard on their proper position.
c. Ensure connections are tight.
d. Ensure power supply at its proper position and proper value according to ICs.
e. Ensure power supply is switched off before placing and connecting the
components on the breadboard.
f. Pins of ICs should not be bent or broken. While inserting and removing it from the bread
board.
g. Make sure that power supply of the trainer board does not get short.

22
Precautions:

2. Place IC on proper position and connect all the components properly.

3. Connections should be tight.
4. Power supply should be switched off before making connections.
5. Pins of IC should not be bent while inserting and removing from Bread board.

23
 Experiment No.6

Objective: Verification of state tables of RS, JK, T and D flip-flops using NAND and NOR
gates.

Apparatus Required: IC 7402, IC 7408, IC 7400, Breadboard, Digital Trainer Kit,

Connecting wires.

Fig. 6.1 Actual Photograph of the kit

Theory:
Flip Flop- A flip-flop is a circuit that has two stable states and can be used to store state
information. The circuit can be made to change state by signals applied to one or more control
inputs and will have two outputs. A circuit incorporating flip-flops has the attribute of state; its
output depends not only on its current input, but also on its previous inputs. Such a circuit is
described as sequential logic.

Flip-flop types -Flip-flop can be divided into common types: the RS ("reset-set"), D ("data"
or "delay"), T ("toggle"), and JK types are the common ones.

SR Flip Flop: The clocked RS latch or flip flop circuit is very similar in operation to the basic
latch. The S and R inputs are normally at logic 0, and must be changed to logic 1 to change the
state of the latch. However, with the third input, a new factor has been added. This input is
typically designated C or CLK, because it is typically controlled by a clock circuit of some sort,
which is used to synchronize several of these latch circuits with each other. The output can only
change state while the CLK input is logic 1. When CLK is logic 0, the S and R inputs will have
no effect.

24
 Fig 6.2 Circuit symbol and truth table SR flip flop.

Fig 6.3 Circuit symbol and truth table JK flip flop

In most ways, the JK flip-flop behaves just like the RS flip-flop. The Q and Q' outputs will only
change state on the falling edge of the CLK signal, and the J and K inputs will control the future
output state pretty much as before. However, there are some important differences. If both the J
and K inputs are held at logic 1 and the CLK signal continues to change, the Q and Q' outputs
will simply change state with each falling edge of the CLK signal. (The master latch circuit will
change state with each rising edge of CLK.) We can use this characteristic to advantage in a
number of ways. A flip-flop built specifically to operate this way is typically designated as a T
(for Toggle) flip-flop. The alone T input is in fact the CLK input for other types of flip-flops.

25
 Fig 6.4 Circuit symbol and truth table T Flip Flop

T flip-flop are similar to JK flip-flop. T flip-flop are single input version of JK flip-flops. This
modified form of JK flip-flop is obtained by connecting both inputs J and K together. This flip-
flop has only one input along with Clock pulse. These flip-flops are called T flip-flop because of
their ability to complement its state (i.e.) Toggle. So they are called as Toggle flip-flop.

Fig 6.5 Circuit symbol and truth table D Flip Flop

The D flip-flop is that when the clock input falls to logic 0 and the outputs can change state, the
Q output always takes on the state of the D input at the moment of the clock edge. This was not
true of the RS and JK flip-flops. The RS master section would repeatedly change states to match
the input signals while the clock line is logic 1, and the Q output would reflect whichever input
most recently received an active signal. The JK master section would receive and hold an input
to tell it to change state, and never change that state until the next cycle of the clock. This
behavior is not possible with a D flip-flop.

26
Procedure:

a. Make connections as shown in figure for each flip flop one by one (Refer pin diagram ofICs )
b. Connect +5V to pin no. 14 and ground to pin no. 7 of ICs.
c. Connect pulsar switch output to clock input CP of flip flop.
d. Connect input 1 or 0 to inputs of the flip flops as per truth table shown.
e. Switch on the instrument.
f. Press pulsar switch to get output.
g. Verify outputs on 8 bits LED display or logic probe.
h. Repeat above steps 4, 5, 6 for other input combinations.
i. Verify Truth Table.

Result: Studied and verified all the flip flop truth table.

Precautions:

a. Connect all the components properly.

b. Place ICs and other components on breadboard on their proper position.
c. Ensure connections are tight.
d. Ensure power supply at its proper position and proper value according to ICs.
e. Ensure power supply is switched off before placing and connecting the components onthe
breadboard.
f. Pins of ICs should not be bent or broken, while inserting and removing it from the breadboard.
g. Make sure that power supply of the trainer board does not get short.
 EXPERIMENT NO. 7

Objective: Design and verify the 4 bit Encoder (Binary to Gray code converter)

Theory:

GRAY CODE
The reflected binary code, also known as Gray Code is a binary numerical system where two
successive values differ in only one bit. It is a non-weighted code.

Truth Table:
Input Output
BINARY GRAY
0000 0000
0001 0001
0010 0011
0011 0010
0100 0110
0101 0111
0110 0101
0111 0100
1000 1100
1001 1101

Result: Binary to Gray Code Converter is verified.

Procedure:
h. Connect all the components properly.
i. Place ICs and other components on breadboard on their proper position.
j. Ensure connections are tight.
k. Ensure power supply at its proper position and proper value according to ICs.
l. Ensure power supply is switched off before placing and connecting the
components on the breadboard.
m. Pins of ICs should not be bent or broken. While inserting and removing it from the breadboard.
n. Make sure that power supply of the trainer board does not get short.
 Precautions:

a. Connect all the components properly.

b. Place ICs and other components on breadboard on their proper position.
c. Ensure connections are tight.
d. Ensure power supply at its proper position and proper value according to ICs.
e. Ensure power supply is switched off before placing and connecting the components on
the breadboard.
f. Pins of ICs should not be bent or broken, while inserting and removing it from the
bread board.
g. Make sure that power supply of the trainer board does not get short.
 EXPERIMENT NO. 8

Objective: D e s i g n a n d V e r i f y Code Converter (BCD to EXCESS-3).

Theory:

EXCESS-3 CODE
Excess-3 code is obtained by adding 3 to the BCD number. Excess-3 code is an unweighted
code.

Truth Table:
Input Output
BCD EXCESS-3
0000 0011
0001 0100
0010 0101
0011 0110
0100 0111
0101 1000
0110 1001
0111 1010
1000 1011
1001 1101

Result: BCD to EXCESS-3 Code Converter is verified

Procedure:
a. Connect all the components properly.
b. Place ICs and other components on breadboard on their proper position.
c. Ensure connections are tight.
d. Ensure power supply at its proper position and proper value according to ICs.
e. Ensure power supply is switched off before placing and connecting the
components on the breadboard.
f. Pins of ICs should not be bent or broken. While inserting and removing it from the breadboard.
g. Make sure that power supply of the trainer board does not get short.
 Precautions:
a. Connect all the components properly.
b. Place ICs and other components on breadboard on their proper position.
c. Ensure connections are tight.
d. Ensure power supply at its proper position and proper value according to ICs.
e. Ensure power supply is switched off before placing and connecting the components on
the breadboard.
f. Pins of ICs should not be bent or broken, while inserting and removing it from the
bread board.
g. Make sure that power supply of the trainer board does not get short.

Experiment No. 9

Objective: Design and verify the 4-bit synchronous counter.

Apparatus Required: IC 7476, IC7408, IC7404, IC7400, Breadboard, Digital trainer kit,
Connecting wires, Power supply etc.

Fig. 8.1 Actual Photograph of the kit

Theory:
Synchronous Counters: In synchronous counters, the clock inputs of all the flip-flops are
connected together and are triggered by the input pulses. Thus, all the flip-flops change state
simultaneously (in parallel). The circuit below is a 4-bit synchronous counter. The J and K
inputs of FF0 are connected to HIGH. FF1 has its J and K inputs connected to the output of FF0,
and the J and K inputs of FF2 are connected to the output of an AND gate that is fed by the
outputs of FF0 and FF1.
Pay attention to what happens after the 3rd clock pulse. Both outputs of FF0 and FF1 are
HIGH. The Positive edge of the 4th clock pulse will cause FF2 to change its state due to the
AND gate. The count sequence for the 3-bit counter is shown on the right. The most important
advantage of synchronous counters is that there is no cumulative time delay because all flip-
flops are triggered in parallel. Thus, the maximum operating frequency for this counter will be
significantly higher than for the corresponding ripple counter.
 Fig. 8.2 4-bit synchronous UP counter

Truth Table (Down Counter) Truth Table (Up Counter)

Input Output Input Output

Clock QD QC QB QA Clock QD QC QB QA
0 1 1 1 1 0 0 0 0 0
1 1 1 1 0 1 0 0 0 1
2 1 1 0 1 2 0 0 1 0
3 1 1 0 0 3 0 0 1 1
4 1 0 1 1 4 0 1 0 0
5 1 0 1 0 5 0 1 0 1
6 1 0 0 1 6 0 1 1 0
7 1 0 0 0 7 0 1 1 1
8 0 1 1 1 8 1 0 0 0
9 0 1 1 0 9 1 0 0 1
10 0 1 0 1 10 1 0 1 0
11 0 1 0 0 11 1 0 1 1
12 0 0 1 1 12 1 1 0 0
13 0 0 1 0 13 1 1 0 1
14 0 0 0 1 14 1 1 1 0
15 0 0 1 0 15 1 1 1 1

Fig 8.3 Truth table of Synchronous UP & DOWN counter

Procedure:
a. Connections make the as per the circuit diagram. (Refer pin diagram of ICs)
b. Clock pulses are applied one by one at the clock I/P and the O/P Observed at
QA, QB, QC and QD for IC 7476.
c. Verify outputs on 8 bits LED display.
d. Verify the truth table of 4 bit synchronous counter.
Result: Study and verified the operation of the synchronous Counter.

Precautions:
a. Connect all the components properly.
b. Place ICs and other components on breadboard on their proper position.
c. Ensure connections are tight.
d. Ensure power supply at its proper position and proper value according to ICs.
e. Ensure power supply is switched off before placing and connecting the
components onthe breadboard.
f. Pins of ICs should not be bent or broken. While inserting and removing it from
the breadboard.
g. Make sure that power supply of the trainer board does not get short.

34
 Experiment No. 10

Objective: To verify the operation of shift registers.

Apparatus Required: Digital IC trainer kit, IC 7476, IC 7408

Theory:
Registers are simply a group of flip flops that can be used to store a binary number. A shift
register is nothing but a register which can accept binary number and shift it. The data can be
entered in the shift register either in serial or in parallel. The output can be taken either in serial
or in parallel. Since there are two ways to shift data in to a register and two ways to shift data out
of the register four types of registers can be constructed.

1. Serial In Serial Out (SISO)

2. Serial In Parallel Out (SIPO)

35
 3. Parallel In Parallel Out (PIPO)

4. Parallel In Serial Out (PISO)

Serial input shift register (SISO+SIPO): As its name suggests serial input shift register allows
data to enter serially. The output data can be available in parallel or serial

36
 Serial output shift register (SISO+PISO using mode control): As its name suggests serial
output shift register allows data to out serially. The input data can be available in parallel or
serial

Procedure:
a. Test all the components using multimeter and digital IC tester

b. Set up serial input shift register using D FF. Clear all FF using clear pin. Feed 1011 to the
serial input starting from LSB using the PRESET and CLEAR pins.

Result: The performance of shift registers using D FF are set up and studied
Precautions:

a. Connect all the components properly.

b. Place ICs and other components on breadboard on their proper position.
c. Ensure connections are tight.
d. Ensure power supply at its proper position and proper value according to ICs.
e. Ensure power supply is switched off before placing and connecting the components on
the breadboard.
f. Pins of ICs should not be bent or broken, while inserting and removing it from the
bread board.
g. Make sure that power supply of the trainer board does not get short.

37
38