MPC Circ Currents
MPC Circ Currents
net/publication/350744558
Circulating Current Control for the Modular Multilevel Matrix Converter Based
on Model Predictive Control
Article in IEEE Journal of Emerging and Selected Topics in Power Electronics · April 2021
DOI: 10.1109/JESTPE.2021.3071964
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sort of self-tuning algorithm is required (see [18], [19]). successfully integrated into the control system. However, the
In addition to the requirement for satisfactory reference- implementation of the saturation scheme was not comprehen-
tracking with high-bandwidth for the circulating current con- sively analysed , and validation of the proposed methodology
trol, a saturation scheme should be included to ensure effective was realised only by simulation.
protection of the converter. The total current in each arm of As reported in previous publications, the control of modular
the M3C has several components, i.e a contribution from the multilevel converters for drive applications is typically realised
input and output currents, and a contribution from each of the utilising different control algorithms for different operating
four circulating currents. Additionally, the circulating currents points of the electrical machine. For instance, in [28], the
usually have (at least) two frequency components and they control of the Modular Multilevel Converter (M2C) is divided
could have both positive and negative sequences. Therefore, into the Low-Frequency Mode (LFM) and the High-Frequency
as demonstrated in Section V.A.3, it is very challenging to Mode (HFM) [28]. In the LFM, the addition of common
implement protection algorithms for the total arm currents mode voltage is usually required as well as the utilisation of
and cluster voltages, which are required, for instance, to mitigation currents. A similar separation of control algorithms
ensure that the thermal limit of the devices in each arm is is utilised for the M3C, where the control system is usually
not exceeded. The arm current control schemes reported in divided into the Different Frequency Mode (DFM) and Equal
the literature saturate each voltage and current component Frequency Mode (EFM) (see [5], [15], [17]). Again in the
separately, e.g. saturating the input current vector, output EFM, common mode voltages and mitigation currents are
current vector, positive and negative sequence components of required. Nevertheless, is should emphasised that in a drive
the circulating currents etc. using heuristic criterion [15], [2], applications, e.g. when the M3C drives a high power induction
[16]. This is certainly a sub-optimal solution because limiting machine, the DFM represents most of the machine operating
each component independently does not ensure that the arm range (see [5], [15], [13]).
current or voltage is adequately limited or, conversely, fully In this paper a new CCS-MPC algorithm is presented, where
exploited. the scheme is designed to regulate the circulating current in the
Recently, the application of Model Predictive Control M3C during DFM Operation [15], using a State Space Model
(MPC) schemes for the control of power electronic converters (SSM) approach [16], [29]. This approach allows a linear
and drives has been reported in the literature. Most of the representation of the M3C using state variables, simplifying
proposed algorithms are based on Finite-control set MPC the incorporation of the constraints (for instance the current
(FCS-MPC) and, more recently, Continuous-Control Set MPC limits) into the CCS-MPC strategy. To solve the CCS-MPC
(CCS-MPC) methodologies have been reported [20], [21], problem, an active-set algorithm [30], [31] is integrated into
[22], [23], [24]. A well-known advantage of MPC algorithms the proposed scheme. The benefits of the proposed MPC
is the straightforward integration of system non-linearities and are its straightforward implementation, due to the simple and
strong constraints into the scheme [4], [25]. However, when linear nature of the circulating current dynamic relationships,
applied to MMCs, FCS-MPC strategies have an unfeasible and its low computational complexity. Furthermore, although
computational burden, due to the very large number of switch- input/output port current regulation is not included in the
ing states [20] available in a typical M3C. For this reason, proposed MPC scheme, saturation limiting of the arm currents
modified FCS-MPC algorithms for MMC applications have by adjusting the circulating currents alone is successfully
been proposed, with a restricted number of switching states addressed and it affects neither the input nor output port
at each sampling time to limit the searching space and to currents. To the best of the authors’ knowledge, this control
reduce the computational burden. This approach complicates strategy approach has not been previously reported in the
the analysis and implementation of the algorithm and does literature.
not ensure an optimal solution. Moreover, another drawback Summarising, the main contributions of this work are:
of FCS-MPC is the variable switching frequency. Consider- • A new CCS-MPC implementation for regulating the
ing these disadvantages, there has been little discussion of circulating currents of the M3C including constraints is
the applications of FCS-MPC to M3C in the literature (see presented, fully analysed and experimentally validated.
[26]) and no experimental results have been reported for this • A saturation (protection) scheme is integrated with the
methodology. proposed CCS-MPC algorithm to avoid operating with
Regarding CCS-MPC strategies, in [27] it is reported an currents and voltages outside the predefined limits. A
optimising approach for regulating the capacitor voltage os- suitable Active Set Algorithm is programmed to achieve
cillations of the M3C. This strategy is based on a cascaded these goals. Experimental validation is provided.
(two step) optimisation methodology, where the manipulated • The protection scheme, which solely adjusts the cir-
variables are the common-mode voltage and the circulating culating currents, is hidden from the input and output
current references. The performance of the proposed scheme is port voltages and currents. Therefore, the port control
good and it gives an adequate dynamic performance. However, performance is unaffected on both sides.
the two-step optimisation methodology does not necessarily Other applications are also feasible considering that regulation
produce a globally optimal operating point. Therefore it has of the arm currents and circulating currents are also required
the disadvantage of reaching sub-optimal solutions. Another in other converter topologies such as, for instance, the M2C
reported implementation of CCS-MPC for M3C applications (see [13], [29]). Therefore the MPC strategy proposed in this
is discussed in [16]. In this publication a saturation scheme is work could be modified to address other challenges.
JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, 2021 3
4
4
Fig. 2. Overall control scheme for the Modular Multilevel Matrix Converter
(M3C).
with relatively low bandwidth PI controllers, implemented the TMS320C6713 control board utilised to obtain the exper-
with anti-windup schemes and saturation values of ±Isat ε imental results discussed in this work. The integration of the
(see [9]). The reference frames for balancing ψCαβ1 , ψCαβ2 , bounds as inequality constraints in the MPC scheme enables a
ψCε12 and ψCε34 , are orientated along v2c , v1˙, v1c and ˙ v2 , saturation (protection) scheme for the power converter, where
˙ ˙ the
˙respectively;˙ additionally, for balanced operation, ˙ set-point
˙ the circulating currents are modified when a limit is reached.
values of all complex energy terms have to be set to zero. The target of the saturation scheme is to maintain the arm
Fig. 3(b) illustrates the Balancing Control Scheme, where currents and cluster output voltages within predefined limits
iε =[iε1 iε2 iε3 iε4 ] is the vector form of the four circulating even when the converter is operating under rapid transient
currents, and θ1 with θ2 are the angles of the output voltage conditions.
rotating vectors v1 and v2 respectively. In the approach presented here, the MPC scheme only
˙ ˙ considers the circulating currents. Whilst it may be possible
B. Arm Current Control
to include input/output port current regulation as well, a
Arm current control has also two goals: to regulate the in- scheme using only the circulating currents has a number
put/output port currents and to regulate the circulating currents. of attractive features which make it equally worthwhile to
The dynamics of the input/output current control loops are consider. These include the natural high bandwidth response,
dependent on the external systems connected to the converter, successful arm current saturation (with a straightforward im-
whereas the circulating current controllers are decoupled and plementation) during transients, and a reduced computational
are independent of whatever is connected to the input/output burden in comparison to an MPC scheme using the nine
ports. arm currents. Additionally, arm current/voltage saturation is
1) Input/Output Port Current Control: In this work, two optimally achieved without affecting the input/output port cur-
balanced grids are connected to the uvw and rst input/output rents, which can be adequately controlled using conventional
ports respectively. Without loosing generality, the output uvw approaches. Conversely, as discussed in the Introduction, and
port can be considered as equivalent to an electrical machine, demonstrated in Section V.A.3, saturation of the arm currents
where its back emf is the balanced grid. Therefore, the vector using conventional linear controllers may produce sub-optimal
uvw
vrst (see Fig. 1) can be decomposed as follows: performance.
-L
uvw 0 0 0 0 0 A. Modelling and MPC Definition
0 -Luvw 0 0 0 0 As depicted in (3), the circulating current dynamic relations
uvw 0 0 -Luvw 0 0 0 d iuvw grid
o
vrst = dt rst +v12 (12) are not dependent on the input/output port voltages vαβ12 .
0 0 0 Lrst 0 0
0 0 0 0 Lrst 0
By using a ZOH discretisation method with sampling time
0 0 0 0 0 Lrst Ts in the last four rows of (3), the following discrete-time
model for the circulating currents is obtained:
where Luvw and Lrst are the Thevenin equiva-
lent inductances of the input/output ports, and iε,k+1 = Aε iε,k + Bε vε,k (13)
grid
v12 =[vugrid vvgrid vwgrid vrgrid vsgrid vtgrid ]T are the grid voltages where Aε =I4 , Bε =- TLsb I4 and I4 is an 4x4 identity matrix.
of these ports. Notice that the dynamics of each circulating current are
For the implementation presented, regulation of the currents
dependent on its corresponding circulating voltage vε,k , and
is achieved using a vector control strategy with an anti-windup
there are neither external disturbances nor coupled interactions
saturation scheme implemented along a synchronous reference
with other circulating currents or voltages.
frame orientated along the corresponding grid voltage vector To regulate the circulating currents, a MPC strategy with
[33], [9]. finite horizon of order 1 is proposed [36], [37], [21], [38]:
2) Circulating Current Control: Regulation of the circulat-
ing currents requires knowledge of the output voltages defined Minimize J = x̂Tk+1 Qx̂k+1 + ûTk Rûk
x̂k+1 ,ûk
by the input/output port current controllers. The details of the
implemented MPC strategy is fully discussed in Section IV. subject to x̂k+1 = Aε x̂k + Bε ûk (14)
C. Modulation and Local Balancing Control -vdc,k ≤ vb,k ≤ vdc,k
The modulation scheme is based on a Phase Disposition -Imax ≤ ib,k+1 ≤ Imax
PWM with a sawtooth carrier waveform (single-edge PWM) with
[34], [35], where the Capacitor Voltage Balancing (CVB) of x̂k =iref
ε −iε,k (15)
the cells in a given cluster is accomplished by using a sorting
as the circulating current error vector, with reference iref
ε
scheme based on a priority list which defines the modules to
defined by the stored energy control (see the outer control
be utilised. This scheme is extensively discussed in [14].
loop in Fig.3(b)), and
IV. C IRCULATING C URRENT C ONTROL S CHEME
ûk =vεref -vε,k (16)
For regulating the circulating currents, an MPC strategy
is utilised, where arm currents and cluster output voltages as the circulating voltage error, with vεref is defined by a dead-
bounds are incorporated. The resulting optimisation problem beat control law [21], [38]:
is solved using an active-set algorithm [30], [31], which is Lb
suitable for implementation in a low cost DSP platform as vεref =- x̂k . (17)
Ts
JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, 2021 6
ref ref
Matrices R = rε I4 and Q = qε I4 are, respectively, the with Lvdc =−vdc,k +vb,k and Uvdc =vdc,k +vb,k as inferior and
hv
costs of ûk and x̂k , with qε ≥0 and rε >0 [37]. For regulation
i
ref -1 αβ0,k
upper limits in vector form, and vb,k =Tαβ0ε v ref as the
purposes, the regulation of all current errors are considered ε
output voltage reference considering (17).
equally important.
The resultant inequality constraint depends on the value
Furthermore, the inequality constraints are specified by
of the measured currents and, therefore, it changes at every
the current limits and Cluster Capacitor Voltages (CCVs) of
sampling period.
the nine clusters, where it is important to highlight that the
measured CCVs are considered as constant values during the 2) Current limit constraints: On the other hand, the arm
sampling period. current limits can be stated by the transformed current terms:
By replacing the equality constraint of (14) in the cost
-Imax ≤ T-1 αβ0ε iαβ0ε,k+1 ≤ Imax (23)
function, the following optimisation problem is obtained [21],
[38]: h
i
i
where iαβ0ε,k+1 = αβ0,k+1
iε,k+1 . Moreover, taking into account
1
Minimize J = ûTk hε ûk − ûTunc,k hε ûk (18) (13) and (16) yields:
ûk 2
subject to -vdc,k ≤ vb,k ≤ vdc,k i 05x1
iαβ0,k+1 iαβ0,k+1
h i h
iε,k+1 = iε,k + - TLsb (vεref -ûk )
-Imax ≤ ib,k+1 ≤ Imax
iαβ0,k+1 Ts 05x1 Ts 05x4
h i h i h i
2
with hε =2(Ts /Lb ) qε + 2rε as the resulting cost of the = - ref + ûk (24)
iε,k Lb vε Lb I 4
new optimisation problem, and ûunc,k =-2(h-1 ε qε rε )x̂k as the
optimal solution of (18) without considering the inequality If the models of input/output ports are not clearly defined it
constraints. As described in (18), the inequality constraints could be stated that iαβ0,k+1 ≈iαβ0,k , which can be a good
sums a total of 36 bound limits. approximation when the sampling frequency is reasonably
B. Constraints of the MPC problem high, and the sampling time is relatively small when compared
In this section, the procedure of redefine the constraints to the time constants associated with the load dynamics. We
in terms of ûk , defined in (16), is detailed. To accomplish refer to this as the ”MPC Strategy with Saturation Scheme A”.
this goal, the dynamic relation (13), the input/output port If the models of input/output ports are known, the computation
voltages defined by the output current controllers, and the of an estimation for iαβ0,k+1 can be calculated online [for
linear transform defined in (2) are considered. instance using a discretised version of the input/output plant
1) CCVs constraints: The inequality constraints related to models described in Section III-B1] and it helps to obtain a
the available CCVs can be rewritten in terms of the trans- better definition of the bounds for each sampling period. We
formed voltages by using (2): refer to this as the ”MPC Strategy with Saturation Scheme B”.
Regardless of which saturation scheme is used, if an esti-
−vdc,k ≤ T-1
αβ0ε vαβ0ε,k ≤ vdc,k (19)
mation of the output currents is known at instant “k+1”, it can
where the vector vαβ0ε,k can be decomposed into be used in (23) to define the following bounds:
vαβ0,k
h i
vαβ0ε,k = v (20) L
- Tsb (Imax +ib1,k )+∆vb1ε
ε,k
- Lb (I +i )+∆v
Taking into consideration the definition shown in (16), here- Ts max b2,k b2ε
Lb
inafter the following decomposition is used for the transformed - Ts (Imax +ib3,k )+∆vb3ε
Lb
voltage vector:
- T (Imax +ib4,k )+∆vb4ε
hv Ls
h
vαβ0,k
i
αβ0,k
i - b (Imax +ib5,k )+∆vb5ε ≤ Cu ûk ≤
= Ts
vε,k ref
v -ûk - Lb (Imax +ib6,k )+∆vb6ε
hvε Ts
05x4
i h i - Lb (I +i )+∆v
αβ0,k
= ref
vε − I4 ûk (21) Ts max b7,k b7ε
Lb
- Ts (Imax +ib8,k )+∆vb8ε
where the first term of the right hand of the relation is already
known from the input/output port current control scheme and - TLsb (Imax +ib9,k )+∆vb9ε
the circulating current control law used in the MPC scheme, LImax
and 05x4 is a 5x4 matrix composed of zeros. Replacing this L
T (Imax −ib1,k )+∆vb1ε
b
decomposition into (19), yields:
Lsb (I −i )+∆v
Ts max b2,k b2ε
ref 2 √ 0 2 0
ref Lb
Ts (Imax −ib3,k )+∆vb3ε
vb1,k − vdc1,k vb1,k + vdc1,k
√
ref
vb2,k − vdc2,k -1 - 3 -1 -√ 3 ref
vb2,k + vdc2,k Lb
T (Imax −ib4,k )+∆vb4ε
ref √ ref Ls
vb3,k − vdc3,k -1 3 -1 3 vb3,k + vdc3,k
√ √ b (Imax −ib5,k )+∆vb5ε
ref ref
Ts (25)
1 -1 -√ 3 3
vb4,k − vdc4,k -1 vb4,k + vdc4,k
ref ref Lb (Imax −ib6,k )+∆vb6ε
vb5,k − vdc5,k ≤ -1 3 2 0
√ ûk ≤ vb5,k + vdc5,k (22) Ts
ref 3 Lb (I −i )+∆v
v − vdc6,k 2 0 -1 -√3 v ref + vdc6,k Ts max b7,k b7ε
b6,k √ b6,k
ref Lb
v ref − vdc7,k -1 3 -√ 3 v Ts (Imax −ib8,k )+∆vb8ε
-1 b7,k + vdc7,k
b7,k
v ref − vdc8,k 2 0 -1 3 v ref
+ v Lb
Ts (Imax −ib9,k )+∆vb9ε
dc8,k
b8,k
ref
√ b8,k
ref
vb9,k − vdc9,k -1 - 3 2 0 vb9,k + vdc9,k
UImax
Lvdc Cu Uvdc
JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, 2021 7
where LImax =- TLsb (Imax +ib,k )+∆vbε is the lower bound, and the solution of the following Equality Constrained QP (EC-
UImax = TLsb (Imax −ib,k )+∆vbε is the upper bound in vector QP),
05x1 1 T
û hε ûk -ûTunc,k hε ûk
h i
form, with ∆vbε =T-1 . Minimize
αβ0ε v ref
ε
ûk 2 k
3) Incorporation of the Constraints into the Cost Function: subject to Ku∗ ûk =Mu∗ (32)
The constraints defined in (22) and (25), expressed in terms
(Ku∗ , Mu∗ ) ∈ W ∗ ,
of the argument ûk , are computed at every sampling period.
In the following, it is shown that the original 36 bounds can where W ∗ is the set of active constraints defined from (30),
be reduced to 18 to significantly reduce the complexity of the with Ku∗ and Mu∗ as the matrices composed of the active row-
problem to solve. vectors and elements from Ku and Mu , respectively. Because
For the j-th cluster, the following bounds are defined, the set W ∗ is not known initially, an iterative procedure
for finding W ∗ and solving (32) is implemented. For every
LImax,j
≤ Cu,j ûk (26) iteration, a rearranged EC-QP obtained from (32) is solved,
Lvdc,j
which has the following structure for the j-th step,
where LImax,j and Lvdc,j are the j-th element of vectors LImax
and Lvdc , respectively. Additionally, Cu,j is the j-th row of 1 T T
Minimize p hε pk,j + gk,j pk,j
matrix Cu . pk,j 2 k,j (33)
As depicted in (26), if the constraint related to the maximum subject to Ku,j pk,j = 0
between LImax,j and Lvdc,j value is met, the other constraint is
where pk,j is the argument, gk,j =-hε (ûk,j-in +ûunc,k ) is a
automatically met too. Therefore, (26) can be replaced by just
vector defined at every iteration according to the input ûk,j-in ,
one constraint as,
and Ku,j is assembled from the selected row-vectors defined
Max {Lvdc ,j ; LImax ,j } ≤ Cu,j ûk (27) in W j according to the active constraints in the j-th iteration.
The solution of (33) is obtained using:
With a similar procedure, the upper bounds for the same ∗
T
j-th cluster can be stated as, hε I4 Ku,j −pk,j gk,j
= (34)
Ku,j 0 λ∗k,j 0
−UImax,j
≤ (−Cu,j )ûk . (28)
−Uvdc,j where p∗k,j is the optimal solution, and λ∗k,j is the vector of
Lagrange multipliers that has a length equal to the number of
where UImax,j and Uvdc,j are the j-th element of vectors UImax
active constraints [31].
and Uvdc , respectively. With the same analysis done for the
If p∗k,j = 0, it means that ûk,j-in is the optimal value that
lower bounds, the two upper bounds can be replaced by the
minimizes (33). Moreover, if all the elements of λ∗k,j are zero
following constraint:
or positive, it implies that ûk,j-in is the global optimal solution
−Min {Lvdc ,j ; UImax ,j } ≤ (−Cu,j )ûk (29) that satisfies (18) , and W j =W ∗ .
If p∗k,j = 0 and at least one element of λ∗k,j is negative,
With the aforementioned considerations, the inequality con- it implies that the computed solution does not satisfy all the
straints of (18) rewritten in terms of ûk are incorporated as required conditions for (18) [31]; therefore, according to the
follows: active-set methodology, the constraint ηj ∈ W j related to
Lu Cu
≤ û (30) the most negative element of λ∗k,j is removed, and a new
−Uu −Cu k
iteration starts with a reduced set of active constraints (i.e,
Mu Ku
W j+1 =W j −ηj and ûk,j = ûk,j-in ).
where On the other hand, if p∗k,j 6= 0 it implies that ûk,j-in is not
the optimal solution of (33) and it has to be updated according
Lu = Max {Lvdc ; LImax }
to
Uu = Min {Uvdc ; UImax } (31) ûk,j = ûk,j-in + αk,j p̂k,j , (35)
are the constraints utilised for the proposed MPC strategy. where
The operators “Max{}” and “Min{}” compute the maximum !
and minimum values for each element of the respective input mγ − kγT ûk,in
αk,j = min 1; min (36)
vectors. The outputs of these operators have the same size as (mγ ,kγ )∈V j kγT pk,j
the inputs. Therefore, the 36 constraints of the space defined
from (22) and (25), are significantly reduced to 18 as shown is the ”step-length” parameter, kγ is the γ-th row-vector of
in (31). These 18 constraints define the size of the matrices Ku , mγ is the γ-th element of Mu , and V j is defined as the
Mu and Ku as 18x1 and 18x4, respectively. set of all non-active constraints that, for every γ-th element,
satisfies kγT pk,j < 0.
C. Implementation of the Strategy If αk,j <1 due to some constraint ρj ∈ V j , this element
To solve the optimisation problem stated in (18), an Active- ρj is added to the active-set W j for the next iteration
set algorithm is used with the methodology discussed in [31]. (W j+1 =W j + ρj ).
The Active-set method states that the solution of the main A flowchart of the Active-set algorithm is illustrated in
Quadratic Programming (QP) problem of (18) is equivalent to Fig. 4. To avoid the potential problem of the algorithm failing
JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, 2021 8
TABLE I
S IMULATION PARAMETERS BASED ON THE DIMENSIONING PROPOSED IN
[39], [40].
Rated power S 12kVA
Input/output port VL-L rms grid voltage vrst /vuvw 173V/173V
Capacitor Voltage vC 107V
Total number of cells Nt 27
Input/output port inductance Lrst /Luvw 1mH/1mH
Arm inductance Lb 1mH
Cell capacitance C 4.7mF
Maximum arm current Imax 40A
TABLE II
C ONTROLLER PARAMETERS U SED FOR THE S IMULATION T ESTS
Arm Currents Control
Output rst uvw Circulating
ξ 0.99 0.99 ξ 0.6
BW [Hz] 143 143 BW [Hz] 360
rε ; qε 5;1
Stored Energy Control
Total Energy Balancing
ξ 0.99 ξ 0.7
Fig. 4. Flowchart of the implemented Active-set algorithm described in BW [Hz] 33.2 BW [Hz] 14
Section IV-C.The algorithm is performed at every sampling period.
to converge, an iteration limit value jmax is set. If this value is possible value set by the speed control output saturation level.
reached, the iteration is stopped and the unconstrained solution Depending on the mechanical inertia connected to the machine
is used. shaft, the maximum torque reference could last the order of
In this work a value of jmax =9 has been used because, after seconds, which implies that all the internal circulating currents
extensive simulation and experimental work, the algorithm and the input/output currents have to be adequately regulated
never required more than 9 iterations to obtain the solution. to maintain the correct operation of the converter avoiding
Therefore, in accordance with (16), the applied circulating overcurrent in the arms.
voltage is determined by The test starts at 0 seconds (see Fig. 5), where the d-axis
current reference of the uvw port is stepped from 5A to 34A
vε,k = vεref − ûk (37) for 200ms; afterwards, it is changed from 34A to 22A. The
From this formulation, it is worth to mention that if null q-axis currents of the input/output ports are set to a constant
constraints are active, then value of -1A and 1A, respectively. The simulation results are
shown in Fig. 5, where the arm currents, CCVs, circulating
vε,k = kp x̂k . (38) currents and input/output port currents are illustrated. Two
scenarios are considered, the first one (left hand side of Fig. 5)
with kp =- TLsb +2h-1
ε qε rε as a constant value, which is ob-
shows the simulation results when the arm currents are not
tained by using expressions (17) and (18). Therefore, regula- saturated. At the right hand side the saturation scheme-B is
tion of the circulating currents is accomplished by a propor- enabled.
tional control scheme when no constraints are active.
As shown, to maintain the energy balance, in both scenarios
the sudden change of the uvw d-axis power current generates a
V. S IMULATION AND E XPERIMENTAL R ESULTS
fast increase of the d-axis power current current at the rst port,
A. Simulation Results which is driven by the Total Energy Control system. As shown
Using the Plexim PLECS software, a simulation model of a in the arm-currents, when the no-saturation scheme is utilised,
27-cell M3C with two balanced grids, connected at the input the arm currents have initial peaks near 52A (30% higher
and output ports, was implemented. The parameters of the than the 40A limit), and there are frequent and relatively high
M3C-grid system are depicted in Table I with the sampling current excursions outside the 40A during the 200ms transient.
period for the controllers set to 320µs. The parameters of the For the scheme-B, the arm current peaks are decreased in
controllers are shown in Table II. amplitude to short-duration over-currents at around 42A, 5%
1) Performance of the Proposed Control Strategy for Step higher than the limit.
Changes in the Output Load: In this section, the active power It should be highlighted that the 5% excursions outside
is stepped to a relatively high value on the load-side by a the predefined limit of 40A do not necessarily indicate a
step-change in the d-axis current reference of the output port. problem with the modelling of the system and/or a problem
Without losing generality, this test could emulate (for instance) with the algorithm. In this work a relatively low switching
a load impact on a motor drive. For a typical motor drive based frequency (for a single-edge PD-PWM) is being used to obtain
on a PI speed controller, sudden mechanical load impacts the experimental and simulation results. Therefore, the current
cause a speed reduction. In order to restore the speed, the ripple in the simulation results has a peak to peak value of
torque current component is usually increased to the maximum up to ≈ 4A which is produced by the switching. Hence, it
JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, 2021 9
TABLE III
C ONTROLLER PARAMETERS OF THE E XPERIMENTAL S ET- UP
Arm Currents Control
Output rst uvw Circulating
ξ 0.99 0.99 ξ 0.99
BW [Hz] 253 165 BW [Hz] 268
Fig. 9. Simulation results of saturation scheme-A with TBT at different rε ; qε 10 ; 1
sampling periods. (a) Scheme-A at 320µs (b) Scheme-A at 106.67µs. Stored Energy Control
Total Energy Balancing
ξ 0.99 ξ 0.99
BW [Hz] 6.5 BW [Hz] 5.58
Fig. 14. Experimental results for the TBT without a saturation scheme.
The experimental results for this test are shown from Fig. 11
to Fig. 13.
The two upper plots of Fig. 11 illustrate the instantaneous
grid voltages at the uvw port, where the amplitude variation
Fig. 11. Experimental results of the proposed MPC strategy with cyclic
variations on voltage/frequency at the uvw-port power source. can be identified; the right upper plot shows the grid-frequency
of both the uvw and rst ports. The two middle graphics
show the peak grid voltages for both ports and the Cluster
Capacitor Voltages (CCVs). The lower graphics depict the
dq-axis currents of the uvw and rst ports, respectively. From
these experimental results it is concluded that the dq-axis
uvw output currents follow their respective references with
negligible tracking error, while the d-axis reference at the rst-
input port changes according to the active power demanded
by the total energy control system. Notice that in this test the
power at the port uvw is not constant because the uvw voltage
varies between 182V to 90V with constant d-axis current
reference. As shown in the middle right-side graphic, this
dynamic variation produces small low frequency oscillations
in the capacitor voltages.
Additional results corresponding to this experimental test
are shown in the scope waveforms illustrated in Fig. 12. The
steady state performance at 20Hz is shown in Fig. 12(a) and
Fig. 12. Experimental results of output and arm currents of the M3C at
at 45Hz in Fig. 12(b). Notice that the system is stable with
different voltage/frequency values at the uvw-grid. (a)Operation at 20Hz, and low distortion in the input and output current waveforms. The
(b) Operation at 45Hz. input/output currents ir , iu , and arm currents ib1 , ib4 are also
shown in Fig. 12. Additionally, harmonic spectra of the port
(a) (b) currents, when the output side frequency is 20Hz, are shown
[%] [%]
in Fig. 13. From the spectrum depicted in this figure it is
4 4 concluded that there are relatively high frequency components
which are centred at 3.125kHZ, which is the carrier frequency.
2 2 Additionally, just as observed in Fig. 6, low-order harmonic
content is present for both port currents. The magnitude of
0 0 the low frequency components could be improved by using
0 1 2 3 4 0 1 2 3 4
[kHz] [kHz] a triangular waveform as a carrier (instead of a saw-tooth
Fig. 13. Harmonic spectrum of input and output port currents. (a) Input port waveforms) and optimising some features in the experimental
current ir at 50Hz;(b) Output port current iu at 20Hz. system. However, the current in the grid side THD (input
port) is below 5% which is lower than the maximum value of
grid-side THD recommended in the EEE Std-519-2014 (see
from 182V/45Hz to 90V/20Hz and vice versa in ≈ 1.25s. For [41]) and it is considered appropriate for this application. The
the whole of this test the d-q axis current references uvw are output port side (load-side), working at 20Hz, has higher low-
set to 1A and 5A respectively. At the rst-input port, the q-axis frequency harmonic content in comparison with the input side.
reference is also constant at -5A whereas the d-axis reference This difference is produced because the output port inductance
is defined by the Total Energy Control system [see Fig.3.(a)]. is lower than the input port inductance.
JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, 2021 13
Fig. 15. Experimental results for Saturation Scheme-A, and -B during TBT.
VI. C ONCLUSIONS
This paper has presented a continuous-control-set model
predictive control strategy for regulating the circulating cur-
rents of an M3C. The proposed methodology considers the
Fig. 17. Experimental results of circulating currents with their respective
references during Dynamic test. (a) MPC without Saturation, (b) Scheme-A maximum currents allowed in each cluster as constraints as
and Scheme-B. well as the maximum voltage which can be synthesised by
a given cluster without producing overmodulation. The most
important feature of the proposed strategy is that the MPC
The step changes in the active and reactive dq-currents at employed includes a saturation scheme that regulates the
the rst-input and uvw-output ports are also shown in Fig.15. thermal limit of the arm currents of the M3C and the saturation
According to the experimental results, the proposed saturation of the arm output voltages. These features are attractive during
scheme included in the control strategy does not affect the high demand of circulating currents in transient conditions.
dynamic or steady state performance of the input/output port The proposed saturation scheme is conveniently integrated
currents, confirming that decoupled operation is achieved. into the MPC formulation for the regulation of the circulating
As shown at the lower part of Fig.15, the number of currents. To solve the intrinsic optimisation problem formu-
activated constraints during the test for scheme-A and -B lated from the MPC, an Active-Set algorithm, suitable for
differ considerably. For scheme-A, there is mainly one ac- experimental implementation, is integrated into the proposed
tive constraint for most of the transient, but there are some control methodology.
instances during the test where two constraints are activated si- Two control schemes are derived (A and B) in this work.
multaneously. Analysing the experimental data it is concluded In scheme-A the model of the load/grid is not known and the
that this occurs when both the upper and the lower current prediction of the output currents is replaced by the sampled
limits are reached in some of the arms. On the other hand, measurement. On the other hand, in scheme-B the models of
for scheme-B, there are more instances when two constraints the load/grid are known and are integrated in the algorithm.
are active in comparison with scheme-A. Even more, up to The simulation and experimental results are promising and
three arm-current constraints are activated simultaneously at validate the usefulness of the proposed strategy and algorithm.
a specific instant, achieving a better limitation of the arms The attractive features of the scheme are shown during tran-
currents than that obtained by scheme-A. sient operation, where the saturation scheme performance is
In Fig. 16 the currents in the ports uvw and rst are shown, adequate for a sampling and carrier period of 320µs. Scheme-
as well as two arm currents ib1 and ib4 . Figs. 16(a), (b), (c) B has better regulation of the arm currents than scheme-
show the experimental results for the no saturation scheme, A during transient operation. However, it is shown that the
JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, 2021 15
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[29] D. Karwatzki and A. Mertens, “Generalized control approach for a Roberto Cárdenas (S'95-M'97-SM'07) was born in
class of modular multilevel converter topologies,” IEEE Transactions Punta Arenas, Chile. He received the B.Sc. degree
on Power Electronics, vol. 33, no. 4, pp. 2888–2900, 2018. in electrical engineering from the University of
[30] A. Potschka, C. Kirches, H. Bock, and J. Schlöder, “Reliable solution Magallanes, Punta Arenas, in 1988, and the M.Sc.
of convex quadratic programs with parametric active set methods,” degree in electronic engineering and the Ph.D. de-
Technical Report 2010 11 2828, Heidelberg University, Interdisciplinary gree in electrical and electronic engineering from
Center for Scientific Computing, 2010. the University of Nottingham, Nottingham, U.K., in
[31] J. Nocedal and S. J. Wright, Numerical Optimization, 2nd ed. New 1992 and 1996, respectively. From 1989 to 1991 and
York, NY, USA: Springer, 2006. 1996 to 2008, he was a Lecturer with the University
[32] F. Blaabjerg, Control of Power Electronic Converters and Systems: of Magallanes. From 1991 to 1996, he was with
Volume 1. Elsevier Science, 2018. the Power Electronics Machines and Control Group,
[33] R. Teodorescu, M. Liserre, and P. Rodriguez, Grid Converters for University of Nottingham. From 2009 to 2011, he was with the Electrical
Photovoltaic and Wind Power Systems, ser. Wiley - IEEE. Wiley, 2011. Engineering Department, University of Santiago. He is currently a Professor
[34] B. Wu and M. Narimani, High-Power Converters and AC Drives, ser. of power electronics and drives in the Electrical Engineering Department,
IEEE Press Series on Power Engineering. Wiley, 2017. University of Chile, Santiago, Chile. Prof. Cardenas is an associate editor of
[35] D. Holmes and T. Lipo, Pulse Width Modulation for Power Converters: the IEEE Trans. On Industrial Electronics. In 2005 and 2019 he received the
Principles and Practice, ser. IEEE Press Series on Power Engineering. IEEE Transactions on Industrial Electronics Best Paper Awards.
Wiley, 2003.
[36] B. Kouvaritakis and M. Cannon, Model Predictive Control: Classical, Jon C. Clare (M'90-SM'04) was born in Bristol,
Robust and Stochastic, ser. Advanced Textbooks in Control and Signal UK, in 1957. He received the BSc and PhD. de-
Processing. Springer International Publishing, 2015. grees in electrical engineering from the University
[37] J. Rawlings, D. Mayne, and M. Diehl, Model Predictive Control: Theory, of Bristol, UK, in 1979 and 1990, respectively. From
Computation, and Design. Nob Hill Publishing, 2017. 1984 to 1990, he was a Research Assistant and
[38] T. Orłowska-Kowalska, F. Blaabjerg, and J. Rodrı́guez, Advanced and Lecturer with the University of Bristol, where he
Intelligent Control in Power Electronics and Drives, ser. Studies in was involved in teaching and research on power
Computational Intelligence. Springer International Publishing, 2014. electronic systems. Since 1990, he has been with
[39] F. Kammerer, J. Kolb, and M. Braun, “Optimization of the passive the Faculty of Engineering at the University of
components of the modular multilevel matrix converter for drive ap- Nottingham, UK. He is currently Professor of Power
plications,” in PCIM Europe Conference Proceedings. Mesago PCIM Electronics and is the Head of the Electrical and
GmbH [u.a.], 2012, pp. 702–709. Electronic Engineering Department. He is a member of the Power Electronics,
[40] W. Kawamura, M. Hagiwara, H. Akagi, M. Tsukakoshi, R. Nakamura, Machines and Control Research Group at Nottingham. His research interests
and S. Kodama, “Ac-inductors design for a modular multilevel tsbc are in power-electronic converters and their applications and control. Jon Clare
converter, and performance of a low-speed high-torque motor drive using is a Fellow of the IET and the recipient of a Royal Society Wolfson Research
the converter,” IEEE Transactions on Industry Applications, vol. 53, Merit Award.
no. 5, pp. 4718–4729, 2017.
[41] “Ieee recommended practice and requirements for harmonic control in Alan Watson (S'03–M'08-SM'21) received an
electric power systems,” IEEE Std 519-2014 (Revision of IEEE Std 519- M.Eng. (Hons.) degree in Electronic Engineering
1992), pp. 1–29, 2014. from the University of Nottingham, UK in 2004,
and a PhD, also from the University of Nottingham
in 2008. In 2009, he became a Research Fellow
with the Power Electronics Machines and Control
Group, University of Nottingham. Since 2009, he
has been involved in various projects in the area
Matı́as Urrutia (S'17) was born in Santiago, Chile, of high-power electronics including resonant con-
in 1991. He received the BSc and MSc degrees in verters, high voltage power supplies, and multilevel
electrical engineering from Federico Santa Marı́a converters for grid connected applications such as
Technical University (UTFSM) in 2017, where he HVDC and Flexible AC Transmission Systems. In 2012, he was promoted
is also a part-time lecturer. Currently, Mr Urrutia is to Senior Research Fellow before becoming an Assistant Professor in High
pursuing a dual-degree PhD in electrical engineering Power Electronics at the University of Nottingham in 2013. His current
offered by the University of Chile and the University research interests include the development and control of advanced high-power
of Nottingham. Since 2021, he has been part of conversion topologies for industrial applications, grid connected converters
the PEMC group of the University of Nottingham and HVDC Transmission.
as a Research Associate. His main interests are
Modular Multilevel Converters control, Model pre-
dictive Control and modern FPGA-based digital control schemes for power
electronics applications.