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Module 1

The document outlines a course on Semiconductor Devices and Circuits, detailing its description, outcomes, and key topics covered across five chapters. It includes information on major semiconductor devices, historical developments, and assessment methods. Additionally, it provides insights into semiconductor materials, energy bands, and intrinsic carrier concentration.

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Shreyash Tiwari
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0% found this document useful (0 votes)
19 views84 pages

Module 1

The document outlines a course on Semiconductor Devices and Circuits, detailing its description, outcomes, and key topics covered across five chapters. It includes information on major semiconductor devices, historical developments, and assessment methods. Additionally, it provides insights into semiconductor materials, energy bands, and intrinsic carrier concentration.

Uploaded by

Shreyash Tiwari
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Semiconductor Devices

And Circuits
Code: 23B12EC311
Contents
• Course Description
• Course Outcomes
• Text Books
• Chapter 1
• Chapter 2
• Chapter 3
• Chapter 4
• Chapter 5
• Introduction to Course
Course Description
• Title : Semiconductor Devices And
• Code Circuits
• L-T-P : 23B12EC311
• Credits : 3 00
: 3
Course Outcomes
COURSE OUTCOMES COGNITIVE LEVELS

CO1 Recall the concepts of PN junction diodes and its applications. Remembering (Level I)

CO2 Understand the basic concept of MOS devices. Understanding (Level II)

CO3 Apply the theory of theses device in application of digital logics families. Applying (Level III)

CO4 Analyze and apply the semiconductor devices in the amplifier circuits. Analyzing (Level IV)
Text
1. D. Neamen, D. Biswas ,”Semiconductor Physics and Devices”, McGraw Hill Education; 4
Books
edition, 2017
2. S.M Sze. "Physics of Semiconductor Devices," Wiley 3 edition reprint (2018)
3. Thomas L. Floyd, “Digital Fundamentals”, 10th edition, Pearson. (2013)
4. S Salivahanan, N S. Kumar “Electronic Devices and Circuits”, McGraw Hill Education
PrivateLtd. 2018
Chapter 1: Fundamentals of Semiconductors
• Introduction to Semiconductor
• Semiconductor materials
• E K diagram
• Carrier Concentration
• Density of States
• Energy band diagram of Pn junction
• Tunneling mechanism
• Density of states
• Ideal Nonrectifying Barriers
• Fermi level
• Tunneling Barrier
• Carrier dynamics
• Heterojunctions
• Metal-Semiconductor Ohmic Contacts
• 13 contact hours
• Schottky barrier
Chapter 2: Introduction to Optoelectronic devices
• Optical Absorption :Generation and Recombination
• Photoluminence
• Electroluminance
• Light Emitting Diode
• Photodiode
• Photodetector
• Solar Cell
• 10 Contact Hours
Chapter 3: Introduction to the Special
Semiconductor Diode
• Schottky Diode
• Tunnel Diode
• Varactor Diode
• Gunn Diode
• Impatt Diode
• 4 Contact Hours
Chapter 4: Introduction to the Semiconductor
Power devices
• Power Bipolar Transistor
• Power MOSFETs
• Thyristors
Chapter 5: Introduction to Amplifier
• The basic Classification of the Logic Families is as follows:
• A) Bipolar Family
• B) Unipolar Family
• C) Hybrid Family.
• 9 Contact Hours
Assessment Tools
Examination (75 Marks):
T1 (20 Marks)
T2 (20 Marks)
End Term (35 Marks)

Teacher Assessment (25 Marks):


Assignments (10 Marks)
Quiz (5 Marks) Project Based Learning
Attendance (10 Marks) Assignment (5 Marks)
Individual Assignment (5 Marks)
Device Building Blocks
Semiconductor Devices has been studied for over 125 years.
Till date, we have about 60 major devices, with over 100 device variations related to them.

However all these device cane constructed by using small number of device building blocks

𝑝 − 𝑡𝑦𝑝𝑒 𝑛 − 𝑡𝑦𝑝𝑒
Metal Semiconductor
Semiconductor Semiconductor
Metal-Semiconductor Interface 𝑝 − 𝑛 junction

oxide
Semiconductor Semiconductor
Metal Semiconductor
A B
Heterojunction Interface Metal-Oxide Semiconductor Structure
Major Semiconductor Devices
Year Semiconductor Device Author/ Inventor
1874 Metal-Semiconductor Contact Braun
1907 Light Emitting Diode Round
1947 Bipolar Transistor Bardeen, Brattain, and Shockley
1949 𝑝 − 𝑛 junctions Shockley
1952 Thyristor Ebers
1954 Solar Cell Chapin, Fuller, and Pearson
1957 Heterojunction Bipolar Transistor Kroemer
1958 Tunnel Diode Esaki
1960 MOSFET Kahng and Atalla
1962 Laser Hall et al.
1963 Heterostructure Laser Kroemer, Alferov, and Kazarinov
1963 Transferred-electron diode Gunn
1965 IMPATT diode Johnston, DeLoach, and Cohen
Major Semiconductor Devices
Year Semiconductor Device Author/Inventor
1966 MESFET Mead
1967 Non-volatile semiconductor memory Kahng and Sze
1970 Charge-Coupled Device Boyle and Smith
1974 Resonant Tunnelling Diode Chang, Esaki, and Tsu
1980 MODFET (Modulation doped) Mimura et al.
1994 Room Temperature Single-electron memory cell Yano et al.
2001 20 nm MOSFET Chau
Historical Images
John Bardeen Walter Brattain

William Shockley
Images Heterojunction
Key Semiconductor Technologies
Year Technology Author/Inventor
1918 Czochralski Crystal Growth Czochralski
1925 Bridgman Crystal Growth Bridgman
1952 III-V Compunds (GaN etc.) Welker
1952 Diffusion Pfann
1957 Lithography Photoresist Andrus
1957 Oxide Masking Frosch and Derrick
1957 Epitaxial CVD Growth Sheftal, Kokorish, and Krasilov
1958 Ion Implantation Shockley
1959 Hybrid Integrated Circuit Kilby
1959 Monolithic Integrated Circuit Noyce
1960 Planar Process Hoerni
1963 CMOS Wanlass and Sah
Key Semiconductor Technologies
Year Technology Author/Inventor
1967 DRAM Dennard
1969 Polysilicon self-aligned gate Kerwin, Klein, and Sarace
1969 MOCVD Manasevit and Simpson
1971 Dry Etching Irving, Lemons, and Bobos
1971 Molecular Beam Epitaxy Cho
1971 Microprocessor (4004) Hoff et al.
1982 Trench isolation Rung, Momose, and Ngakubo
1989 Chemical mechanical polishing Davari et al.
1993 Copper Interconnect Paraszczak et al.
Images

Czochralski Crystal Lithography Photoresist


Growth
Condition
Resistivity ρ(Ω𝑐𝑚)
18 16 14 12 10 108 106 104 102 1 −2 −4 −6 −8
10 10 10 10 10 10 10 10 10
Germanium (Ge)
Glass Silver
Silicon
(Si) Copper
Nickel
Oxide Gallium Arsenide
(GaAs)
Aluminiu
Diamond Gallium Phosphide (GaP)
m
Platinum
Sulphur
Cadmium Sulfide (CdS)
Bismuth
Fused Quartz

−18 −16 −14 −12 −10 −8 −6 −4 −2 1 102 104 106 108


10 10 10 10 10 10 10 10 10
Conductivity 𝜎(𝑆/𝑐𝑚)
Materials
Commonly Used Materials

Properties Silicon Germanium


Period IV IV
Atomic Number 14 32
Shell configurations K=2, L=8, M=4 K=2, L=8, M=18, N=4
K=1,L=2,M=3,N=4 (2 𝑛 2)
Sub Shell configurations 1𝑠22𝑠22𝑝63𝑠23𝑝2 1𝑠22𝑠22𝑝63𝑠23𝑝64𝑠23𝑑104𝑝2
s=0, p=1, d=2, f=3, g=4
Outer shell 3𝑝2 4𝑝2
Required electrons 4 electrons in 3𝑝 4 electrons in 4𝑝
Compound Semiconductors

Properties GaAs ZnO GaP CdS CdSe


Period (addition of X) Ga(III), As(V) Zn(II), O(VI) Ga(III), P(V) Cd(II), S(VI) Cd(II), Se(VI)

Atomic Number 31, 33 30, 8 31, 15 48, 16 48, 34

Shell configurations Ga (2, 8, 18, 3) Zn (2,8,18,2) Ga (2, 8, 18, Cd(2, 8, 18, 18, 2) Cd(2, 8, 18, 18, 2)
K=1,L=2,M=3,N=4 As (2, 8, 18, 5) O (2,6) 3) S (2,8,6) Se (2,8,18, 6)
(2 𝑛 2) P (2,8,5)
Sub Shell Ga (4𝑠24𝑝1) Zn (3d10 4𝑠2) Ga (4𝑠24𝑝1) Cd (4𝑠24𝑝64𝑑105𝑠2) Cd (4𝑠24𝑝64𝑑105𝑠2)
configurations As (4𝑠24𝑝3) O (2𝑠2 2𝑝4) P (3𝑠23𝑝3) S (3𝑠23𝑝4) Se (4𝑠24𝑝4)
s=0, p=1, d=2, f=3,
g=4
Only outer shell
Acting as Ga-Conduction Zn-Conduction Ga-Conduction Cd-Conduction Cd-Conduction
As-Valence O-Valence P-Valence S-Valence Se-Valence
CRYSTAL STRUCTURES

A representative unit, or a group of atoms, is repeated at regular intervals in each of the


three dimensions to form the single crystal. The periodic arrangement of atoms in the crystal
is called the lattice.
Energy Bands in Solids
1 Example:
Contribution of atom per cell =
8
Cubic
1
Si Lattice structure is Diamond (FCC)
Atom per unit cell = 8 × =8 1
1 1
Atom per unit cell = 4 + 6 × + 8 × =8
2 8

1
BC Atom per unit cell = 1 + 8 × = 2 Interatomic spacing (a) in case of Si is 5.42 Å
8
C
Then the volume of atomic cube is
3
= 5.42 × 5.42 × 5.42
FC Å
1 1
C Atom per unit cell = 6 × +2 8 × =4 = 15.922 × 10−23 𝑐𝑚−3
8
Then number of atoms per unit volume
1 22 −3
=8× −23 = 5.02 × 10 𝑐𝑚
15.922 × 10
ENERGY BANDS
Energy Levels of Isolated Atoms
For an isolated atom, the electrons can have discrete energy levels. For example, the energy levels for an isolated hydrogen
atom are given by the Bohr model :

where m0 is the free-electron mass, q is the electronic charge, ε0 is the free-space permittivity, h is the Planck constant, and n
is a positive integer called the principal quantum number. The quantity eV (electron volt) is an energy unit corresponding to
the energy gained by an electron when its potential is increased by one volt. It is equal to the product of q (1.6 × 10^–19
coulomb) and one volt, or 1.6 × 10^–19 J.
instead of two levels, N separate but closely spaced levels are formed. When N is large, the result is an essentially continuous
band of energy. This band of N levels can extend over a few eV at the inter-atomic distance of the crystal. The electrons can no
longer be treated as belonging to their parent atoms. They belong to the crystal as a whole.
The Energy-Momentum Diagram
The energy E of a free electron is given by

where p is the momentum and m0 is the free-electron mass. If we plot E vs. p, we obtain a parabola

In a semiconductor crystal, an electron in the conduction band is similar to a free electron in being relatively free to move
about in the crystal. However, because of the periodic potential of the nuclei, Equation can no longer be valid. However, it
turns out that we can still use Equation if we replace the free-electron mass in Equation by an effective mass m n (the subscript
n refers to the negative charge on an electron), that is,

The electron effective mass depends on the properties of the semiconductor. If we have an energy-momentum relationship
described by the above equation, we can obtain the effective mass from the second derivative of E with respect to p:
A simplified energy-momentum relationship of a special
semiconductor with an electron effective mass of mn = 0.25 m0 in the
conduction band (the upper parabola) and a hole effective mass of
mp= m0 in the valence band (the lower parabola). Note that the
electron energy is measured upward and the hole energy is measured
downward. The spacing at p = 0 between these two parabolas is the
bandgap Eg.
Fermi Level
The number of charge carriers in an energy level depends upon the probability of occupation of charges to
density of the states
𝑛 𝐸 = 𝜌 (𝐸)× 𝐹(𝐸)
Where,
𝐹 𝐸 is the probability of occupying energy level 𝐸
𝜌(𝐸) is the density of states at energy level 𝐸
𝜌 𝑘 𝑑𝑘 = 𝜌 (𝐸) 𝑑E
Intrinsic Carrier Concentration
Carrier Concentration is vital for the operation of Semiconductor also to distinguish from Insulators and metals.

At any given temperature, a steady state semiconductor experience electron movement from valance to
conduction band and vice versa in exactly equal manner, called Thermal equilibrium condition.

Intrinsic semiconductor: have relatively small amount of impurities compared to thermally generated electron-
hole pairs.
𝐸
𝑡𝑜𝑝
𝐸
𝐸
𝑡𝑜𝑝 𝑛=ᶘ 𝑁 𝐸 𝐹(𝐸)𝑑𝐸
𝑛=ᶘ 𝑛 𝐸 𝑑𝐸 0
0
Carrier concentration
𝐸𝑐
meant electron Density
(number of electrons 𝐸𝑔
𝑛(𝐸) will depend upon the 𝐸𝑣
per unit volume) density of States (𝑁(𝐸)) and
probability of electron
occupying the sate

Please note: Electron will follow Pauli’s exclusion principle while occupying any state
Density of States Function (𝑁(𝐸))
We Kinetic energy of the particle: De-Broglie
know, 1 1 2 ℎ ℎ 2𝜋
Relation:
𝐸 = 𝑚𝑣2 = 𝑚2𝑣2 = 𝑝 𝑝 = = = ℏ𝒌
2 2𝑚 2𝑚 𝜆 2𝜋 𝜆

2𝑎
𝑘𝑦
2 2
𝐸= ℏ 𝒌
2𝑚
Then 𝜆𝑚𝑖𝑛 = 2𝑎
2𝜋 2𝜋 𝜋
𝑘 = = = =𝑘 =𝑘 𝒌 is wave vector which can exist in all dimensions
𝑥,𝑚𝑎𝑥 𝜆 𝑦,𝑚𝑎𝑥 𝑧,𝑚𝑎𝑥
2𝑎 𝑎
2
As states are discrete so is the wave vector 𝑘2 = 𝑘2 +𝑥 𝑘2 +𝑦 𝑘2 =𝑧 (𝑛2 +𝑥 𝑛2 +𝑦 𝑛2)( 𝑧 ) 𝜋 𝑘𝑥
2 𝑎
𝑛𝜋
𝑘 = , 𝑘𝑥 𝑦= ,𝑛𝑘𝑧𝜋 =
𝑛 𝜋
𝑥,𝑚𝑎𝑥 𝑎𝑦,𝑚𝑎𝑥 𝑧,𝑚𝑎𝑥 𝑎 𝑎
𝑘𝑧
Density of States Function (𝑁(𝐸))
So the distance between two Volume case
𝜋 3
neighbouring states 𝑉𝑘 =
𝜋 𝑎
𝑘𝑥+1 − 𝑘𝑥 =
𝑎

Electron can occupy two states as


Now density of states in 𝑘 space: Pauli's exclusion principle:
4𝜋𝑘2 4𝜋𝑘2
(2) 𝜋
𝜋
3
3 𝑎
𝑎

We will be assuming only positive The obtained density of states are in


𝑘 − 𝑠𝑝𝑎𝑐𝑒 converting to 𝐸 − 𝑠𝑝𝑎𝑐𝑒
values of 𝑘𝑥, 𝑘𝑦, 𝑘𝑧 which is:
1 4𝜋(2𝑚)3/2
𝑁𝑘 = 2 𝑁𝐸 = 𝐸
4𝜋𝑘2 ℎ
3
𝜋
Intrinsic Carrier Concentration
𝐸𝐹
𝑛 = 𝑁 𝑐exp
𝑘𝑇

Now changing line from 0 to 𝐸𝐶 will lead

𝐸𝑐 − 𝐸𝐹 𝐸𝐹 − 𝐸𝑣
𝑛 = 𝑁 𝑐exp − 𝑘𝑇 𝑘𝑇 𝑝 = 𝑁 𝑣exp −

𝑁𝑣 is effective density of states in valance band and will also vary depending upon material

Material 𝑵𝒄 𝑵𝒗
𝑆𝑖 2.86 × 1019𝑐𝑚−3 2.66 × 1019 𝑐𝑚−3
𝐺𝑎𝐴𝑠 4.7 × 1017𝑐𝑚−3 7.0 × 1018𝑐𝑚−3
Intrinsic Carrier Concentration
𝐸
𝑡𝑜𝑝
𝑛=න 𝑁 𝐸 𝐹(𝐸)𝑑𝐸
0

We have found out the Density of states: 𝑁(𝐸) and 𝐹(𝐸)


4𝜋(2𝑚∗𝑐)3/2 𝐸 − 𝐸𝐹 Taking 𝐸𝑡𝑜𝑝 → ∞
𝑛=න 𝐸 − 𝐸𝑐 × exp 𝑑𝐸
3 𝑘𝑇 As 𝐹 𝐸 → 0 as 𝐸 − 𝐸𝑐 ≫
0 ℎ −
𝑘𝑇

2 −
3 𝐸 − 𝐸𝐹 1. 𝑁𝑐 is effective density of states
𝑛 = 𝑁𝑐 𝑘𝑇 𝐸 × exp − 𝑑𝐸 Where,

2 𝑘𝑇
𝜋 in conduction band and will vary
0
Let 𝑥 ≡ 𝐸/𝑘𝑇 depending upon material

2. For simplicity assuming 𝐸𝑐 at 0, we will
2 𝐸𝐹 𝐸𝐹 reintroduce after calculations
𝑛= 𝑁𝑐 exp න 𝑥 × exp −𝑥 𝑑𝑥 = 𝑁𝑐 exp
𝑘𝑇 0 𝑘𝑇
𝜋
Intrinsic Carrier Concentration
𝐸𝐹
𝑛 = 𝑁 𝑐exp
𝑘𝑇

Now changing line from 0 to 𝐸𝐶 will lead

𝐸𝑐 − 𝐸𝐹 𝐸𝐹 − 𝐸𝑣
𝑛 = 𝑁 𝑐exp − 𝑘𝑇 𝑘𝑇 𝑝 = 𝑁 𝑣exp −

𝑁𝑣 is effective density of states in valance band and will also vary depending upon material

Material 𝑵𝒄 𝑵𝒗
𝑆𝑖 2.86 × 1019𝑐𝑚−3 2.66 × 1019 𝑐𝑚−3
𝐺𝑎𝐴𝑠 4.7 × 1017𝑐𝑚−3 7.0 × 1018𝑐𝑚−3
Intrinsic Carrier Concentration
𝐸 For every electron moved to conduction band there is vacancy created in
valance band called holes (𝒑)

𝐸𝑐 So that is
𝐸𝑔 𝑛 = 𝑝 = 𝑛𝑖
𝐸𝑣 Where, 𝑛𝑖 is intrinsic carrier density 𝑛2𝑖 = 𝑛𝑝

𝐸𝑐 − 𝐸𝐹 𝐸𝐹 − 𝐸𝑣
Then, 𝑛2 = 𝑐𝑁 𝑁 𝑣exp
𝑖 − −
𝑘𝑇 𝑘𝑇
Material 𝒏𝒊 𝑛2 = 𝑐𝑁 𝑁 𝑣exp −𝐸𝑐 + 𝐸𝐹 − 𝐸𝐹 + 𝐸𝑣
𝑖 𝑘𝑇
𝑆𝑖 9.65 × 109 𝑐𝑚−3 𝐸𝑣 − 𝐸𝐶
𝐺𝑎𝐴𝑠 6 −3 𝑛2 = 𝑐𝑁 𝑁 𝑣exp
2.25 × 10 𝑐𝑚 𝑖 𝑘𝑇 𝐸𝑔
𝑛𝑖 = 𝑁𝑐𝑁𝑣 exp

2𝑘𝑇
P-N Junction
Due to variation in charge gradient of
P N
electron and holes diffusion of
𝑁𝐴 𝑁𝐷 charges will start.
𝑛𝑝 𝑝𝑛
Huge number of
Huge number of
electrons are
holes are
present
present − +
𝑁𝐴 𝑁𝐷
𝑝𝑛0 = 𝑛2/𝑁𝐷
𝑛𝑝0 = 𝑛2/𝑁𝐴 𝑖
− +
𝐷
𝑁𝐴 𝑁 𝑖
−𝑥𝑝 0 𝑥𝑛

Free from mobile


charge carriers
Nondegenerate Semiconductor
We will assume that the electron or hole concentration is much lower than the effective density of states in
the conduction or valance band, respectively.
i.e. 𝐸𝐹 will be at least 3𝑘𝑇 less than 𝐸𝑐, or 3𝑘𝑇 higher than 𝐸𝑣
This type of semiconductors are called Nondegenerate Semiconductors.
Now, under complete ionization condition, number of impurities will
provide same number of electrons:

Conduction Band 𝑛′ = 𝑛 + 𝑁𝐷
As, 𝑁𝐷 is much higher in concentration, we ca write
𝐸𝑐
𝑛 ≈ 𝑁𝐷
𝐸𝑓
We
𝐸𝑐 − 𝐸𝐹
know, 𝑛 = 𝑁 𝑐exp 𝐸𝑐 − 𝐸𝐹 = 𝑘𝑇 ln(𝑁𝑐/𝑁𝐷)
𝐸𝑣 − 𝑘𝑇
Valance Band
𝐸𝐹 − 𝐸𝑣
𝑝 = 𝑁 𝑣exp − 𝑘𝑇 𝐸𝐹 − 𝐸𝑣 = 𝑘𝑇 ln(𝑁𝑣/𝑁𝐷)
Nondegenerate Semiconductor
𝐸𝑐 − 𝐸𝑖 + 𝐸𝑖 − 𝐸𝐹
𝑛 = 𝑁 𝑐exp − In a similar fashion
𝑘𝑇

𝐸𝑐 − 𝐸𝐹 𝐸𝐹 − 𝐸𝑖 𝐸𝐹 − 𝐸𝑖 + 𝐸𝑖 − 𝐸𝑣
𝑛 = 𝑁𝑐 exp exp 𝑝 = 𝑁 𝑣exp −
𝑘𝑇 𝑘𝑇 𝑘𝑇

𝐸
𝑔
𝐸𝐹 − 𝐸𝑖 𝐸 − 𝐸𝑣 𝐸𝑖 − 𝐸𝐹
𝑛 = 𝑁𝑐 exp − exp 𝑝 = 𝑁𝑣 exp − 𝑖 exp
𝑘𝑇 𝑘𝑇
2𝑘𝑇 𝑘𝑇
𝑁𝑐 ≈ 𝑁𝑣
𝐸𝑔 𝐸𝑖 − 𝐸 𝐹
𝑝 = 𝑁 𝑣exp exp
𝐸𝐹 − 𝐸𝑖 2𝑘𝑇 𝑘𝑇
𝑛 = 𝑛𝑖 exp −
𝑘𝑇
𝑁𝑐 ≈ 𝑁𝑣

𝐸𝑖 − 𝐸𝐹
𝑝 = 𝑛 exp
𝑖
𝑘𝑇
Carrier Transport
𝐽𝑑 = 𝜌𝑣𝑑
Valid only for low electric field regime
Carrier Drift: An electric field applied to a 𝐽𝑝𝑑 = (𝑞𝑝)𝑣 𝐽 = (−𝑞𝑛)𝑣𝑑𝑛
𝑑 𝑑𝑝 𝑛
semiconductor will produce a force on electrons
and holes so that they will experience net 𝑣𝑑𝑝 = 𝜇𝑝ℰ 𝑣𝑑𝑛 = −𝜇𝑛ℰ
movement and net acceleration. The current
generated by this net movement is called Drift 𝐽𝑝𝑑 = (𝑞𝑝)𝜇𝑝ℰ 𝐽𝑛𝑑 = (−𝑞𝑛)(−𝜇𝑛ℰ)
current
𝐽𝑑 = 𝑞 𝜇𝑛𝑛 + 𝜇𝑝𝑝 ℰ = 𝜎ℰ

𝑑𝑛 𝑙 is a
Carrier Diffusion: Diffusion is the process whereby
𝑓𝑙𝑜𝑤 =𝑛 −𝑣 𝑙 𝑡ℎ
𝑑𝑥 separation
particles flow from a region of high concentration
between two
towards a region of low concentration. The current 𝑑𝑛
𝐽𝑛𝑑𝑖𝑓 = −𝑞 × 𝑓𝑙𝑜𝑤𝑛 = 𝑞𝑣𝑡ℎ𝑙 collisions
generated by this net flow is called Diffusion 𝑑𝑥
current 𝑙 < 𝑣𝑡ℎ𝜏𝑐𝑛
𝑑𝑛 𝑑𝑝
𝐽𝑛𝑑𝑖𝑓 = 𝑞𝐷𝑛 𝐽𝑝𝑑𝑖𝑓 = −𝑞𝐷𝑝
𝑑𝑥 𝑑𝑥
Total Current density
𝑑𝑛
𝐽𝑛 = 𝐽𝑛 + 𝐽𝑛 𝐽𝑛 = 𝑞 𝜇𝑛𝑛ℰ + 𝐷𝑛
𝑑𝑟𝑖𝑓𝑡 𝑑𝑖𝑓𝑓 𝑑𝑥

𝑑𝑝
𝐽𝑝 = 𝐽𝑝 + 𝐽𝑝 𝐽𝑝 = 𝑞 𝜇𝑝𝑝ℰ − 𝐷𝑝
𝑑𝑟𝑖𝑓𝑡 𝑑𝑖𝑓𝑓 𝑑𝑥

𝑑𝑛 𝑑𝑝
𝐽=𝐽 +𝐽 𝐽=𝑞 𝜇𝑛𝑛ℰ + 𝜇𝑝𝑝ℰ + 𝐷𝑛 − 𝐷𝑝
𝑑𝑟𝑖𝑓𝑡 𝑑𝑖𝑓𝑓 𝑑𝑥 𝑑𝑥

𝑘𝑇 1 𝑑𝑁𝑑
Relation between 𝐷𝑝, 𝐷𝑛, 𝜇𝑛, 𝑎𝑛𝑑 𝜇𝑝 can be found using current relation along with ℰ=− 𝑞 𝑁𝑑 𝑑𝑥
Under thermal 𝑑𝑛 𝑛 ≈ 𝑁𝑑 𝑑𝑁𝑑
𝐽𝑛 = 0 = 𝑞 𝜇𝑛𝑛ℰ + 𝐷𝑛 0=𝑞 𝜇𝑛𝑁𝑑ℰ + 𝐷𝑛
Equilibrium 𝑑𝑥 𝑑𝑥
𝐷 𝑘𝑇 𝐷𝑛 𝑘𝑇
𝑝 Einstein Relation =
Similar result can be found:
𝜇𝑝 = 𝑞 𝜇𝑛 𝑞
𝑝 − 𝑛 Junction Band Diagram

P N

Conduction Band Conduction Band

𝐸𝑐 𝐸𝑐
𝐸𝑓
𝐸𝑓
𝐸𝑣 𝐸𝑣
Valance Band Valance Band
P-N Junction Band Diagram

Steps:
Conduction Band
1. As we have established under
𝐸 Conduction Band thermal equilibrium there will be
𝑐,𝑝
net flow of charges. Thus fermi
𝐸
𝑐,𝑛 level will not change with distance
𝐸 𝑥.
𝑓,𝑝 𝐸
𝑓,𝑛 2. Align both fermi levels
𝐸 3. But what about the conduction
𝑣,𝑝 Valance Band 𝐸𝑣,𝑛
and Valance bands?
Valance Band
P-N Junction Band Diagram

Steps:
Conduction Band
1. As we have established under
𝐸 thermal equilibrium there will be
𝑐,𝑝
𝐸𝑐,𝑛 net flow of charges. Thus fermi
level will not change with
𝐸𝑓 𝐸𝑓 distance
𝐸 𝑥.
𝑣,𝑝
Valance Band 𝐸𝑣,𝑛 2. Align both fermi levels
3. But what about the
conduction and Valance
bands?
4. Conduction Band and Valance
band will also be joined with their
counterparts but there should not
be any abrupt behaviour
5. What happened at interface?
P-N Junction Band Diagram
Depletion Region Steps:
Conduction Band
1. As we have established under
𝐸 thermal equilibrium there will be
𝑐,𝑝
𝐸𝑐,𝑛 net flow of charges. Thus fermi
level will not change with
𝐸𝑓 𝐸𝑓 distance
𝐸 𝑥.
𝑣,𝑝
Valance Band 𝐸𝑣,𝑛 2. Align both fermi levels
3. But what about the
conduction and Valance
𝑛 − 𝑅𝑒𝑔𝑖𝑜𝑛 bands?
𝑝 − 𝑅𝑒𝑔𝑖𝑜𝑛 𝑥𝑝 𝑥𝑛 4. Conduction Band and Valance
To maintain the neutrality band will also be joined with their
counterparts but there should not
𝑁𝐴𝑥𝑝 = 𝑁𝐷𝑥𝑛
be any abrupt behaviour
𝑥𝑝 + 𝑥𝑛 = 𝑊 5. What happened at interface?
Effects in Interface
𝑁𝐷 − 𝑁𝐴 = 𝜌
Poisson’s Equation:
𝜕2𝑉 𝜕ℰ 𝜌
=− =− −𝑥 𝑝
𝜕𝑥2 𝜕𝑥 𝜖
𝑥𝑛

Applying same will leads to


Electric Field ℰ = න 𝜌𝑑𝑥

−ℰ𝑚
𝑉
Potential 𝑉 = න ℰ𝑑𝑥
𝑉
𝑏𝑖
Extracting Values for Band Diagram
𝐸
𝑖,𝑝
𝑁𝐷
𝐸𝑖,𝑛 = −𝑘𝑇 ln + 𝐸𝐹 𝑞𝑉 = 𝐸 − 𝐸 𝑖,𝑛
𝑛𝑖 𝑏𝑖 𝑖,𝑝
𝐸
𝑖,𝑛
𝑁𝐴
𝐸𝑖,𝑝 = 𝑘𝑇 ln + 𝐸𝐹
𝑛𝑖 1
𝑉𝑏𝑖 = 𝐸 −𝐸
𝑞 𝑖,𝑝 𝑖,𝑛

Then,

𝑘𝑇 𝑁𝐴 𝑁𝐷
𝑉𝑏𝑖 = 𝑞 ln + ln
𝑛𝑖 𝑛𝑖

𝑘𝑇 𝑁𝐴𝑁𝐷 An 𝑘𝑇
𝑉𝑏𝑖 = 𝑞 ln = 𝑉𝑜 d 𝑉𝑇 =𝑞
2
𝑛𝑖
Working of P-N Junction
Under Thermal Equilibrium

𝐼
(𝑚𝐴)

𝑉 (𝑉)
(𝑝𝐴)
Working of P-N Junction - Reverse Bias
Applying Reverse
Bias

On
Of
f
- -
+ +
𝑬𝒄 1. Electrons and holes will face
Considering Semiconductor high potential in order to go
pool of water: 𝑬𝒇 their preferred locations
1. Electrons will replicate 2. The reverse saturation current
the behaviour of Stone will be achieved due to flow of
2. Holes will replicate 𝑬𝒗 minority carriers
behaviour of air Bubble
Working of P-N Junction - Forward Bias
Applying Forward
Bias

On
Of
f
+ +
- -

1. Electrons roll towards lower


energy
2. Holes will move towards high
energy
3. The net movement will give the
current across the terminals
Working of P-N Junction - Breakdown
Applying Reverse
Bias

On
Of
f
- -
+ +
1. Conduction band of 𝑛 − 𝑡𝑦𝑝𝑒 material and Valance band of
𝑝 − 𝑡𝑦𝑝𝑒 material aligns.
2. Due to high field electrons are generating more electron
hole pairs due to impact ionization.
3. In case of Avalanche Breakdown electric field plays
important constraint. Thus making changes in crystal
behaviour or even completely modifying the 𝑝 − 𝑛 junction
interface
𝑒 − ℎ Density
𝑝𝑝𝑜 → Holes (𝑝) concentration in (𝑝) type semiconductor under thermal equilibrium (𝑜)
𝑝𝑛𝑜 → Holes (𝑝) concentration in (𝑛) type semiconductor under thermal equilibrium (𝑜)

𝑛𝑝𝑜 → Electrons (𝑛) concentration in (𝑝) type semiconductor under thermal equilibrium (𝑜)
𝑛𝑛𝑜 → Electrons (𝑛) concentration in (𝑛) type semiconductor under thermal equilibrium (𝑜)

Now, we have estimated the built in potential and we can extend same to calculate hole
and electron densities
𝑝𝑝𝑜 ≈ 𝑁𝐴 𝑛 ≈𝑁 𝑛 𝑝 = 𝑛2 =𝑖 𝑝 𝑛
𝑛𝑜 𝐷
and 𝑛𝑜 𝑛𝑜 𝑝𝑜 𝑝𝑜

𝑘𝑇 𝑁𝐴𝑁𝐷 𝑘𝑇 𝑝 𝑛 𝑘𝑇 𝑛 𝑘𝑇 𝑝
𝑝𝑜 𝑛𝑜
𝑉𝑏𝑖 = = 𝑉𝑜 = ln = 𝑛𝑜
ln 𝑛 𝑝𝑜 = ln 𝑝𝑝𝑜
ln 𝑞 𝑛
2𝑖 𝑞 𝑛
2𝑖 𝑞 𝑞 𝑛𝑜
𝑒 − ℎ Density
Hole density as minority carrier

𝑞𝑉𝑏𝑖
𝑝 =𝑝 exp − 𝑘𝑇
𝑛𝑜 𝑝𝑜

electron density as minority carrier


𝑞𝑉𝑏𝑖
𝑛 𝑝𝑜 = 𝑛 𝑛𝑜 exp −
𝑘𝑇
Electric Field
Using Poisson equation Applying boundary conditions

𝑞𝑁 𝐷𝑥
𝑞𝑁 𝑞𝑁 ℰ𝑛 𝑥 + 𝐶1 = 0
ℰ𝑛 𝑥 =𝜖 𝐷 න 𝑑𝑥 =𝜖 𝐷 𝑥 + 𝐶 1 𝜖 𝑠𝑖 Using
=𝑛 𝑛
𝑠 𝑠𝑖 𝑞𝑁𝐷𝑥𝑛 BC4
𝐶1 =− 𝜖
𝑠𝑖
𝑞𝑁𝐴 𝑞𝑁𝐴
ℰ𝑝 𝑥 = න 𝑑𝑥 = − 𝑥 + 𝐶2
𝜖𝑠 𝜖 𝑞𝑁𝐴𝑥𝑝
− 𝑠𝑖 ℰ𝑝 −𝑥𝑝 = + 𝐶2 = 0 Using
𝜖 𝑠𝑖
BC4
𝑞𝑁𝐴𝑥𝑝
𝐶1 = −
𝜖 𝑠𝑖
Then,
𝑞𝑁 𝑞𝑁
ℰ𝑝 𝑥 = −𝜖 𝐴 (𝑥 + 𝑥 )𝑝 ℰ𝑛 𝑥 =𝜖 𝐷
(𝑥 − 𝑥𝑛 )
𝑠𝑖 𝑠𝑖
Electric Field

At 𝑥 = 0

ℰ𝑝 0 = ℰ𝑛(0) Using
BC1
𝑞𝑁𝐴 𝑞𝑁 𝐷
− 𝜖 𝑥𝑝 = (−𝑥 )𝑛
𝜖
𝑠𝑖 𝑠𝑖

𝑥𝑝 𝑥𝑛
𝑁𝐷 = 𝑁 𝐴

𝑥𝑝𝑁𝐴 = 𝑥𝑛𝑁𝐷
Potentials
𝜕2𝑉 𝜕ℰ𝑛 𝜌 𝑞𝑁𝐷
From Poisson’s equation = − = − 𝜖𝑠
=− 𝜖
𝜕𝑥2 𝜕𝑥

𝜕𝑉
= −ℰ 𝑉 = − න ℰ𝑑𝑥
𝜕𝑥

Then,
𝑞𝑁𝐴 𝑞𝑁𝐴 1
𝑉𝑝 𝑥 =න 𝑥+𝑥 𝑑𝑥 = 2
𝜖 𝜖
𝑝
2 𝑥 + 𝑥𝑥 +𝑝 𝐶 3
𝑠𝑖 𝑠𝑖

𝑞𝑁𝐷 𝑞𝑁𝐷 1
𝑉𝑛 𝑥𝑛 =−න𝜖 𝜖𝑥 − 𝑥𝑑𝑥 = −
2
2 𝑥 − 𝑥𝑥 +𝑛 𝐶 4
𝑠𝑖 𝑠𝑖
Potentials
Using 𝑉𝑝 0 = 𝑉𝑛(0)
BC1,
𝑞𝑁𝐴 1 𝑞𝑁𝐷 1
2 2 𝐶3 =
𝜖 2 𝑥 + 𝑥𝑥 𝑝 + 𝐶3= − 𝜖 2 𝑥 − 𝑥𝑥 +𝑛 𝐶 4 4
𝑠𝑖 𝑠𝑖 𝐶

Using 𝑉𝑝 −𝑥𝑝 = 0
BC3
𝑞𝑁𝐴 12 2
𝑉𝑝 −𝑥𝑝 =0= x −px + C3
𝜖 2 p
𝑠𝑖
1 qNA
C3 xp2 =4
= 2 𝜖𝑠𝑖 𝐶

Then,
𝑞𝑁𝐴 1 2 1 2 𝑞𝑁𝐴 𝑞𝑁𝐴 2
𝑥2 + 𝑥2 + 2𝑥𝑥 𝑥 + 𝑥𝑝
𝑉𝑝 𝑥 =𝜖 𝑠𝑖 2 𝑥 + 2 𝑥𝑝 +𝑝 = 𝑠𝑖 𝑝 𝑝 = 𝑠𝑖
2𝜖 2𝜖
Width of Depletion Region
Similarly
, 𝑞𝑁𝐷 1 1 qNA 𝑞𝑁 𝐷 1 𝑁𝐴
𝑉𝑛 𝑥 2 xp2 = − 2 𝑥 𝑝2
= −𝜖 2 𝑥 − 𝑥𝑥 +𝑛 2 𝜖𝑠𝑖 𝜖 2 𝑥 − 𝑥𝑥 −𝑛 𝑁𝐷
𝑠𝑖 𝑠𝑖

Now, we know using 𝑉n xn = Vbi


(BC2):
𝑞𝑁 𝐷 𝑞𝑁𝐴
𝑉𝑛 𝑥𝑛 = 𝑉𝑏𝑖 𝑥 𝑛2 𝑥 𝑝2
2𝜖𝑠𝑖 + 2𝜖𝑠𝑖
=
𝑥
𝑝
𝑥𝑛
Solving To obtain value of 𝑥 𝑛 and 𝑥 𝑝
with 𝑁𝐷 = 𝑁𝐴

1 2 1 2𝜖𝑠
𝑠 𝑁𝐷 𝑉 − 𝑁 𝑥2
𝑥𝑝2 = 𝑉𝑏𝑖 − 𝑁𝐷𝑥𝑛 2
𝑥 𝑛 𝐴= 𝑁 𝑞
2 𝑏𝑖 𝐷
𝑁2𝜖𝐴 𝑞 𝑁2 𝐴
𝑛
Width of Depletion Region
𝑁𝐴 1 𝑁𝐴 1
𝑥𝑛 2𝜖𝑠 𝑥 𝑁𝐴 = 2𝜖𝑠
𝑞 𝑉 𝑏𝑖 𝐷 𝑁𝐷 + 𝑁𝐴 𝑝 𝑞 𝑉 𝑏𝑖 𝐷 𝑁𝐷 + 𝑁𝐴
= 𝑁 𝑁𝐷 𝑁

2𝜖𝑠 𝑁 1 2𝜖 𝑠 1 𝑁𝐴 𝑁𝐷
𝑉𝑏𝑖 𝐷 𝑊=𝑥 + 𝑥𝑝 = 𝑉
𝑁𝐷 +
𝑛
𝑥𝑝 =
𝑞 𝑁𝐴 𝑁𝐷 + 𝑞 𝑏𝑖 𝑁𝐷 + 𝑁𝐴 𝑁𝐴
𝐴
𝑁
2𝜖 𝑠 1 𝑁𝐴 + 𝑁𝐷
𝑊 = 𝑥𝑛 + 𝑥𝑝 = 𝑉𝑏𝑖
𝑞 𝑁𝐷 + 𝑁𝐴 𝑁𝐴𝑁
Under Thermal Equilibrium 𝐷 Where, 𝑁𝐵 is the
2𝜖
2𝜖𝑠 𝑁𝐷 + 𝑁𝐴 𝑊=𝑥 𝑛 + 𝑥 𝑝≈ 𝑠 𝑏𝑖 lightly doped side
𝑊 = 𝑥𝑛 + 𝑥𝑝 = 𝑉 𝑞𝑁𝐵 𝑉
𝑞 𝑏𝑖 𝑁𝐷𝑁𝐴 (𝑝 𝑜𝑟 𝑛)

2𝜖𝑠 𝑉 is +𝑣𝑒 for F.B


𝑊=𝑥 +𝑥 ≈ (𝑉 −𝑉)
If 𝑉 is the applied bias voltage, then 𝑛 𝑝 𝑞𝑁 𝐵 𝑏𝑖 𝑉 is – 𝑣𝑒 for R.B
Capacitance of PN Junction
𝑑𝑄 𝑑𝑄 𝑑𝑄
𝐶𝑗 ≡ = = 𝑊𝑑𝑄 From Poisson's Equation
𝑑𝑉 𝑊𝑑ℰ
𝜖𝑠

𝜖𝑠
𝐶𝑗 = 𝐹/𝑐𝑚2
𝑊

1 2
= (𝑉𝑏𝑖−𝑉)
𝐶𝑗 𝑞𝜖 𝑁
𝑠

𝐵
1 2
2 = (𝑉𝑏𝑖−𝑉)
��
𝑗 𝑞𝜖 𝑁
𝑠

𝐵
This method is generally employed to find the width of the
depletion region
Metal Semiconductor Junction

Metal Semiconductor Junction

Rectifying Junction or Schottky


Ohmic Junction
Junction
Schottky Barrier
One of the most common way for fabricating semiconductor rectifying diode also point contact diode

In general scenario, Schottky diode is formed with 𝑛 − 𝑡𝑦𝑝𝑒 semiconductor

𝜒 is electron affinity of semiconductor


𝜙𝑚 is metal work function
𝜙𝑠 is semiconductor work function
Schottky Barrier
𝜙𝐵0 = 𝜙𝑚 − 𝜒

𝜙𝐵0 is the ideal barrier height of the Schottky Barrier

𝜙 > 0 to be barrier. Thus 𝜙𝑚 > 𝜒 atleast


𝐵0

For the better Barrier Behaviour 𝜙𝑚 > 𝜙𝑠

𝑉𝑏𝑖 is the built in potential 𝑉𝑏𝑖 = 𝜙𝐵0 − 𝜙𝑛 Thus, 𝑉𝑏𝑖 also depends upon semiconductor doping slightly
Schottky Barrier Operation

Reverse Biasing: Forward Biasing:


−𝑣𝑒 𝑡𝑒𝑟𝑚𝑖𝑛𝑎𝑙 attached to Metal −𝑣𝑒 𝑡𝑒𝑟𝑚𝑖𝑛𝑎𝑙 attached to Semiconductor
+𝑣𝑒 𝑡𝑒𝑟𝑚𝑖𝑛𝑎𝑙 attached to Semiconductor +𝑣𝑒 𝑡𝑒𝑟𝑚𝑖𝑛𝑎𝑙 attached to Metal

The current is majorly contributed due to flow of majority charge carriers


Some Information
Ohmic Junction (Ideal Non rectifying Barrier)
An ohmic contact is a low-resistance junction providing conduction in both directions between the metal and the
semiconductor.
we see the energy levels before contact, and the barrier after contact for thermal equilibrium. To achieve thermal
equilibrium in this junction, electrons flow from the metal into the lower energy states in the semiconductor, which makes the
surface of the semiconductor more n type. The excess electron charge in the n-type semiconductor exists essentially as a surface
charge density. If a positive voltage is applied to the metal, there is no barrier to electrons flowing from the semiconductor into
the metal. If a positive voltage is applied to the semiconductor, the effective barrier height for electrons flowing from the metal
into the semiconductor will be approximately , which is fairly small for a moderately to heavily doped
semiconductor. For this bias condition, electrons can easily flow from the metal into the semiconductor
Electrons can easily flow “downhill” from the semiconductor into the metal. Figure 9.12b shows the case when a positive
voltage is applied to the semiconductor with respect to the metal. Electrons can easily flow over the barrier from the metal
into the semiconductor. This junction, then, is an ohmic contact
Figure 9.13 shows an ideal nonrectifying contact between a metal and a p-type semiconductor. Figure 9.13a shows the energy
levels before contact for the case when . When contact is made, electrons from the semiconductor fl ow into the
metal to achieve thermal equilibrium, leaving behind more empty states, or holes. The excess concentration of holes at the
surface makes the surface of the semiconductor more p type. Electrons from the metal can readily move into the empty states
in the semiconductor. This charge movement corresponds to holes fl owing from the semiconductor into the metal. We can
also visualize holes in the metal fl owing into the semiconductor. This junction is also an ohmic contact.
Ohmic Junction
An ohmic contact is a low-resistance junction providing conduction in both directions between the
metal and the semiconductor.

Tunnelling Barrier
The width of the depletion
region decreases as the doping
concentration in the
semiconductor increases;
Thus, as the doping
concentration increases, the
probability of tunneling through
the barrier increases.

𝑞𝜙𝐵𝑛 −𝑞𝜙𝐵𝑛
𝐽𝑠𝑇 ∗ 2
= 𝐴 𝑇 exp − where 𝑞ℏ 𝑁𝑑
𝑘𝑇 Now tunnelling occurs and 𝐽𝑡 ∝ exp(𝐸𝑜𝑜) 𝐸𝑜𝑜 =
2 𝜖𝑠𝑚𝑛 ∗
electron transfers without
thermionic emission
Heterojunctions
𝑝 − 𝑆𝑖 𝑛 − 𝑆𝑖

Semiconductor is homogenous throughout the structure (𝑝 − 𝑆𝑖 to 𝑛 − 𝑆𝑖). The junction formed by this kind
of semiconductors are called Homojunction

What if, we don’t want to use same semiconductors

Anisotype heterojunction 𝑝 − 𝐺𝑎𝐴𝑠 𝑛 − 𝐴𝑙𝐺𝑎𝐴𝑠

This kind of system is called semiconductor heterojunction

Isotype heterojunction
𝑛 − 𝐺𝑎𝐴𝑠 𝑛 − 𝐴𝑙𝐺𝑎𝐴𝑠
Heterojunction Materials

Two materials are required to form a


Heterojunction will have different band gap energy

This variation in bandgap may lead to abrupt


behaviour or discontinuity in at junction interface

For a useful heterojunction lattice constants of


two materials should match or have minimum
deviation. Otherwise it could lead to dislocation
and occurrence of trap states
Heterojunction Materials

Some of the most common


material used for
preparation of
heterostructures

Ge/GaAs – Lattice
variation of 0.13%
GaAs/AlGaAs –
Lattice Variation of
0.14 %
Band-Diagram
For the Heterostructure, there will be one narrow band semiconductor and another one is wide band
semiconductor

Depending upon the electron affinity of the semiconductor, energy band may align in three patterns

Straddling Gap Staggered Gap Broken Gap


Types of Heterojunctions
𝑛𝑁
Where,
Capital letter denote Wide
Isotype band semiconductor.
Small letter denote Narrow
𝑝𝑃 band semiconductor

𝑝𝑁
Anisotype

𝑛𝑃
Band-Diagram
𝑝𝑁 type (anisotype)

𝐸𝑐𝑝 = 𝑞𝜒𝑝 𝐸𝑐𝑛 = 𝑞𝜒𝑛

Δ𝐸𝑐 = 𝑞(𝜒𝑛 − 𝜒𝑝)


Δ𝐸𝑣 = 𝐸𝑣𝑝 − 𝐸𝑣𝑛 = 𝐸𝑐𝑝 + 𝐸𝑔𝑝 − 𝐸𝑐𝑛 − 𝐸𝑔𝑛 Δ𝐸𝑣 =

−Δ𝐸𝑐 + 𝐸𝑔𝑝 − 𝐸𝑔𝑛

Δ𝐸𝑐 + Δ𝐸𝑣 = 𝐸𝑔𝑝 − 𝐸𝑔𝑛 = Δ𝐸𝑔


Band-Diagram
Electron affinity rule: In the ideal abrupt heterojunction Figure 9.18 shows a general ideal nP heterojunction in
using nondegenerately doped semiconductors, the vacuum thermal equilibrium. In
level is parallel to both conduction bands and valence order for the Fermi levels in the two materials to become
bands. If the vacuum level is continuous, then the same 𝐸𝑐 aligned, electrons from
and 𝐸𝑣 discontinuities will exist at the heterojunction the narrow-gap n region and holes from the wide-gap P
interface. This ideal situation is known as the electron region must flow across the
affinity rule. junction. As in the case of a homojunction, this fl ow of
charge creates a space charge
region in the vicinity of the metallurgical junction. The
space charge width into the
n-type region is denoted by xn and the space charge
width into the P-type region is denoted by xP. The
discontinuities in the conduction and valence bands and
the change
in the vacuum level are shown in the figure
Tunnel Diode
The tunnel diode is a pn junction in which both the n and p regions are degenerately doped. the Fermi level is in the
conduction band of a degenerately doped n-type material and in the valence band of a degenerately doped p-type
material.
the situation when a small forward-bias voltage is applied to
the junction. Electrons in the conduction band of the n region
are directly opposite to empty states in the valence band of
the p region. There is a fi nite probability that some of these
electrons will tunnel directly into the empty states, producing
a forward-bias tunneling current as shown. With a slightly
larger forward-bias voltage, the maximum number of
electrons in the n region will be opposite the maximum
number of empty states in the p region; this will produce a
maximum tunneling current.
As the forward-bias voltage continues
to increase, the number of electrons on
the n side directly opposite empty states
on the p side decreases, and the
tunneling current will decrease.
There are no electrons on the n side
directly opposite to available empty
states on the p side. For this
forward-bias voltage, the tunneling
current will be zero and the normal
ideal diffusion current will exist in the
device as shown in the I–V
characteristics

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