Benq T31 Quanta ED5
Benq T31 Quanta ED5
ED5
ED5 MB S/S ASSY P/N: 51ED5SS0018 ED5 MB S/S ASSY P/N: 51ED5SS0000
P/N: DA0ED5MB8A8 P/N: DA0ED5SB8A5 ED5 MB C/S ASSY P/N: 41ED5CS0015 ED5 MB C/S ASSY P/N: 41ED5CS0007
ED5 MB ASSY P/N: 31ED5MB0012 ED5 MB ASSY P/N: 31ED5MB0004
PG 30
PCB ED5 MB(8L,309X218,REVB)
P/N: DA0ED5MB8B6 PCB ED5 USB/B(8L,47.5X16.8,REVB) W/O ANT ANT +1.2V
ED5 USB/B S/S ASSY P/N: 4NED5SS0011 ED5 USB/B S/S ASSY P/N: 4NED5SS0002
P/N: DA0ED5SB8B3
ED5 USB/B ASSY P/N: 3NED5UB0011 ED5 USB/B ASSY P/N: 3NED5UB0003 +1.2V
+VCCP +VCCP
PG 31
A A
X-Bus PG 25 PG 25
TABLE OF CONTENTS
POWER VOLTAGE ACTIVE SCOPE ROUTING PAGE
Page 01 : BLOCK DIAGRAM
Page 02 : TABLE OF CONTENTS +12V +12V OFF IN S3-S5 PLANE 41
Page 03 : ATHLON64 HT I/F -12V -12V OFF IN S3-S5 TRACE 20 MIL 41
Page 04 : ATHLON64 DDRII MEMORY +5V +5V OFF IN S3-S5 PLANE 41
I/F
Page 05 : ATHLON64 CTRL & DEBUG +3.3V +3.3V OFF IN S3-S5 PLANE 41
SYSTEM
Page 06 : ATHLON64 PWR & GND +5V S0-S5 PLANE/ 50 MIL 41
D D
+5VALW
Page 07 : DDRII SODIMMX2 +3.3VALW +3.3V S0-S5 TRACE 30 MIL 41
Page 08 : DDRII TERMINATION +1.8VALW +2.5V S0-S5 TRACE 30 MIL 21
Page 09 : RS485-HT LINK0 +5V_DUAL +5V S0-S5 PLANE/ 100 MIL 41
I/F
Page 10 : RS485-PCIE LINK I/F +3.3V_DUAL +3.3V S0-S5 PLANE/ 50 MIL 41
Page 11 : RS485-SYSTEM I/F & CLKGEN
Page 12 : RS485-POWER VCCCORE VID[0..6] OFF IN S3-S5 PLANE+COPER 37
CPU
Page 13 : CLOCK GENERATOR VCCP +1.05V OFF IN S3-S5 PLANE+COPER 38
Page 14 : SB460M-PCIE/PCI/CPU/LPC VCCA +1.5V OFF IN S3-S5 TRACE 20 MIL 38
Page 15 : SB460M ACPI/GPIO/USB/AC97 VCC_NB +1.2V/1.0V OFF IN S3-S5 PLANE+COPER 39
Page 16 : SB460M HDD/POWER/DECOUPLI VDD_CPU +1.05V OFF IN S3-S5 PLANE+COPER 38
Page 17 : SB460M STRAPS VDD_MEM +1.8V S0-S3 PLANE+COPER 40
Page 18 : MINI PCI VDD18 +1.8V OFF IN S3-S5 TRACE 20 MIL 12
Page 19 : MINI CARD TV & WLAN VDDA18 +1.8V OFF IN S3-S5 COPPER 12
Page 20 : CRT&LVDS&S-VIDE0&DCS +1.2V OFF IN S3-S5 PLANE+COPPER 12
RC485
VDDA12
Page 21 : HDD & CDROM , HOLES
C C
NB
AVDD
Page 22 : USB, BLUETOOTH AVDDQ +1.8V OFF IN S3-S5 TRACE 20 MIL 11
Page 23 : LAN PCI-E RJ45 & RJ11 PLVDD +1.8V OFF IN S3-S5 TRACE 20 MIL 11
Page 24 : PCI8402_1 & NEW CARD LPVDD +1.8V OFF IN S3-S5 TRACE 20 MIL 11
Page 25 : PCI8402_2 (1394/5IN1) LVDDR +1.8V OFF IN S3-S5 TRACE 30 MIL 11 BONEFISH POWER UP SEQUENCE
Page 26 : AUDIO(ALC262) & MDC VDDR3 +3.3V OFF IN S3-S5 TRACE 30 MIL 11 +5VALW
Page 27 : AUDIO(AMP&POWER&HP CON) VTT_DDR +0.9V OFF IN S3-S5 COPPER 40
RSM RST#
Page 28 : PC97551 & FLASH VDD_CLK +3.3V OFF IN S3-S5 COPPER 14
Page 29 : LED & SW & KB & TP & FAN PS_ON, SLP_S3#, SLP_S5#
Page 30 : CPU CORE MAX8774 +3.3V_SB +3.3V OFF IN S3-S5 PLANE 21
+12V,5V,3.3V
Page 31 : 1.2V/1.5V/2.5V +1.8V_SB +1.8V OFF IN S3-S5 PLANE 21
Page 32 : 1.8V/DDRII +3.3VALW_SB +3.3V S0-S5 PLANE 21
VDRM _PWRGD
Page 33 : SYSTEM 3V/5V +1.8VALW_SB +1.8V S0-S5 PLANE 21
VCC_NB_PWRGD
Page 34 : BATTERY CHARGER +1.8V_SUB_PHY +1.8V S0-S5 TRACE 30 MIL 21
AVDD_CK +1.8V OFF IN S3-S5 TRACE 10 MIL 21
VRM _PWRGD
+5V OFF IN S3-S5 TRACE 10 MIL 21
B B
V5_REF
CPU-PWR +1.05V OFF IN S3-S5 TRACE 20 MIL 21 NB_PWRGD
SB460 SB
A A
PROJECT : ED5
Quanta Computer Inc.
Size Document Number Rev
BLOCK DIAGRAM 1A
Date: Monday, May 22, 2006 Sheet 2 of 34
5 4 3 2 1
D D
PROCESSOR HYPERTRANSPORT INTERFACE
VLDT_Ax AND VLDT_Bx ARE CONNECTED TO THE LDT_RUN POWER
SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE
VLDT_RUN U21A
D4 AE5 C118
VLDT_A3 VLDT_B3
D3 AE4
VLDT_A2 VLDT_B2
D2 AE3
VLDT_A1 VLDT_B1
D1 AE2
VLDT_A0 VLDT_B0 4.7U/6.3V_6
N5 T4 HT_CADOUT15_P (9)
(9) HT_CADIN15_P L0_CADIN_H15 L0_CADOUT_H15
P5 T3 HT_CADOUT15_N (9)
(9) HT_CADIN15_N L0_CADIN_L15 L0_CADOUT_L15
M3 V5 HT_CADOUT14_P (9)
(9) HT_CADIN14_P L0_CADIN_H14 L0_CADOUT_H14
M4 U5 HT_CADOUT14_N (9)
(9) HT_CADIN14_N L0_CADIN_L14 L0_CADOUT_L14
L5 V4 HT_CADOUT13_P (9)
(9) HT_CADIN13_P L0_CADIN_H13 L0_CADOUT_H13 +1.2V VLDT_RUN
M5 V3 HT_CADOUT13_N (9)
(9) HT_CADIN13_N L0_CADIN_L13 L0_CADOUT_L13
C K3 Y5 HT_CADOUT12_P (9) C
(9) HT_CADIN12_P L0_CADIN_H12 L0_CADOUT_H12
K4 W5 HT_CADOUT12_N (9)
(9) HT_CADIN12_N L0_CADIN_L12 L0_CADOUT_L12 L58
H3 AB5 HT_CADOUT11_P (9)
(9) HT_CADIN11_P L0_CADIN_H11 L0_CADOUT_H11
H4 AA5 HT_CADOUT11_N (9)
(9) HT_CADIN11_N L0_CADIN_L11 L0_CADOUT_L11
G5 AB4 HT_CADOUT10_P (9)
(9) HT_CADIN10_P L0_CADIN_H10 L0_CADOUT_H10 L57
H5 AB3 HT_CADOUT10_N (9)
(9) HT_CADIN10_N L0_CADIN_L10 L0_CADOUT_L10 FBJ3216HS800
F3 AD5 HT_CADOUT9_P (9)
(9) HT_CADIN9_P L0_CADIN_H9 L0_CADOUT_H9
F4 AC5 HT_CADOUT9_N (9)
(9) HT_CADIN9_N L0_CADIN_L9 L0_CADOUT_L9
E5 AD4 HT_CADOUT8_P (9)
(9) HT_CADIN8_P L0_CADIN_H8 L0_CADOUT_H8 FBJ3216HS800
F5 AD3 HT_CADOUT8_N (9)
(9) HT_CADIN8_N L0_CADIN_L8 L0_CADOUT_L8
N3 T1 HT_CADOUT7_P (9)
1
(9) HT_CADIN7_P L0_CADIN_H7 L0_CADOUT_H7 C105 C104
(9) HT_CADIN7_N
N2
L0_CADIN_L7 L0_CADOUT_L7
R1 HT_CADOUT7_N (9) 80 ohm(4A)
L1 U2 C110 C116 C108 C112
(9) HT_CADIN6_P L0_CADIN_H6 L0_CADOUT_H6 HT_CADOUT6_P (9)
M1 U3 4.7U/6.3V_6 4.7U/6.3V_6 .22U/6V_4 .22U/6V_4 10P_4 10P_4
(9) HT_CADIN6_N L0_CADIN_L6 L0_CADOUT_L6 HT_CADOUT6_N (9)
2
L3 V1 HT_CADOUT5_P (9)
(9) HT_CADIN5_P L0_CADIN_H5 L0_CADOUT_H5
L2 U1 HT_CADOUT5_N (9)
(9) HT_CADIN5_N L0_CADIN_L5 L0_CADOUT_L5
J1 W2 HT_CADOUT4_P (9)
(9) HT_CADIN4_P L0_CADIN_H4 L0_CADOUT_H4
K1 W3 HT_CADOUT4_N (9)
(9) HT_CADIN4_N L0_CADIN_L4 L0_CADOUT_L4
G1 AA2 HT_CADOUT3_P (9)
(9) HT_CADIN3_P L0_CADIN_H3 L0_CADOUT_H3
(9) HT_CADIN3_N
H1
G3
L0_CADIN_L3 L0_CADOUT_L3
AA3
AB1
HT_CADOUT3_N (9) LAYOUT: Place bypass cap on topside of board
(9) HT_CADIN2_P L0_CADIN_H2 L0_CADOUT_H2 HT_CADOUT2_P (9)
(9) HT_CADIN2_N
G2
L0_CADIN_L2 L0_CADOUT_L2
AA1 HT_CADOUT2_N (9) NEAR HT POWER PINS THAT ARE NOT CONNECTED DIRECTLY
(9) HT_CADIN1_P
E1
L0_CADIN_H1 L0_CADOUT_H1
AC2 HT_CADOUT1_P (9) TO DOWNSTREAM HT DEVICE, BUT CONNECTED INTERNALLY
(9) HT_CADIN1_N
F1
L0_CADIN_L1 L0_CADOUT_L1
AC3 HT_CADOUT1_N (9) TO OTHER HT POWER PINS
B
(9) HT_CADIN0_P
E3
L0_CADIN_H0 L0_CADOUT_H0
AD1 HT_CADOUT0_P (9) PLACE CLOSE TO VLDT0 POWER PINS B
E2 AC1 HT_CADOUT0_N (9)
(9) HT_CADIN0_N L0_CADIN_L0 L0_CADOUT_L0
J5 Y4 HT_CLKOUT1_P (9)
(9) HT_CLKIN1_P L0_CLKIN_H1 L0_CLKOUT_H1
K5 Y3 HT_CLKOUT1_N (9)
(9) HT_CLKIN1_N L0_CLKIN_L1 L0_CLKOUT_L1
J3 Y1 HT_CLKOUT0_P (9)
VLDT_RUN (9) HT_CLKIN0_P L0_CLKIN_H0 L0_CLKOUT_H0
J2 W1 HT_CLKOUT0_N (9)
(9) HT_CLKIN0_N L0_CLKIN_L0 L0_CLKOUT_L0
Athlon 64 S1
Processor Socket
A A
PROJECT : ED5
Quanta Computer Inc.
Size Document Number Rev
ATHLON64 HT I/F 1A
+1.8VSUS
VDD_VTT_SUS_CPU IS CONNECTED TO THE VDD_VTT_SUS POWER
SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE Processor DDR2 Memory Interface
R140
2K/F
U21C
M_B_DQ63 AD11 AA12 M_A_DQ63
(7) M_B_DQ[0..63] MB_DATA63 MA_DATA63 M_A_DQ[0..63] (7)
CPU_M_VREF M_B_DQ62 AF11 AB12 M_A_DQ62
M_B_DQ61 MB_DATA62 MA_DATA62 M_A_DQ61
AF14 AA14
M_B_DQ60 MB_DATA61 MA_DATA61 M_A_DQ60
4 AE14 AB14 4
M_B_DQ59 MB_DATA60 MA_DATA60 M_A_DQ59
Y11 W11
C180 C181 R141 M_B_DQ58 MB_DATA59 MA_DATA59 M_A_DQ58
AB11 Y12
.1U_4 1000p/50V_42K/F M_B_DQ57 MB_DATA58 MA_DATA58 M_A_DQ57
AC12 AD13
M_B_DQ56 MB_DATA57 MA_DATA57 M_A_DQ56
AF13 AB13
M_B_DQ55 MB_DATA56 MA_DATA56 M_A_DQ55
AF15 AD15
M_B_DQ54 MB_DATA55 MA_DATA55 M_A_DQ54
AF16 AB15
+1.8VSUS M_B_DQ53 MB_DATA54 MA_DATA54 M_A_DQ53
AC18 AB17
+0.9V_VTER M_B_DQ52 MB_DATA53 MA_DATA53 M_A_DQ52
AF19 Y17
M_B_DQ51 MB_DATA52 MA_DATA52 M_A_DQ51
AD14 Y14
MB_DATA51 MA_DATA51
2
To SODIMM socket B
MA_ADD14 MB_ADD14 MB_DATA22 MA_DATA22
To SODIMM socket A
M_A_A13 V24 W25 M_B_A13 M_B_DQ21 C20 F18 M_A_DQ21
M_A_A12 MA_ADD13 MB_ADD13 M_B_A12 M_B_DQ20 MB_DATA21 MA_DATA21 M_A_DQ20
K24 L23 B20 E18
M_A_A11 MA_ADD12 MB_ADD12 M_B_A11 M_B_DQ19 MB_DATA20 MA_DATA20 M_A_DQ19
L20 L25 C25 E20
M_A_A10 MA_ADD11 MB_ADD11 M_B_A10 M_B_DQ18 MB_DATA19 MA_DATA19 M_A_DQ18
R19 U25 D24 D22
M_A_A9 MA_ADD10 MB_ADD10 M_B_A9 M_B_DQ17 MB_DATA18 MA_DATA18 M_A_DQ17
L19 L24 A21 C19
M_A_A8 MA_ADD9 MB_ADD9 M_B_A8 M_B_DQ16 MB_DATA17 MA_DATA17 M_A_DQ16
L22 M26 D20 G18
M_A_A7 MA_ADD8 MB_ADD8 M_B_A7 M_B_DQ15 MB_DATA16 MA_DATA16 M_A_DQ15
L21 L26 D18 G17
M_A_A6 MA_ADD7 MB_ADD7 M_B_A6 M_B_DQ14 MB_DATA15 MA_DATA15 M_A_DQ14
M19 N23 C18 C17
M_A_A5 MA_ADD6 MB_ADD6 M_B_A5 M_B_DQ13 MB_DATA14 MA_DATA14 M_A_DQ13
M20 N24 D14 F14
M_A_A4 MA_ADD5 MB_ADD5 M_B_A4 M_B_DQ12 MB_DATA13 MA_DATA13 M_A_DQ12
M24 N25 C14 E14
M_A_A3 MA_ADD4 MB_ADD4 M_B_A3 M_B_DQ11 MB_DATA12 MA_DATA12 M_A_DQ11
M22 N26 A20 H17
M_A_A2 MA_ADD3 MB_ADD3 M_B_A2 M_B_DQ10 MB_DATA11 MA_DATA11 M_A_DQ10
N22 P24 A19 E17
M_A_A1 MA_ADD2 MB_ADD2 M_B_A1 M_B_DQ9 MB_DATA10 MA_DATA10 M_A_DQ9
N21 P26 A16 E15
(near)
(Far)
M_A_A0 MA_ADD1 MB_ADD1 M_B_A0 M_B_DQ8 MB_DATA9 MA_DATA9 M_A_DQ8
R21 T24 A15 H15
MA_ADD0 MB_ADD0 M_B_DQ7 MB_DATA8 MA_DATA8 M_A_DQ7
A13 E13
M_B_DQ6 MB_DATA7 MA_DATA7 M_A_DQ6
(7,8) M_A_BS#2 K22 K26 M_B_BS#2 (7,8) D12 C13
MA_BANK2 MB_BANK2 M_B_DQ5 MB_DATA6 MA_DATA6 M_A_DQ5
(7,8) M_A_BS#1 R20 T26 M_B_BS#1 (7,8) E11 H12
MA_BANK1 MB_BANK1 M_B_DQ4 MB_DATA5 MA_DATA5 M_A_DQ4
(7,8) M_A_BS#0 T22 U26 M_B_BS#0 (7,8) G11 H11
MA_BANK0 MB_BANK0 M_B_DQ3 MB_DATA4 MA_DATA4 M_A_DQ3
B14 G14
M_B_DQ2 MB_DATA3 MA_DATA3 M_A_DQ2
(7,8) M_A_RAS# T20 U24 M_B_RAS# (7,8) A14 H14
MA_RAS_L MB_RAS_L M_B_DQ1 MB_DATA2 MA_DATA2 M_A_DQ1
(7,8) M_A_CAS# U20 V26 M_B_CAS# (7,8) A11 F12
MA_CAS_L MB_CAS_L M_B_DQ0 MB_DATA1 MA_DATA1 M_A_DQ0
(7,8) M_A_WE# U21 U22 M_B_WE# (7,8) C11 G12
MA_WE_L MB_WE_L MB_DATA0 MA_DATA0
M_B_DM7 AD12 Y13 M_A_DM7
DDR II: CMD/CTRL/CLK M_B_DM6 MB_DM7 MA_DM7 M_A_DM6
AC16 AB16
M_B_DM5 MB_DM6 MA_DM6 M_A_DM5
AE22 Y19
Athlon 64 S1 M_B_DM4 MB_DM5 MA_DM5 M_A_DM4
AB26 AC24
Processor Socket M_B_DM3 MB_DM4 MA_DM4 M_A_DM3
E25 F24
M_B_DM2 MB_DM3 MA_DM3 M_A_DM2
A22 E19
M_B_DM1 MB_DM2 MA_DM2 M_A_DM1
B16 C15
M_B_DM0 MB_DM1 MA_DM1 M_A_DM0
2
(7) M_B_DM[0..7] A12 E12 M_A_DM[0..7] (7)
2
MB_DM0 MA_DM0
M_B_DQS7 AF12 W12 M_A_DQS7
M_B_DQS#7 MB_DQS_H7 MA_DQS_H7 M_A_DQS#7
AE12 W13
M_B_DQS6 MB_DQS_L7 MA_DQS_L7 M_A_DQS6
AE16 Y15
M_B_DQS#6 MB_DQS_H6 MA_DQS_H6 M_A_DQS#6
AD16 W15
M_B_DQS5 MB_DQS_L6 MA_DQS_L6 M_A_DQS5
AF21 AB19
M_B_DQS#5 MB_DQS_H5 MA_DQS_H5 M_A_DQS#5
AF22 AB20
M_B_DQS4 MB_DQS_L5 MA_DQS_L5 M_A_DQS4
AC25 AD23
M_B_DQS#4 MB_DQS_H4 MA_DQS_H4 M_A_DQS#4
AC26 AC23
M_B_DQS3 MB_DQS_L4 MA_DQS_L4 M_A_DQS3
F26 G22
M_B_DQS#3 MB_DQS_H3 MA_DQS_H3 M_A_DQS#3
E26 G21
M_B_DQS2 MB_DQS_L3 MA_DQS_L3 M_A_DQS2
A24 C22
M_B_DQS#2 MB_DQS_H2 MA_DQS_H2 M_A_DQS#2
A23 C21
M_B_DQS1 MB_DQS_L2 MA_DQS_L2 M_A_DQS1
D16 G16
M_B_DQS#1 MB_DQS_H1 MA_DQS_H1 M_A_DQS#1
C16 G15
M_B_DQS0 MB_DQS_L1 MA_DQS_L1 M_A_DQS0
C12 G13
M_B_DQS#0 MB_DQS_H0 MA_DQS_H0 M_A_DQS#0
B12 H13
MB_DQS_L0 MA_DQS_L0
M_A_DQS0
M_B_DQS0 DDR: DATA M_A_DQS1
M_B_DQS1 Athlon 64 S1 M_A_DQS2
+0.9V_VTER M_B_DQS2 Processor Socket M_A_DQS3
M_B_DQS3 M_A_DQS4
M_B_DQS4 M_A_DQS5
M_B_DQS5 M_A_DQS6
C150 C157 C132 C151 M_B_DQS6 M_A_DQS7
(7) M_A_DQS[0..7]
C133 C145 C148 C135 C137 C153 C154 C144 C136 C134 C147 C138 M_B_DQS7
(7) M_B_DQS[0..7]
4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 .22U/6V_4 .22U/6V_4 .22U/6V_4 .22U/6V_4 1000p/50V_4 1000p/50V_4 1000p/50V_4 1000p/50V_4 180P_4 180P_4 180P_4 180P_4 M_A_DQS#0
M_B_DQS#0 M_A_DQS#1
M_B_DQS#1 M_A_DQS#2
M_B_DQS#2 M_A_DQS#3
M_B_DQS#3 M_A_DQS#4
M_B_DQS#4 M_A_DQS#5
M_B_DQS#5 M_A_DQS#6
1 1
M_B_DQS#6 M_A_DQS#7
(7) M_A_DQS#[0..7]
M_B_DQS#7
(7) M_B_DQS#[0..7]
PROJECT : ED5
Quanta Computer Inc.
Size Document Number Rev
ATHLON64 DDRII MEMORY I/F 1A
Date: Monday, May 22, 2006 Sheet 4 of 34
A B C D E
LAYOUT: ROUTE VDDA TRACE APPROX. ATHLON Control and Debug +1.8VSUS
50 mils WIDE (USE 2x25 mil TRACES TO
EXIT BALL FIELD) AND 500 mils LONG.
If AMD SI is not used, the SID pin can be left unconnected and SIC
should have a 300- Ω (±5%) pulldown to VSS. R81
CPU_VDDA_RUN +1.8V R351
R349
*300
*300
300_4
+2.5V U21D
L27 BLM18PG330SN1D R347 300_4 CPU_SIC_R CPU_VDDA_RUN F8 AF6 H_THERMTRIP#
CPU_VDDA_RUN CPU_SID_R VDDA2 THERMTRIP_L
F9 AC7 H_PROCHOT#
VDDA1 PROCHOT_L
CPU_HT_RESET# B7
T110 RESET_L
C163 C490 CPU_ALL_PWROK A7
T111 PWROK
C127 C131 100U/6.3V_3528 CPU_LDTSTOP# F10
D T46 LDTSTOP_L D
4.7U/6.3V_6 .22U/6V_4 3900p/25V A5
VID5 VID5 (30)
CPU_SIC_R AF4 C6
VLDT_RUN SIC VID4 VID4 (30)
CPU_SID_R AF5 A6
SID VID3 VID3 (30)
A4
VID2 VID2 (30)
place them to CPU within 1" R75 44.2F CPU_HTREF1 P6
HT_REF1 VID1
C5 VID1 (30)
CPU_HTREF0 R6 B5 VID0 (30)
R74 44.2F HT_REF0 VID0
AC6 CPU_PRESENT#
T109 CPU_PRESENT_L
C489 3900p/25V CPU_CLKIN_SC_P F6
(13) CPUCLK (30) COREFB+V VDD_FB_H PSI#
CPU_CLKIN_SC_N E6 A3
To Power (30) COREFB- VDD_FB_L PSI_L
T22
CPU_VDDIO_SUS_FB_H W9 PSI_L is a Power Status Indicator signal. This signal is asserted
T21 VDDIO_FB_H T27
R366 CPU_VDDIO_SUS_FB_L Y9 when the processor is in a low powerstate. PSI_L should be
T23 VDDIO_FB_L
connected to the power supply controller, if the controller
169F D3A:Add LEVEL-SHIFT circuit on PSI# that between CPU_CLKIN_SC_P A9 supports “skipmode, or diode emulation mode ”. PSI_L is asserted by
CPU_CLKIN_SC_N CLKIN_H
A8
CPU and POWER CLKIN_L the processor during the C3 and S1 states.
(13) CPUCLK#
C488 3900p/25V +1.8V +3V
CPU_DBRDY G10
DBRDY
+1.8V +3V R545 CPU_TMS AA9 E10 CPU_DBREQ#
R546 CPU_TCK TMS DBREQ_L
AC9
+1.8VSUS ECN 2A 10K_4 1K/F_4 CPU_TRST# TCK
AD9
CPU_TDI TRST_L CPU_TDO
Remove R348 for Power sequence AF9 AE9
R348 TDI TDO
PWR_PSI# (30)
2
R350 *4.7K/F_4 C487 .1U_4
Q39 CPU_TEST25_L_BYPASSCLK_L E8
TEST25_L
ROUTE AS 80 Ohm DIFFERENTIAL PAIR
(14,15) CPU_PWRGD
1 MMBT3904 CPU_TEST19_PLLTEST0 G9
TEST19 PLACE IT CLOSE TO CPU WITHIN 1"
4 CPU_ALL_PWROK CPU_TEST18_PLLTEST1 H10
TEST18
2 AA7
TEST13 CPU_TEST24_SCANCLK1
C2 AE7
U20 CPU_TEST17_BP3 D7 TEST9 TEST24 AD7 CPU_TEST23_TSTUPD
T37 TEST17 TEST23 T113
NC7SZ08P5X_NL CPU_TEST16_BP2 CPU_TEST22_SCANSHIFTEN
3
E7 AE8
C T35 TEST16 TEST22 C
CPU_TEST15_BP1 F7 AB8 CPU_TEST21_SCANEN
+1.8V CPU_TEST14_BP0 C7 TEST15 TEST21 AF7 CPU_TEST20_SCANCLK2
CPU_TEST12_SCANSHIFTENB TEST14 TEST20
AC8
TEST12 CPU_TEST28_H_PLLCHRZ_P
J7 T36
+1.8VSUS CPU_TEST07_ANALOG_T C3 TEST28_H H8 CPU_TEST28_L_PLLCHRZ_N
T26 TEST7 TEST28_L T44
CPU_TEST6_DIECRACKMON AA6 AF8 CPU_TEST27_SINGLECHAIN
T20 TEST6 TEST27
R114 C161 .1U_4 CPU_TEST5_THERMDC W7 AE6 CPU_TEST26_BURNIN#
CPU_TEST4_THERMDA TEST5 TEST26 CPU_TEST10_ANALOGOUT
W8 K8 T42
300_4 CPU_TEST3_GATE0 Y6 TEST4 TEST10 C4 CPU_TEST08_DIG_T
T19 TEST3 TEST8 T24
5
CPU_TEST2_DRAIN0 AB6
T112 TEST2
(11,14,15) LDT_STOP# 1
4 CPU_LDTSTOP#
2
P19 B18
T58 RSVD1 RSVD9 T49
CPU_RSVD_MA0_CLK0_P N20
+1.8V T55 RSVD2
CPU_RSVD_MA0_CLK0_N N19 B3 CPU_RSVD_VIDSTRB1
T56 RSVD3 RSVD10 T28
C1 CPU_RSVD_VIDSTRB0
RSVD11 T25
+1.8VSUS H6 CPU_RSVD_VDDNB_FB_P
RSVD12 T32
G6 CPU_RSVD_VDDNB_FB_N
RSVD13 T40
R346 C484 .1U_4 D5 CPU_RSVD_CORE_TYPE
RSVD14 T31
MISC
300_4 R24
RSVD15
5
W18
CPU_RSVD_MB0_CLK3_P RSVD16
(14) LDT_RST# 1 T57 R26 R23
CPU_HT_RESET# CPU_RSVD_MB0_CLK3_N RSVD4 RSVD17
4 T52 R25 AA8
R342 *0_4 2 CPU_RSVD_MB0_CLK0_P P22 RSVD5 RSVD18 H18
(14,15,28) EC_PWRGD T53 RSVD6 RSVD19
CPU_RSVD_MB0_CLK0_N R22 H19
T54 RSVD7 RSVD20
R343 0_4 U19
(11,28) NB_PWRGD
3
NC7SZ08P5X_NL
B B
+1.8VSUS
R364
R361
R360
R362
R120
+1.8VSUS R70 CPU_TEST25_H_BYPASSCLK_H R87 510/F_4
330_4
IF no use which Net
+1.8V Q11 R86 4.7K/F_4 CPU_TEST21_SCANEN R356 300_4 need pull-up or down
3
220_4
220_4
220_4
220_4
220_4
R73 4.7K/F_4 CPU_TEST22_SCANSHIFTEN R357 300_4
3 1 CPU_TEST12_SCANSHIFTENB R358 300_4
CPU_EC_PROCHOT# (28)
300_4 CPU_TEST15_BP1 R91 300_4 CPU_DBREQ# T47
1
A
15 MIL A
R341 47/F_6 3V_THM R340 +3V
2
10K_4
C477 Address 98H To SB GPIO
.1U_4 1 3
MAX6648_AL# (15)
R339
U17 G781 Q23 2N7002E-LF 4.7K/F_4 Q22
2
1 6 2N7002E-LF
CPU_TEST5_THERMDC VCC -ALT
3 7 KBSMDAT
2 DXN SMDATA 8 KBSMCLK 1 3
DXP SMCLK MBCLK_CPU (28)
4 5
C479 -OVT GND +3V
2200P/50V_4 PROJECT : ED5
CPU_TEST4_THERMDA
10 mil trace / Quanta Computer Inc.
R345
10 mil space 10K_4 To FAN Size Document Number Rev
ATHLON64 CTRL & DEBUG 2A
MAX6648_OV# (29) Date: Monday, May 22, 2006 Sheet 5 of 34
5 4 3 2 1
A1 A26
Athlon 64 S1g1
uPGA638
PROCESSOR POWER AND GROUND
A
Top View A
+1.8VSUS
+1.8VSUS
103
104
111
112
117
118
81
82
87
88
95
96
(4,8) M_B_A[0..15] M_B_DQ[0..63] (4)
103
104
111
112
117
118
M_B_A0 M_B_DQ4
81
82
87
88
95
96
102 5
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
(4,8) M_A_A[0..15] M_A_DQ[0..63] (4) A0 DQ0
M_B_A1 101 7 M_B_DQ1
M_A_A0 M_A_DQ1 M_B_A2 A1 DQ1 M_B_DQ2
102 5 100 17
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
M_A_A1 101 A0 DQ0 7 M_A_DQ5 M_B_A3 99 A2 DQ2
19 M_B_DQ3
M_A_A2 A1 DQ1 M_A_DQ2 M_B_A4 A3 DQ3 M_B_DQ5
100 17 98 4
M_A_A3 99 A2 DQ2
19 M_A_DQ3 M_B_A5 97 A4 DQ4
6 M_B_DQ0
M_A_A4 A3 DQ3 M_A_DQ0 M_B_A6 A5 DQ5 M_B_DQ6
4 98 4 94 14 4
M_A_A5 97 A4 DQ4
6 M_A_DQ4 M_B_A7 92 A6 DQ6
16 M_B_DQ7
M_A_A6 94
A5 DQ5
14 M_A_DQ7 M_B_A8 93
A7 CN27 DQ7
23 M_B_DQ8
M_A_A7 92 A6 DQ6
16 M_A_DQ6 M_B_A9 91 A8 DQ8
25 M_B_DQ9
M_A_A8 93
A7 CN26 DQ7
23 M_A_DQ12 M_B_A10 105
A9 REVERSE DQ9
35 M_B_DQ10
M_A_A9 91 A8 DQ8 25 M_A_DQ8 M_B_A11 90 A10 DQ10
37 M_B_DQ15
M_A_A10 A9 REVERSE DQ9 M_A_DQ10 M_B_A12 A11 DQ11 M_B_DQ12
105 35 89 20
M_A_A11 90 A10 DQ10 37 M_A_DQ14 M_B_A13 116 A12 DQ12
22 M_B_DQ13
M_A_A12 A11 DQ11 M_A_DQ13 M_B_A14 A13 DQ13 M_B_DQ14
89 20 86 36
M_A_A13 116 A12 DQ12 22 M_A_DQ9 M_B_A15 84 A14 DQ14
38 M_B_DQ11
M_A_A14 A13 DQ13 M_A_DQ15 A15 DQ15 M_B_DQ16
86 36 43
M_A_A15 A14 DQ14 M_A_DQ11 DQ16 M_B_DQ21
84 38 (4,8) M_B_BS#0 107 45
A15 DQ15 M_A_DQ21 BA0 DQ17 M_B_DQ19
43 (4,8) M_B_BS#1 106 55
107 DQ16 45 M_A_DQ17 85 BA1 DQ18
57 M_B_DQ23
(4,8) M_A_BS#0 BA0 DQ17 (4,8) M_B_BS#2 BA2 DQ19
106 55 M_A_DQ23 44 M_B_DQ20
(4,8) M_A_BS#1 BA1 DQ18 DQ20
(4,8) M_A_BS#2 85 57 M_A_DQ18 M_B_DM0 10 46 M_B_DQ17
BA2 DQ19 M_A_DQ20 M_B_DM1 DM0 DQ21 M_B_DQ18
44 26 56
M_A_DM0 10 DQ20 46 M_A_DQ19 M_B_DM2 52 DM1 DQ22
58 M_B_DQ22
M_A_DM1 DM0 DQ21 M_A_DQ22 M_B_DM3 DM2 DQ23 M_B_DQ29
26 56 67 61
M_A_DM2 52 DM1 DQ22 58 M_A_DQ16 M_B_DM4 130 DM3 DQ24
63 M_B_DQ28
M_A_DM3 DM2 DQ23 M_A_DQ29 M_B_DM5 DM4 DQ25 M_B_DQ26
67 61 147 73
M_A_DM4 130 DM3 DQ24 63 M_A_DQ28 M_B_DM6 170 DM5 DQ26 75 M_B_DQ27
M_A_DM5 DM4 DQ25 M_A_DQ31 M_B_DM7 DM6 DQ27 M_B_DQ24
147 73 (4) M_B_DM[0..7] 185 62
M_A_DM6 170 DM5 DQ26 75 M_A_DQ26 DM7 DQ28 64 M_B_DQ25
M_A_DM7 DM6 DQ27 M_A_DQ25 M_B_DQS0 DQ29 M_B_DQ30
(4) M_A_DM[0..7] 185 62 13 74
DM7 DQ28 64 M_A_DQ24 M_B_DQS1 31 DQS0 DQ30 76 M_B_DQ31
M_A_DQS0 DQ29 M_A_DQ27 M_B_DQS2 DQS1 DQ31 M_B_DQ32
13 74 51 123
M_A_DQS1 31 DQS0 DQ30 76 M_A_DQ30 M_B_DQS3 70 DQS2 DQ32 125 M_B_DQ36
M_A_DQS2 DQS1 DQ31 M_A_DQ32 M_B_DQS4 DQS3 DQ33 M_B_DQ39 +1.8VSUS
51 123 131 135
3 M_A_DQS3 70 DQS2 DQ32 125 M_A_DQ36 M_B_DQS5 148 DQS4 DQ34 137 M_B_DQ35 3
M_A_DQS4 DQS3 DQ33 M_A_DQ37 M_B_DQS6 DQS5 DQ35 M_B_DQ33
131 135 169 124
M_A_DQS5 148 DQS4 DQ34 137 M_A_DQ35 M_B_DQS7 188 DQS6 DQ36 126 M_B_DQ37
DQS5 DQ35 (4) M_B_DQS[0..7] DQS7 DQ37
M_A_DQS6 169 124 M_A_DQ33 134 M_B_DQ34 C308 *10U/6.3V/X5R
M_A_DQS7 188 DQS6 DQ36 126 M_A_DQ38 M_B_DQS#0 11 DQ38 136 M_B_DQ38
(4) M_A_DQS[0..7] DQS7 DQ37 DQS0 DQ39
134 M_A_DQ34 M_B_DQS#1 29 141 M_B_DQ40 C380 *10U/6.3V/X5R
M_A_DQS#0 11 DQ38 136 M_A_DQ39 M_B_DQS#2 49 DQS1 DQ40 143 M_B_DQ41
M_A_DQS#1 DQS0 DQ39 M_A_DQ40 M_B_DQS#3 DQS2 DQ41 M_B_DQ46 C338 10U/10V/X5R_8
29 141 68 151
M_A_DQS#2 DQS1 DQ40 M_A_DQ41 M_B_DQS#4 DQS3 DQ42 M_B_DQ43
49 143 129 153
M_A_DQS#3 DQS2 DQ41 M_A_DQ42 M_B_DQS#5 DQS4 DQ43 M_B_DQ44 C361 10U/10V/X5R_8
68 151 146 140
M_A_DQS#4 DQS3 DQ42 M_A_DQ46 M_B_DQS#6 DQS5 DQ44 M_B_DQ45
129 153 167 142
M_A_DQS#5 DQS4 DQ43 M_A_DQ44 M_B_DQS#7 DQS6 DQ45 M_B_DQ47
146 140 (4) M_B_DQS#[0..7] 186 152
M_A_DQS#6 167 DQS5 DQ44 142 M_A_DQ45 DQS7 DQ46 154 M_B_DQ42 C388 .1U_4
M_A_DQS#7 DQS6 DQ45 M_A_DQ43 DQ47 M_B_DQ53
(4) M_A_DQS#[0..7] 186 152 157
DQS7 DQ46 M_A_DQ47 M_CLKOUT3 DQ48 M_B_DQ49 C362 .1U_4
154 (4) M_CLKOUT3 30 159
DQ47 M_A_DQ55 M_CLKOUT3# CK0 DQ49 M_B_DQ55
157 (4) M_CLKOUT3# 32 173
30 DQ48 159 M_A_DQ54 M_CLKOUT4 164 CK0 DQ50 175 M_B_DQ54 C342 .1U_4
(4) M_CLKOUT0 CK0 DQ49 (4) M_CLKOUT4 CK1 DQ51
32 173 M_A_DQ50 M_CLKOUT4# 166 158 M_B_DQ48
(4) M_CLKOUT0# CK0 DQ50 (4) M_CLKOUT4# CK1 DQ52
(4) M_CLKOUT1 164 175 M_A_DQ51 160 M_B_DQ52 C347 .1U_4
CK1 DQ51 M_A_DQ53 DQ53 M_B_DQ50
(4) M_CLKOUT1# 166 158 (4,8) M_CKE2 79 174
CK1 DQ52 160 M_A_DQ48 M_CLKOUT3 80 CKE0 DQ54 176 M_B_DQ51 C349 .1U_4
DQ53 (4,8) M_CKE3 CKE1 DQ55
79 174 M_A_DQ49 179 M_B_DQ60
(4,8) M_CKE0 CKE0 DQ54 DQ56
M_CLKOUT0 (4,8) M_CKE1 80 176 M_A_DQ52 (4,8) M_B_RAS# 108 181 M_B_DQ57 C345 .1U_4
CKE1 DQ55 M_A_DQ56 C176 RAS DQ57 M_B_DQ62
179 (4,8) M_B_CAS# 113 189
108 DQ56 181 M_A_DQ60 1.5P_4 109
CAS DQ58 191 M_B_DQ59 C309 .1U_4
(4,8) M_A_RAS# RAS DQ57 (4,8) M_B_WE# WE DQ59
C175 M_A_DQ59 M_CLKOUT3# M_B_DQ61
SO-DIMM
(4,8) M_A_CAS# 113 189 (4,8) M_B_CS#0 110 180
1.5P_4 CAS DQ58 M_A_DQ58 S0 DQ60 M_B_DQ56 C299 .1U_4
(4,8) M_A_WE# 109 191 (4,8) M_B_CS#1 115 182
M_CLKOUT0# WE DQ59 M_A_DQ57 M_CLKOUT4 S1 DQ61 M_B_DQ63
SO-DIMM
VSS20 VSS34
Quanta Computer Inc.
121
122
127
128
132
59
60
65
66
71
72
77
78
DDRII_SODIMM_R DDRII_SODIMM_R
Size Document Number Rev
DDR-II SODIMM*2 1A
Date: Monday, May 22, 2006 Sheet 7 of 34
A B C D E
+0.9V_VTER
R204 56_4
(4,7) M_CKE0
R233 56_4
(4,7) M_CKE1
R272 56_4
(4,7) M_CKE2
R280 56_4
(4,7) M_CKE3
R230 56_4
(4,7) M_ODT0
R197 56_4
(4,7) M_ODT1
R283 56_4
A (4,7) M_ODT2 A
R264 56_4
(4,7) M_ODT3
M_A_BS#0 R201 56_4
(4,7) M_A_BS#0
M_A_BS#1 R232 56_4
(4,7) M_A_BS#1
M_A_BS#2 R202 56_4
(4,7) M_A_BS#2
M_A_WE# R200 56_4
(4,7) M_A_WE#
M_A_CAS# R199 56_4
(4,7) M_A_CAS#
M_A_RAS# R231 56_4
(4,7) M_A_RAS#
M_B_BS#0 R268 56_4
(4,7) M_B_BS#0
M_B_BS#1 R286 56_4
(4,7) M_B_BS#1
M_B_BS#2 R270 56_4
(4,7) M_B_BS#2
M_B_WE# R267 56_4
(4,7) M_B_WE#
M_B_CAS# R266 56_4
(4,7) M_B_CAS#
M_B_RAS# R285 56_4
(4,7) M_B_RAS#
R229 56_4
(4,7) M_A_CS#0
R198 56_4
(4,7) M_A_CS#1
R203 56_4
(4,7) M_A_CS#2
R227 56_4
(4,7) M_A_CS#3
R284 56_4
B (4,7) M_B_CS#0 B
R265 56_4
(4,7) M_B_CS#1
R271 56_4
(4,7) M_B_CS#2
R281 56_4
(4,7) M_B_CS#3
(4,7) M_A_A[0..15]
M_A_A13 R228 56_4
+0.9V_VTER M_A_A10 R215 56_4
M_A_A0 RP9 1 2 0404-56X2
C296 *10U/6.3V/X5R M_A_A2 3 4
M_A_A4 RP10 1 2 0404-56X2
C363 *10U/6.3V/X5R M_A_A6 3 4
M_A_A7 RP11 1 2 0404-56X2
C270 .1U_4 M_A_A11 3 4
C393 .1U_4 M_A_A12 RP7 1 2 0404-56X2
C328 .1U_4 M_A_A9 3 4
C330 .1U_4 M_A_A3 RP5 1 2 0404-56X2
C329 .1U_4 M_A_A1 3 4
C368 .1U_4 M_A_A8 RP6 1 2 0404-56X2
C326 .1U_4 M_A_A5 3 4
C385 .1U_4 M_A_A14 RP12 1 2 0404-56X2
C327 .1U_4 M_A_A15 3 4
C346 *0.1U_4
C C288 *0.1U_4 C
C290 .1U_4
C379 .1U_4
(4,7) M_B_A[0..15]
C390 .1U_4 M_B_A0 RP16 1 2 0404-56X2
C339 .1U_4 M_B_A2 3 4
C369 .1U_4 M_B_A4 RP17 1 2 0404-56X2
C387 *0.1U_4 M_B_A6 3 4
C298 .1U_4 M_B_A7 RP18 1 2 0404-56X2
C273 .1U_4 M_B_A11 3 4
C350 .1U_4 M_B_A3 RP13 1 2 0404-56X2
C386 *0.1U_4 M_B_A1 3 4
C275 .1U_4 M_B_A8 RP14 1 2 0404-56X2
C384 .1U_4 M_B_A5 3 4
C283 .1U_4 M_B_A12 RP15 1 2 0404-56X2
C280 *0.1U_4 M_B_A9 3 4
C375 .1U_4 M_B_A10 R269 56_4
M_B_A13 R282 56_4
M_B_A14 RP19 1 2 0404-56X2
M_B_A15 3 4
D D
PROJECT : ED5
Quanta Computer Inc.
Size Document Number Rev
DDR-II TERMINATION 1A
D D
U16A
I/F
B P24 N23 HT_CTLIN0_P (3) B
(3) HT_CTLOUT0_P HT_RXCTLP HT_TXCTLP
P25 P23 HT_CTLIN0_N (3)
(3) HT_CTLOUT0_N HT_RXCTLN HT_TXCTLN
R336 49.9/F HT_RXCALP A24 C25 HT_TXCALP R59 100/F_4
HT_RXCALP HT_TXCALP
VDDHT_PKG HT_RXCALN C24 D24 HT_TXCALN
R335 49.9/F HT_RXCALN HT_TXCALN
RS485M A11 HT
A A
PROJECT : ED5
Quanta Computer Inc.
Size Document Number Rev
RS485-HT LINK0 I/F 1A
D D
C113 C440 C85 C26 C52 C156 C51 C121 C473 C103
.1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4
VIN VDD33 VIN +1.2V +1.8V +3V +3V +1.8V +1.2V +1.2V
U16B
VLDT_RUN VIN +1.8VSUS +1.8VSUS +5V +5V +1.8VSUS G5
GFX_RX0P PART 2 OF 5 GFX_TX0P
J1
G4 H2
GFX_RX0N GFX_TX0N
J8 K2
GFX_RX1P GFX_TX1P
J7 K1
GFX_RX1N GFX_TX1N
J4 K3
C97 C111 C169 C253 C68 C65 C548 GFX_RX2P GFX_TX2P
J5 L3
GFX_RX2N GFX_TX2N
.1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 L8 L1
GFX_RX3P GFX_TX3P
L7 L2
GFX_RX3N GFX_TX3N
L4 N2
GFX_RX4P GFX_TX4P
L5 N1
VCC_CORE VCC_CORE VCC_CORE VIN +3V GND +0.9V_VTER GFX_RX4N GFX_TX4N
M8 P2
GFX_RX5P GFX_TX5P
M7 P1
GFX_RX5N GFX_TX5N
M4 P3
GFX_RX6P GFX_TX6P
M5 R3
GFX_RX6N GFX_TX6N
P8 R1
GFX_RX7P GFX_TX7P
P7 R2
GFX_RX7N GFX_TX7N
P4 T2
GFX_RX8P GFX_TX8P
P5 U1
GFX_RX8N GFX_TX8N
R4 V2
GFX_RX9P GFX_TX9P
R5 V1
C GFX_RX9N GFX_TX9N C
R7 V3
GFX_RX10P GFX_TX10P
R8 W3
GFX_RX10N GFX_TX10N
U4 W1
PCIE I/F
GFX_RX11P GFX_TX11P
U5 W2
GFX_RX11N GFX_TX11N
W4 Y2
GFX_RX12P GFX_TX12P
W5 AA1
GFX_RX12N GFX_TX12N
GFX
Y4 AA2
GFX_RX13P GFX_TX13P
Y5 AB2
GFX_RX13N GFX_TX13N
V9
GFX_RX14P GFX_TX14P
AB1 Place these caps
W9 AC1 close to connector
GFX_RX14N GFX_TX14N
AB7 AE3
GFX_RX15P GFX_TX15P
AB6 AE4
GFX_RX15N GFX_TX15N
W11 AD8 GPP_TX0P_C C63 .1U_4
(23) LAN_PCIE_RXP0 GPP_RX0P GPP_TX0P LAN_PCIE_TXP0 (23)
W12 AE8 GPP_TX0N_C C62 .1U_4
(23) LAN_PCIE_RXN0 GPP_RX0N GPP_TX0N LAN_PCIE_TXN0 (23)
AA11 AD7 GPP_TX1P_C C41 .1U_4
(24) PCIE_RXP1 GPP_RX1P GPP_TX1P PCIE_TXP1 (24)
AB11 AE7 GPP_TX1N_C C48 .1U_4
(24) PCIE_RXN1 GPP_RX1N GPP_TX1N PCIE_TXN1 (24)
PCIE I/F GPP GPP_TX2P_C C32 .1U_4
Y7 AD4 MINI_PCIE_TXP2 (19)
(19) MINI_PCIE_RXP2 GPP_RX2P GPP_TX2P GPP_TX2N_C C34 .1U_4
(19) MINI_PCIE_RXN2 AA7 AE5 MINI_PCIE_TXN2 (19)
GPP_RX2N GPP_TX2N
AB9 AD5 GPP_TX3P_C C35 .1U_4
(19) MINI_PCIE_RXP3 GPP_RX3P GPP_TX3P MINI_PCIE_TXP3 (19)
AA9 AD6 GPP_TX3N_C C36 .1U_4
(19) MINI_PCIE_RXN3 GPP_RX3N GPP_TX3N MINI_PCIE_TXN3 (19)
W14 AE9 A_TX0P_C C54 .1U_4
(14) A_RX0P SB_RX0P SB_TX0P A_TX0P (14)
W15 PCIE I/F SB AD10 A_TX0N_C C66 .1U_4
(14) A_RX0N SB_RX0N SB_TX0N A_TX0N (14)
AB12 AC8 A_TX1P_C C44 .1U_4
(14) A_RX1P SB_RX1P SB_TX1P A_TX1P (14)
AA12 AD9 A_TX1N_C C50 .1U_4
B (14) A_RX1N SB_RX1N SB_TX1N A_TX1N (14) B
R47 10K_4 AA14 AD11 R49 150/F_4 VDDA12_PKG2
R54 8.25K/F_6 AB14 PCE_ISET(PCE_CALI) PCE_PCAL(PCE_CALRP)
AE11 R46 100/F_4
PCE_TXISET(NC) PCE_NCAL(PCE_CALRN)
R214: 10KOhm FOR RS485
1.47KOhm FOR R216: 150 Ohm FOR RS485
RS485M A11 HT 562 Ohm FOR RS690
R213: RS690
8.25KOhm FOR RS485
DNI FOR RS690 R215: Ward update to 100 Ohm FOR RS485
2KOhm FOR RS690
A A
PROJECT : ED5
Quanta Computer Inc.
Size Document Number Rev
RS485-PCIE LINK I/F 1A
Date: Monday, May 22, 2006 Sheet 10 of 34
5 4 3 2 1
2
C93 BK1608LM252-T
2
C475 C83 C88 C472
10U/10V/X5R_8 4.7U/6.3V_6 10U/10V/X5R_8 2.2U/10V/X5R C91 C469
F3C UPDATE P/N FOR 10U/6.3V_6 2.2U/10V/X5R
1
.1U_4
1
R333 0_6 CRT RIPPLE
CRT/TVOUT
close to NB C471 TV_C/R_SYS C21 B16
C_R TXOUT_U0N T100
GND_AVSSQ .1U_4 TV_Y/G_SYS C20 C17 R56 0_6
Y_G TXOUT_U1P T15
TV_COMP_SYS D19 C18
COMP_B TXOUT_U1N T95
B17 T98
TXOUT_U2P
(20) VGA_RED E19 A17 T97
RED TXOUT_U2N GND_LPVSS
(20) VGA_GRN F19 A18 T102
GREEN TXOUT_U3P
(20) VGA_BLU G19 B18 T104
BLUE TXOUT_U3N
(20) VSYNC C6
DACVSYNC
(20) HSYNC A5
DACHSYNC TXCLK_LP
E15 TXLCLKOUT+ (20) RS485: LVDDR18A=1.8V
R66 R67 R68 D15
TXCLK_LN TXLCLKOUT- (20)
R337 715/F B21 H15
150/F_6 150/F_6 150/F_6 RSET TXCLK_UP
G15
T7 CHECK
L19 BK1608HS600 +1.8V
TXCLK_UN T8
(20) DDCCLK
R25 0_4 B6
DACSCL TO
LVDS
R24 0_4 A6 D14 C84
C (20) DDCDAT DACSDA LPVDD
E14 C72 220OHM +1.8V C
+1.8V +3V LPVSS 4.7U/6.3V_6 L56
PLLVDD A10 .1U_4
PLLVDD(PLLVDD18) L13
B10 A12 GND_LPVSS
PLLVSS LVDDR18D_1
BK1608HS600
B12
LVDDR18D_2 BK1608HS600
HTPVDD B24 C12
R26 HTPVDD LVDDR18A_1
B25 C13
R21 HTPVSS LVDDR18A_2
10K_4 1K/F_4 R40 0_4 NB_RST#
PWR
C10 A16
PLL
(14,19,21,23,24) ALINK_RST# SYSRESET# LVSSR1
C11 A14
(5,28) NB_PWRGD POWERGOOD LVSSR3
PM
LDT_STOP#_NB R37 0_4 LDT_STOP#_NB C5 D12 C73
LDTSTOP# LVSSR5
2
CLOCKs
(13) NB_OSC T91 PLLVDD12 OSCIN R55 0_6
A11
OSCOUT(PLLVDD12)
(13) NBSRC_CLKP F2
GFX_CLKP LCD_PON R331 0_4
E1 E12 LCD_POWER_ON (20)
(13) NBSRC_CLKN GFX_CLKN LVDS_DIGON LVDS_BLON GND_LVSSR
G12
LVDS_BLON
G1 F12 T3
+3V (13) SBLINK_CLKP SB_CLKP LVDS_BLEN
G2
R22 2K/F (13) SBLINK_CLKN SB_CLKN
LOAD_ROM#: LOAD ROM STRAP ENABLE DVO_D0(GPP_TX4P)
AD14 T96
STRP_DATA R29 *2.7K_4 DFT_GPIO0 D6 AD15
DFT_GPIO0 DVO_D1(GPP_TX4N) T5
R38 3K LOAD_ROM# D7 AE15
DFT_GPIO1 DVO_D2(NC) T93
R23 10K_4 High, LOAD ROM STRAP DISABLE R30 *2.7K_4 DFT_GPIO2 C8 AD16
DFT_GPIO2 DVO_D3(GPP_RX4P) T11
TV_SWITCH R31 *2.7K_4 DFT_GPIO3 C7 AE16
B DFT_GPIO3 DVO_D4(GPP_RX4N) T101 B
Low, LOAD ROM STRAP ENABLE R35 *2.7K_4 DFT_GPIO4 B8 AC17
DFT_GPIO4 DVO_D5(NC) T18
R36 *2.7K_4 DFT_GPIO5 A8 AD18 T14
DVO
D6 RB751 DFT_GPIO5 DVO_D6(NC)
AE19
MIS.
DVO_D7(GPP_TX5N) T17
(14) BMREQ# 2 1 B2 AD19 T106
BMREQb DVO_D8(GPP_TX5P)
(20) PHL_CLK A2 AE20 T16
I2C_CLK DVO_D9(GPP_RX5N)
(20) PHL_DATA B4 AD20 T108
I2C_DATA DVO_D10(GPP_RX5P)
T6 AA15 AE21 T107
THERMALDIODE_P DVO_D11(NC)
T10 AB15
THERMALDIODE_N
AD13 T99
DVO_VSYNC(NC)
T4 C14 AC13 T103
TMDS_HPD DVO_DE(NC)
T2 B3 AE13 T92
DDC_DATA DVO_HSYNC(NC)
C3 AE17 T12
STRP_DATA A3 TESTMODE DVO_IDCKP(NC) R330 2K/F
AD17 T105
STRP_DATA DVO_IDCKN(NC) LCD_PON
R34
4.7K/F_4
+3V
ECN 2A:
BOM Lose and stuff R43
RS485 RS690 U7
5
LVDS_BLON 1 R43 0_4
OSCOUT(A11) OSCOUT PLLVDD12 4 BLON (20)
NB_PWRGD 2
DVO_D0(AD14) DVO_D0 GPP_TX4P
NC7SZ08P5X_NL
3
A A
DVO_D1(AD15) DVO_D1 GPP_TX4N
DVO_D3(AD16) DVO_D3 GPP_RX4P
DVO_D4(AE16) DVO_D4 GPP_RX4N
DVO_D7(AE19) DVO_D7 GPP_TX5N PROJECT : ED5
DVO_D8(AD19) DVO_D8 GPP_TX5P
Quanta Computer Inc.
DVO_D9(AE20) DVO_D9 GPP_RX5N
Size Document Number Rev
DVO_D10(AD20) DVO_D10 GPP_RX5P RS485-SYSTEM I/F & CLKGEN 2A
Date: Monday, May 22, 2006 Sheet 11 of 34
5 4 3 2 1
AE10
AC10
AE6
AC4
AC2
AD1
AC5
AC6
AC7
AD3
AC9
AA3
V12
V11
V14
V15
Y15
Y11
Y12
Y14
W6
M3
M2
M6
G3
G6
A1
H1
H3
P6
N3
P9
R6
U2
U3
U6
Y1
Y3
Y9
R9
F3
F1
T1
T3
L6
J2
J6
J3
U16E
VSSA1
VSSA2
VSSA3
VSSA4
VSSA5
VSSA6
VSSA7
VSSA8
VSSA9
VSSA10
VSSA11
VSSA12
VSSA13
VSSA14
VSSA15
VSSA16
VSSA17
VSSA18
VSSA19
VSSA20
VSSA21
VSSA22
VSSA23
VSSA24
VSSA25
VSSA26
VSSA27
VSSA28
VSSA29
VSSA30
VSSA31
VSSA32
VSSA33
VSSA34
VSSA35
VSSA36
VSSA37
VSSA38
VSSA39
VSSA40
VSSA41
VSSA42
VSSA43
VSSA44
VSSA45
VSSA46
VSSA47
VSSA48
RS485M A11 HT
D D
PAR 5 OF 5
GROUND
SUGGEST REMOVE L11 BEAD SAME AS CPU
1.2 PLAN FSB UNDER THIS PLAN
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VLDT_RUN
AE18
AD25
AC23
AC14
AC22
AE22
AE14
AC15
AC16
W23
W24
M15
M11
M20
M23
M25
M17
M13
G11
G23
G24
A25
D23
Y23
P11
R24
N12
N14
P13
P20
P15
R12
R14
R20
Y25
U20
H25
Y22
D25
H12
R23
R17
H23
A23
F11
T23
T25
F17
L12
L14
L20
L23
L24
J22
J12
E9
B7
C4
D4
80 ohm(4A) +1.2V
80 ohm(4A)
L54
FBJ3216HS800
VDDA12
POWER
SW1010C AD21 B1
+1.8V VDD18 VDD_HT9 VDDA12_9
AC19
VDD_HT10 VDDA12_10
D3
VCC_NB
D3A:Remove Jump
L18 TI201209G121 AC20 L9
VDD_HT11 VDDA12_11 +1.2V
AB19 E6
VDD_HT12 VDDA12_12
2
AD23
C67 C467 VDD_HT13
AA17 L11
2.2U/10V/X5R 2.2U/10V/X5R VDD_HT14 VDDC_1
AE25 L13
VDD_HT15 VDDC_2 C466 C460
L15
1
PROJECT : ED5
Quanta Computer Inc.
Size Document Number Rev
RS485-POWER 1A
Date: Monday, May 22, 2006 Sheet 12 of 34
5 4 3 2 1
+3V
CLK_VDD +3V
L30 BK1608HS600 L28 BK1608HS600
CLK_VDDA
22 ohm/1A
C185 C183 C186 C179 C184 C171 C178 C165 C172 C174 C170
22U/10V_8 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 22U/10V_8
D D
2
58 18 SBSRC_CLKP_R R128 33/F_4
GNDHTT SRCCLKT1 SBSRCCLK (14)
R102 19 SBSRC_CLKN_R R132 33/F_4
SRCCLKC1 SBSRCCLK# (14)
R113 *1M_4 CLK_XIN 3 20 GPP_CLK0P_R R134 33/F_4
XIN SRCCLKT2 CLK_PCIE_MINI_A (19)
21 GPP_CLK0N_R R138 33/F_4
C SRCCLKC2 CLK_PCIE_MINI_A# (19) C
10K_4 C130 33P_4 CLK_XOUT_R
R101 0_4 CLK_XOUT GPP_CLK1P_R R145 33/F_4
1
4 24 CLK_PCIE_LAN (23)
Y3 XOUT SRCCLKT3 GPP_CLK1N_R R149 33/F_4
25 CLK_PCIE_LAN# (23)
14.31818MHZ SRCCLKC3 GPP_CLK2P_R R150 33/F_4
26 CLK_PCIE_NEW (24)
SRCCLKT4 GPP_CLK2N_R R153 33/F_4
27 CLK_PCIE_NEW# (24)
SRCCLKC4 GPP_CLK3P_R R130 33/F_4
11 47 CLK_PCIE_MINI_B (19)
RESET_IN# SRCCLKT5 GPP_CLK3N_R R135 33/F_4
61 46 CLK_PCIE_MINI_B# (19)
NC SRCCLKC5 R540 2.2K_4
43
+3V SRCCLKT6 CLK_VDD
42
SRCCLKC6 R541 2.2K_4
12
SRCCLKT7
R136
R131
R154
R151
R148
R144
R139
R137
R133
R129
R147
R142
R125
R122
13
SRCCLKC7
9 57 R117 0_4
(7) SMBCK SMBCLK CLKREQA# MINI_CLKREQ3# (19)
10 32 R156 0_4
(7) SMBDT SMBDAT CLKREQB# NEW_CLKREQ# (24)
Q15 R110 R106 33
CLKREQC# T51
2
49.9/F
49.9/F
49.9/F
49.9/F
49.9/F
49.9/F
49.9/F
49.9/F
49.9/F
49.9/F
49.9/F
49.9/F
49.9/F
49.9/F
*2N7002E-LF*10K_4 *10K_4
48 7 CLK_48M_1_R
SMBDT IREF 48MHz_1 CLK_48M_2_R
(15,19,24) PDAT_SMB 3 1 Ioh = 5 * Iref 48MHz_0
6
(2.32mA) R126 R119 33/F_4
CLK48_PCM (24)
R535 0_4 Voh = 0.71V @ 60 ohm 475/F_4 63 R115 33/F_4
FS1/REF1 USBCLK (15)
64
+3V FS0/REF0 CLK_VDD
62
FS2/REF2
59
Q14 HTTCLK0
2
A A
PROJECT : ED5
Quanta Computer Inc.
Size Document Number Rev
EXTERNAL CLOCK GENERATOR 1A
Date: Monday, May 22, 2006 Sheet 13 of 34
5 4 3 2 1
5
1 EC_PWRGD U23A Reserved For EMI
4
(11,19,21,23,24) ALINK_RST#
2
16mA AG10
SB460 SB 27x27mm U2 PCI_MINI R441 22_4 PCLK_MINI PCLK_MINI C527 *33P_4
A_RST# PCICLK0 PCLK_MINI (17,18)
Part 1 of 4 T2 PCI_591 R431 22_4 PCLK_591 PCLK_591 C522 *33P_4
PCICLK1 PCLK_591 (17,28)
J24 U1 PCI_PCM R442 22_4 PCLK_PCM PCLK_PCM C528 *33P_4
3
(13) SBSRCCLK PCIE_RCLKP PCICLK2 PCLK_PCM (17,24)
J25 V2 PCI_SIO R443 22_4 PCLK_SIO PCLK_SIO C529 *33P_4
(13) SBSRCCLK# PCIE_RCLKN PCICLK3 PCLK_SIO (17)
CLKS
W3 PCI_CLK4 R445 22_4 PCICLK4 PCICLK4 C531 *33P_4
PCICLK4 PCICLK4 (17)
R221 *0_4 C497 .01U_4 A_RX0P_C PCI_LAN R437 22_4 PCLK_LAN PCLK_LAN C526 *33P_4
PCI
(10) A_RX0P P29 U3 PCLK_LAN (17)
C496 .01U_4 A_RX0N_C PCIE_TX0P PCICLK5 PCI_CLK6 R444 22_4 PCICLK6 PCICLK6 C530 *33P_4
(10) A_RX0N P28 V1 PCICLK6 (17)
C495 .01U_4 A_RX1P_C PCIE_TX0N PCICLK6 SPDIF_RR R439 0_4
SB CALIBRATION RESISITOR VALUE (10) A_RX1P M29
PCIE_TX1P SPDIF_OUT/PCICLK7/GPIO41
T1 SB_SPDIF_OUT (17)
D C494 .01U_4 A_RX1N_C M28 D
(10) A_RX1N PCIE_TX1N
SB600 SB460 K29 AJ9 PCIRST#_C
T116 PCIE_TX2P PCIRST#
T115 K28
PCIE_TX2N AD[0..31]
R1735 562 OHM 1% 150 OHM 1% T114 H29
PCIE_TX3P AD[0..31] (17,18,24)
H28 W7 AD0
T117 PCIE_TX3N AD0/ROMA18
2.05K 1% 150 OHM 1% Y1 AD1
R1737 AD1/ROMA17 AD2 +3V C523
(10) A_TX0P T25 W8
PCIE_RX0P AD2/ROMA16 AD3 .1U_4
R1738 0 ohm 4.12K 1% (10) A_TX0N T26
PCIE_RX0N AD3/ROMA15
W5
T22 AA5 AD4
(10) A_TX1P PCIE_RX1P AD4/ROMA14
T23 Y3 AD5
(10) A_TX1N PCIE_RX1N AD5/ROMA13
M25 AA6 AD6 U25
T66 PCIE_RX2P AD6/ROMA12 (5,15,28) EC_PWRGD
M26 AC5 AD7 NC7SZ08P5X_NL
T62 PCIE_RX2N AD7/ROMA11
5
M22 AA7 AD8 PCIRST#_C 1
T70 PCIE_RX3P AD8/ROMA9
M23 AC3 AD9 4 PCIRST#
T67 PCIE_RX3N AD9/ROMA8 PCIRST# (18,23,24,28)
AC7 AD10 2
R382 150/F_6 PCIE_CALRP AD10/ROMA7 AD11
PCI EXPRESS
E29 AJ7
R383 150/F_6 PCIE_CALRN PCIE_CALRP AD11/ROMA6 AD12 C517 R452 C532
E28 AD4
3
PCIE_VDDR PCIE_CALRN AD12/ROMA5
INTERFACE
AB11 AD13 *82P_4 8.2K_4 82P_4
+1.8V L61 R381 4.12K/F_6 PCIE_CALI AD13/ROMA4 AD14
E27 AE6
SBK160808T-301Y-S PCIE_CALI AD14/ROMA3 AD15
AC9
PCIE_PVDD AD15/ROMA2 AD16
U29 AA3
PCIE_PVDD AD16/ROMD0 AD17 R454 *0_4
AJ4
AD17/ROMD1
PCIE Power
C492 C493 C498 U28 AB1 AD18 ECN 2A
PCIE_PVSS AD18/ROMD2 AD19 +3V
AH4 BOM CHANGE AND UNMOUNTED R454
10U/10V/X5R_8 1U/10V_4 .1U_4 AD19/ROMD3 AD20
F27 AB2
PCIE_VDDR_1 AD20/ROMD4 AD21 PCI_LOCK# R253 8.2K_4
F28 AJ3
PCIE_VDDR_2 AD21/ROMD5 AD22 INTE# R251 8.2K_4
F29 AB3
PCIE_VDDR_3 AD22/ROMD6 AD23 INTF# R479 8.2K_4
G26 AH3
PCIE_VDDR_4 AD23/ROMD7 AD24 INTG# R262 8.2K_4 C360
G27 AC1
PCI INTERFACE
PCIE_VDDR_5 AD24 AD25 INTH# R252 8.2K_4
G28 AH2 .1U_4
C +1.8V PCIE_VDDR_6 AD25 AD26 C
G29 AC2
L35 PCIE_VDDR PCIE_VDDR_7 AD26 AD27
J27 AH1
TI201209G121 PCIE_VDDR_8 AD27 AD28
J29 AD2
PCIE_VDDR_9 AD28 AD29
L25 AG2
PCIE_VDDR_10 AD29 AD30
L26 AD1
C225 C243 C239 C233 C244 C246 C238 C234 C237 C236 PCIE_VDDR_11 AD30 AD31
L29 AG1
PCIE_VDDR_12 AD31 +3V
N29 AB9 CBE0# (18,24)
.1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 PCIE_VDDR_13 CBE0#/ROMA10
AF9 CBE1# (18,24)
CBE1#/ROMA1 R183 10K_4
AJ5 CBE2# (18,24)
22U/10V_8 CBE2#/ROMWE# SERIRQ
AG3 CBE3# (18,24)
CBE3# FRAME#
AA2 FRAME# (18,24)
FRAME# DEVSEL# RN6 8.2KX4_4
AH6 DEVSEL# (18,24)
DEVSEL#/ROMA0 IRDY# PERR# C240
AG5 IRDY# (18,24) 2 1
IRDY# TRDY# FRAME#
ATi Recommend TRDY#/ROMOE#
AA1 TRDY# (18,24) 4 3 .1U_4
AF7 PAR TRDY# 6 5
Vendor: NSK PAR/ROMA19 STOP#
PAR (18,24)
STOP#
Y2 STOP# (18,24) 8 7
Part Number: NXG 32.768KAE12FUD 16 PPM. STOP# PERR#
AG8 PERR# (18,24)
32K_X1 PERR# SERR# RN7 8.2KX4_4
AC11 SERR# (18,24)
SERR# REQ0# REQ4#
AJ8 2 1
Y6 32.768KHZ REQ0# REQ1# DEVSEL#
AE2 4 3
32K_X2 REQ1# REQ2# REQ0#
1 4 AG9 REQ2# (18) 6 5
REQ2# REQ3# REQ2#
2 3 AH8 REQ3# (24) 8 7
REQ3#/GPIO70 REQ4#
AH5
RTC R256
20M_4
R226 20M_4
REQ4#/GPIO71
GNT0#
GNT1#
AD11
AF2
GNT0#
GNT1#
GNT2#
GNT0#
GNT2#
RN4
2
*8.2KX4_4
1
AH7 GNT2# (18) 4 3
D27 RB751 C366 C352 GNT2# GNT3# GNT3#
AB12 GNT3# (24) 6 5
VCCRTC 18P_4 18P_4 GNT3#/GPIO72 GNT4# GNT1#
+3VPCU 2 1 AG4 8 7
GNT4#/GPIO73 CLKRUN#
AG7 CLKRUN# (18,24,28)
R480 CLKRUN# PCI_LOCK# RN5 8.2KX4_4
AF6
B 1K/F_4 D26 RB751 LOCK# REQ3# B
2 1
RTC_N02 2 1 ATI recommand have internal pull-up AD3 INTE# SERR# 4 3
CPU_PWR_SB INTE#/GPIO33 INTE# (24)
AF1 INTF# REQ1# 6 5
INTF#/GPIO34 INTF# (18)
2
.1U_4
FOR SB460, CONNECT TO 32K_X2 C1
R290 X2 LAD0 PAR R254 *8.2K_4
SSMUXSEL/GPIO0 AG24 LAD0/FWH0 (28)
R180 *0_4 LAD0 LAD1
100/F_6 (5,15) CPU_PWRGD AC26 AG25 LAD1/FWH1 (28)
H_INTR CPU_PG/LDT_PG LAD1 LAD2 LAD3 R179 100K/F_4
T60 W26 AH24 LAD2/FWH2 (28)
H_NMI INTR/LINT0 LAD2 LAD3
W24 AH25
LPC
T64 NMI/LINT1 LAD3 LAD3/FWH3 (28)
H_INIT# W25 AF24 LFRAME#/FWH4 LAD2 R401 100K/F_4
T65 INIT# LFRAME# LFRAME#/FWH4 (17,28)
Q31 AA24 AJ24 LDRQ#0
T68 SMI# LDRQ0#
MMBT3904 (5,11,15) LDT_STOP# AA23 AH26 LDRQ#1 LAD1 R182 100K/F_4
3VRTC SLP#/LDT_STP# LDRQ1#/GNT5#/GPIO68
1 3 RTC_N01 R481 1.5K/F_6
RTC_N04 R482 1.5K/F_6
+5VSUS T71
H_IGNNE# AA22 W22 BMREQ#
BMREQ# (11)
H_A20M# IGNNE#/SIC BMREQ#/REQ5#/GPIO65 SERIRQ LAD0 R185 100K/F_4
T61 AA26 AF23 SERIRQ (18,24,28)
A20M#/SID SERIRQ
CPU
H_FERR# Y27
T59 FERR#
R486 (11) ALLOW_LDTSTOP AA25 D3 BMREQ# R173 10K_4
STPCLK#/ALLOW_LDTSTP RTCCLK RTC_CLK (17)
4.7K/F_6 STP_CPU# AH9 F5
T133 CPU_STP#/DPSLP_3V# RTC_IRQ#/GPIO69 AUTO_ON# (17)
RTC
R168
10K_4
H_DPSLP#
PROJECT : ED5
SB-1 Size
Custom
Date:
Document Number
5 4 3 2 1
ACPI / WAKE
(5,14,28) EC_PWRGD PWR_GOOD T130 CHANGE R414'S FOOTPRINT TO 0402
D USB_ATEST0 D
UP EVENTS
SUS_STAT# B3 KBSMI# R420 4.7K/F_4
+3V_S5 SUS_STAT#
F9 H12 T76
R194 10K_4 TEST2 USB_HSDP9+ RP20 10KX2_4
E9 G12 T74
R193 10K_4 TEST1 USB_HSDM9- USB_OCP2# C367
G9 1 2
GATEA20 TEST0 USB0: M/B IO SCI#
AF26 E12 3 4 .1U_4
USB INTERFACE
(28) GATEA20 GA20IN USB_HSDP8+ T75
RCIN# AG26 D12 T73 USB1: M/B IO
(28) RCIN# KBRST# USB_HSDM8-
SUS_STAT# R433 10K_4 SWI# D7 USB2: D/B IO
(28) SWI# LPC_PME#/GEVENT3#
EXTEVNT1# C25 E14 USBP7+ (22)
LPC_SMI#/EXTEVNT1# USB_HSDP7+ USB3: D/B IO +3V_S5
SUSB# R211 4.7K/F_4 GEVENT5# D9 D14 USBP7- (22)
SUSC# R218 4.7K/F_4 GPM7# S3_STATE/GEVENT5# USB_HSDM7- USB4: NEW CARD RP8 10KX2_4
F4
DNBSWON# R238 10K_4 PCIE_WAKE# SYS_RESET#/GPM7# USB5: MINI CARD USB_OCP9#
(19,24) PCIE_WAKE# E7 G14 USBP6+ (20) 1 2
EMAIL_LED# WAKE#/GEVENT8# USB_HSDP6+ USB_OCP8#
C2 H14 USBP6- (20) USB6: DSC 3 4
PME# R434 4.7K/F_4 SB_THERMTRIP# BLINK/GPM6# USB_HSDM6-
(5) SB_THERMTRIP# G7 USB7: BLUETOOTH
SWI# R207 10K_4 SMBALERT#/THRMTRIP#/GEVENT2# RN3 10KX4_4
D16 USBP5+ (19)
USB_HSDP5+ USB_OCP3#
Delay 20ms after S5 powerOK USB_HSDM5-
E16 USBP5- (19) 2 1
EMAIL_LED# R436 10K_4 (28) RSMRST#
RSMRST# E2 USB_OCP4# 4 3
C525 RSMRST# USB_OCP6#
OSC / RST USB_HSDP4+
D18 USBP4+ (24) USB power 6 5
.1U_4 (13) SB_OSCIN R402 0_4 SB_14M_X1 B23 E18 USBP4- (24) USB_OCP7# 8 7
RI# R435 10K_4 14M_OSC USB_HSDM4-
GPIO10 C28 G16 AVDD_USB L63 +3VSUS
SATA_IS0#/GPIO10 USB_HSDP3+ USBP3+ (22)
GPM7# R422 10K_4 GPIO1 A26 H16 USBP3- (22) TI201209G121
GEVENT5# R456 10K_4 CPU_PROCHOT# ROM_CS#/GPIO1 USB_HSDM3-
(5) CPU_PROCHOT# B29
PCIE_WAKE# R210 4.7K/F_4 GPIO7 GHI#/SATA_IS1#/GPIO6
A23 G18 USBP2+ (22)
RST_HDD# WD_PWRGD/GPIO7 USB_HSDP2+
(21) RST_HDD# B27 H18 USBP2- (22)
MAX6648_AL# R457 10K_4 GPIO5 SMARTVOLT/SATA_IS2#/GPIO4 USB_HSDM2- C514 C297 C289 C274
D23
PCSPK SHUTDOWN#/GPIO5 1U/10V_4 .1U_4 .1U_4
(26) PCSPK B26 D19 USBP1+ (22)
+3V PCLK_SMB SPKR/GPIO2 USB_HSDP1+
(13,19,24) PCLK_SMB C27 E19 USBP1- (22)
SCL0/GPOC0# USB_HSDM1-
GPIO
(13,19,24) PDAT_SMB PDAT_SMB B28 22U/10V_8
C SDA0/GPOC1# C
C3 G19 USBP0+ (22)
SB_THERMTRIP# R214 10K_4 F3 SCL1/GPOC2# USB_HSDP0+ H19
SDA1/GPOC3# USB_HSDM0- USBP0- (22)
BOARD_ID1 D26
BOARD_ID0 C26 DDC1_SCL/GPIO9
EXTEVNT1# R171 10K_4 R391 0_4 GPIO0 DDC1_SDA/GPIO8
(5,14) CPU_PWRGD A27 B9 AVDD_USB
GPIO5 R408 4.7K/F_4 C217 SB_LLB# A4 SSMUXSEL/SATA_IS3#/GPIO0 AVDDTX_0 B11
LLB#/GPIO66 AVDDTX_1
.1U_4 B13
PCLK_SMB R165 2.2K_4 ECN E3B Stuff +3V AVDDTX_2 B16 C267 C262 C281
PDAT_SMB R379 2.2K_4 USB_OCP9# AVDDTX_3 .1U_4 .1U_4 .1U_4
Q41 C6 B18
USB_OCP8# C5 USB_OC9#/SLP_S2/GPM9# AVDDTX_4 A9
SB_LLB# R432 *10K_4 Q41 USB_OCP7# USB_OC8#/AZ_DOCK_RST#/GPM8# AVDDRX_0
C4 B10
2
USB OC
GPIO7 R403 10K_4 (22) USB_OCP3# USB_OCP3# C8 SBK160808T-301Y-S
RCIN# R184 4.7K/F_4 1 3 USB_OCP2# C7 USB_OC3#/GPM3# A12
(24)CPPE# USB_OC2#/GPM2# AVDDC
(28) SCI# SCI# B8
2
GPIO10 R380 10K_4 KBSMI# A8 USB_OC1#/GPM1# A13
(28) KBSMI# USB_OC0#/GPM0# AVSSC
GPIO13 R261 10K_4 C512 C513 C511
A16 2.2U/10V/X5R 1U/10V_4 .1U_4
GPIO31 R175 10K_4 AZ_BITCLK AVSS_USB_1
N2 C9
1
AZALIA
AZ_SDOUT M2 AZ_BITCLK AVSS_USB_2 C10
AZ_SDOUT AVSS_USB_3
K2 C11
T137 AZ_SYNC L3
AZ_SDIN3/GPIO46 AVSS_USB_4
C12
AZ_SYNC AVSS_USB_5
USB PWR
K3 C13
T78 AZ_RST# AVSS_USB_6
C14
GPIO14 R208 10K_4 AC_BITCLK_R AVSS_USB_7
L1 C16
RST_HDD# R390 10K_4 T136 AC_SDOUT AC_BITCLK/GPIO38 AVSS_USB_8
(17) AC_SDOUT L2 C17 For SATA mount R172, For
B GPIO1 R394 10K_4 CD_SDIN0 AC_SDOUT/GPIO39 AVSS_USB_9 B
(26) CD_SDIN0 L4 C18 PATA mount R176
GPIO3 R404 10K_4 AZ_SDIN1 J2 ACZ_SDIN0/GPIO42 AVSS_USB_10
C19
(26) AZ_SDIN1 ACZ_SDIN1/GPIO43 AVSS_USB_11
AC97
GPIO0 R392 *10K_4 AC_SDIN2 J4 C20
PCSPK R393 10K_4 T79 AC_SYNC_R M3 ACZ_SDIN2/GPIO44 AVSS_USB_12 D11
CPU_PROCHOT# R385 10K_4 T80 AC_RST# AC_SYNC/GPIO40 AVSS_USB_13 +3V
L5 D21
T77 AC_RST#/GPIO45 AVSS_USB_14 E11 *10K_4@SATA 10K_4@PATA
If throttling from SM remore R264 R455 10K_4 AVSS_USB_15 R172 BOARD_ID0 R176
+3V_S5 E21
AVSS_USB_16 F11
GPIO3 AVSS_USB_17 R164 *10K_4BOARD_ID1 R167 10K_4
E23 F12
AC_SDIN2 R196 10K_4 T119 GPIO31 AC21 NC1 AVSS_USB_18
F14
AZ_SDIN1 R212 10K_4 GPIO13 NC2 AVSS_USB_19
AD7 F16
CD_SDIN0 R206 10K_4 H_DPSLP# AE7 NC3 AVSS_USB_20
F18
(14) H_DPSLP# NC4 AVSS_USB_21
AC_BITCLK_R R255 10K_4 GPIO14 AA4 F19
AZ_RST# R426 10K_4 MAX6648_AL# T4 NC5 AVSS_USB_22 F21
(5) MAX6648_AL# NC6 AVSS_USB_23
AZ_SYNC R237 10K_4 R240 0_4 D4 G11
AZ_SDOUT R235 10K_4
(5,11,14) LDT_STOP#
T72
AB19 NC7
NC8
AVSS_USB_24
AVSS_USB_25
G21 ALAN????
AZ_BITCLK R234 10K_4 H11
ECB 2A AVSS_USB_26 H21
AVSS_USB_27
BOM CHAGE AND STUFF R240. J11
AVSS_USB_28 J12 Board ID ID1 ID0
For CPU speed issue. AVSS_USB_29
J14
AVSS_USB_30 J16
AVSS_USB_31 A-Test
AVSS_USB_32
J18 00
J19
R249 39_4 AVSS_USB_33
(26) CD_BITCLKA_MDC 01
C358 10
*22P_4 SB460
A 11 A
SB-2
R245 39_4 AZ_SDOUT R243 39_4 AZ_SYNC R429 39_4 AZ_RST#
(26) AZ_SDOUTA (26) AZ_SYNCA (26) AZ_RESET#
Size Document Number Rev
C357 *22P_4 C355 *22P_4 C518 *22P_4 Custom 2A
SB460M ACPI/GPIO/USB/AC97
Date: Monday, May 22, 2006 Sheet 15 of 34
5 4 3 2 1
L34
U23B FBJ3216HS800 U23C
+3V VDDQ_3V
C504 .01U_4 SATA_TX0+_C AH21 80ohm/4A A25 A1
(21) SATA_TXP0
C507 .01U_4 SATA_TX0-_C AJ21
SATA_TX0+ SB460 SB 27x27mm AB29 C219 A28
VDDQ_1 SB4600 SB 27x27mm
VSS_1
A20
(21) SATA_TXN0 SATA_TX0- IDE_IORDY PHDRDY (21) VDDQ_2 VSS_2
Part 2 of 4 AA28 C314 C305 C318 C251 C249 C29 Part 3 of 4 A21
IDE_IRQ IRQ14 (21) VDDQ_3 VSS_3
(21) SATA_RXN0 AH20 AA29 100U/6.3V_3528 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 D24 A29
SATA_RX0- IDE_A0 PDA0 (21) VDDQ_4 VSS_4
(21) SATA_RXP0 AJ20 AB27 PDA1 (21) L9 B1
SATA_RX0+ IDE_A1 VDDQ_5 VSS_5
Y28 PDA2 (21) L21 B7
IDE_A2 VDDQ_6 VSS_6
T120 AH18 AB28 PDDACK# (17,21) M5 B25
SATA_TX1+ IDE_DACK# VDDQ_7 VSS_7
T118 AJ18 AC27 PDDREQ (21) P3 C21
D SATA_TX1- IDE_DRQ C301 C302 C257 C303 C287 C242 VDDQ_8 VSS_8 D
AC29 PDIOR# (21) P9 C22
IDE_IOR# .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 VDDQ_9 VSS_9
T121 AH17 AC28 PDIOW# (21) T5 C24
SATA_RX1- IDE_IOW# VDDQ_10 VSS_10
T123 AJ17 W28 PDCS1# (21) V9 D6
SATA_RX1+ IDE_CS1# VDDQ_11 VSS_11
W27 PDCS3# (21) W2 E24
IDE_CS3# VDDQ_12 VSS_12
ATA 66/100
T129 AH13 PDD[0..15] (21) W6 F2
SATA_TX2+ PDD0 VDDQ_13 VSS_13
T126 AH14 AD28 W21 F23
SATA_TX2- IDE_D0/GPIO15 PDD1 C235 C320 C312 C241 C247 C230 VDDQ_14 VSS_14
AD26 W29 G1
IDE_D1/GPIO16 PDD2 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 VDDQ_15 VSS_15
T124 AH16 AE29 AA12 J1
SERIAL
SATA_RX2- IDE_D2/GPIO17 PDD3 VDDQ_16 VSS_16
T125 AJ16 AF27 AA16 J8
SATA_RX2+ IDE_D3/GPIO18 PDD4 VDDQ_17 VSS_17
AG29 AA19 L6
+5V +3V IDE_D4/GPIO19 PDD5 L36 VDDQ_18 VSS_18
AJ11 AH28 AC4 L8
ATA
T135 SATA_TX3+ IDE_D5/GPIO20 VDDQ_19 VSS_19
AH11 AJ28 PDD6 FBJ3216HS800 AC23 M9
T131 SATA_TX3- IDE_D6/GPIO21 VDDQ_20 VSS_20
AJ27 PDD7 +1.8V VDD_1.8V AD27 M12
IDE_D7/GPIO22 PDD8 VDDQ_21 VSS_21
T132 AH12
SATA_RX3- IDE_D8/GPIO23
AH27 80ohm/4A AE1
VDDQ_22 VSS_22
M15
AJ13 AG27 PDD9 AE9 M18
T128 SATA_RX3+ IDE_D9/GPIO24 VDDQ_23 VSS_23
R205 R213 *1K/F_4@SATA AG28 PDD10 C221 C284 C260 C264 C294 C293 AE23 N13
4.7K/F_4 4.7K/F_4 R191 SATA_CAL IDE_D10/GPIO25 PDD11 22U/10V_8 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 VDDQ_24 VSS_24
AF12 AF28 AH29 N17
SATA_CAL IDE_D11/GPIO26 PDD12 100U/6.3V_3528 VDDQ_25 VSS_25
AF29 AJ2 P1
SATA_X1 IDE_D12/GPIO27 PDD13 VDDQ_26 VSS_26
AD16 AE28 AJ6 P6
SATA_X1 IDE_D13/GPIO28 PDD14 VDDQ_27 VSS_27
AD25 AJ26 P21
IDE_D14/GPIO29 VDDQ_28 VSS_28
2
SPI ROM
J6 R13 U17
SPI_DO/GPIO11 C269 C265 VDD_6 VSS_35
XTLVDD_ATA AC16 G3 R17 V3
XTLVDD_SATA SPI_CLK/GPIO47 .1U_4 .1U_4 VDD_7 VSS_36
G2 U12 V8
SPI_HOLD#/GPIO31 VDD_8 VSS_37
+1.8V_ATA AE14 G6 U15 V12
C +1.8V L42 XTLVDD_ATA AVDD_SATA_1 SPI_CS#/GPIO32 VDD_9 VSS_38 C
AE16 U18 V15
*SBK160808T-301Y-S@SATA AVDD_SATA_2 VDD_10 VSS_39
AE18 C23 V13 V18
AVDD_SATA_3 LAN_RST#/GPIO13 L46 VDD_11 VSS_40
AE19 G5 V17 V21
AVDD_SATA_4 ROM_RST#/GPIO14 SB_S5_3V VDD_12 VSS_41
AF19 +3V_S5 W1
AVDD_SATA_5 VSS_42
AF21 M4 A2 W9
C282 C268 AVDD_SATA_6 FANOUT0/GPIO3 SBK160808T-301Y-S S5_3.3V_1 VSS_43
AG22 T3 A7 Y29
POWER
22U/10V_8 1U/10V_4 AVDD_SATA_7 FANOUT1/GPIO48 C351 C324 C323 C307 C304 C321 S5_3.3V_2 VSS_44
AG23 V4 F1 AA11
AVDD_SATA_8 FANOUT2/GPIO49 22U/10V_8 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 S5_3.3V_3 VSS_45
AH22 J5 AA14
AVDD_SATA_9 S5_3.3V_4 VSS_46
AH23 N3 J7 AA18
AVDD_SATA_10 FANIN0/GPIO50 L44 S5_3.3V_5 VSS_47
AJ12 P2 K1 AC6
AVDD_SATA_11 FANIN1/GPIO51 SB_S5_1.8V S5_3.3V_6 VSS_48
AJ14 W4 +1.8V_S5 AC24
+1.8V L43 PLLVDD_ATA AVDD_SATA_12 FANIN2/GPIO52 VSS_49
AJ19 G4 AD9
*SBK160808T-301Y-S@SATA AVDD_SATA_13 +1.8VUSB_PHY SBK160808T-301Y-S C332 C335 C315 C334 S5_1.2V_1 VSS_50
AJ22 P5 H1 AD23
AVDD_SATA_14 TEMP_COMM 10U/10V/X5R_8
.1U_4 .1U_4 .1U_4 S5_1.2V_2 VSS_51
AJ23 P7 EMI--11/08 H2 AE3
AVDD_SATA_15 TEMPIN0/GPIO61 S5_1.2V_3 VSS_52
SERIAL ATA
P8 H3 AE27
TEMPIN1/GPIO62 S5_1.2V_4 VSS_53
AB14
MONITOR
T8 AG6
C300 C278 AVSS_SATA_1 TEMPIN2/GPIO63 VSS_54
AB16 T7 A18 AJ1
22U/10V_8 1U/10V_4 AVSS_SATA_2 TEMPIN3/TALERT#/GPIO64 C254 C255 C256 USB_PHY_1.2V_1 VSS_55
AB18 A19 AJ25
POWER
AVSS_SATA_3 +1.8VUSB_PHY USB_PHY_1.2V_2 VSS_56
AC14 V5 .1U_4 .1U_4 .1U_4 B19 AJ29
For First build ,If next build no use remove from BOM. AVSS_SATA_4 VIN0/GPIO53 USB_PHY_1.2V_3 VSS_57
AC18 L7 B20
AVSS_SATA_5 VIN1/GPIO54 C224 .1U_4 USB_PHY_1.2V_4
AC19 M8 B21
HW
+1.8V L40 +1.8V_ATA AVSS_SATA_6 VIN2/GPIO55 USB_PHY_1.2V_5
AD12 V6 D27
*TI201209G121_8@SATA AVSS_SATA_7 VIN3/GPIO56 R166 *0_4 CPU_PWR_SB PCIE_VSS_1
AD19 M6 +1.8V D28
AVSS_SATA_8 VIN4/GPIO57 CPU_PWR=1.8V WHEN SB600 PCIE_VSS_2
AD21 P4 AA27 D29
AVSS_SATA_9 VIN5/GPIO58 CPU_PWR PCIE_VSS_3
AE12 M7 CPU_PWR=1.2V WHEN SB460 F26
AVSS_SATA_10 VIN6/GPIO59 R169 0_4 V5_VREF PCIE_VSS_4
AE21 V7 +1.2V AE11 G23
C250 C285 C277 C259 C276 C271 C266 AVSS_SATA_11 VIN7/GPIO60 V5_VREF PCIE_VSS_5
AF11 G24
22U/10V_8 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 AVSS_SATA_12 PCIE_VSS_6
AF14 A24 G25
AVSS_SATA_13 AVDDCK_3.3V PCIE_VSS_7
AF16 H27
AVSS_SATA_14 PCIE_VSS_8
AF18 N1 A22 J23
B AVSS_SATA_15 AVDD AVDDCK_1.2V PCIE_VSS_9 B
AG11 J26
AVSS_SATA_16 PCIE_VSS_10
AG12 M1 B22 J28
AVSS_SATA_17 AVSS AVSSCK PCIE_VSS_11
AG13 K27
R190 0_6@PATA AVSS_SATA_18 L33 AVDD_CK_1.8V PCIE_VSS_12
XTLVDD_ATA AG14 V29 L22
AVSS_SATA_19 SBK160808T-301Y-S PCIE_VSS_42 PCIE_VSS_13
AG16 V28 L23
R192 0_6@PATA AVSS_SATA_20 PCIE_VSS_41 PCIE_VSS_14
PLLVDD_ATA AG17 +1.8V V27 L24
AVSS_SATA_21 PCIE_VSS_40 PCIE_VSS_15
AG18 V26 L27
AVSS_SATA_22 PCIE_VSS_39 PCIE_VSS_16
2
R186 0_6@PATA +1.8V_ATA AG19 V25 L28
AVSS_SATA_23 C220 C228 C245 PCIE_VSS_38 PCIE_VSS_17
AG20 V24 M21
AVSS_SATA_24 2.2U/10V/X5R 1U/10V_4 .1U_4 PCIE_VSS_37 PCIE_VSS_18
AG21 V23 M24
AVSS_SATA_25 PCIE_VSS_36 PCIE_VSS_19
1
AH10 V22 M27
AVSS_SATA_26 PCIE_VSS_35 PCIE_VSS_20
AH19 U27 N27
AVSS_SATA_27 PCIE_VSS_34 PCIE_VSS_21
11/28-Arec T29
PCIE_VSS_33 PCIE_VSS_22
N28
+5V R209 1K/F_4 T28 P22
V5_VREF PCIE_VSS_32 PCIE_VSS_23
T27 P23
SB460 PCIE_VSS_31 PCIE_VSS_24
T24 P24
C292 C291 PCIE_VSS_30 PCIE_VSS_25
+3V 2 1 T21 P25
1U/10V_4 .1U_4 PCIE_VSS_29 PCIE_VSS_26
P27 P26
D10 SW1010C PCIE_VSS_28 PCIE_VSS_27
SATA clock Option
SB460
For First build ,If next build no use remove from BOM.
R161
0_4@PATA
Y5 1 2 C213 C502
A R160 OE VSS *.1U_4 *.1U_4 A
C216 *10M_4@SATA *25MHZ_OSC
*25MHZ@SATA
SATA_X2
2
*27P_4@SATA
PROJECT : ED5
SB-3
Modify Resistor
Quanta Computer Inc.
D3A:R161 When PATA mount CS00002JB38 Size Document Number Rev
SATA And Osc mount CS04992FB31 Custom SB450M HDD/POWER/DECOUPLING 1A
Date: Monday, May 22, 2006 Sheet 16 of 34
5 4 3 2 1
PCLK_MINI PCLK_591
AUTO_ON# SB_SPDIF_OUT PCLK_PCM PCLK_SIO PCLK_LAN LFRAME#
AC_SDOUT RTC_CLK PCI_CLK4 PCI_CLK6 PCI_CLK0 PCI_CLK1
ROM TYPE: ACPWRON SPDIF_OUT PCI_CLK2 PCI_CLK3 PCI_CLK5 LFRAME#
C
REQUIRED PULL
HIGH
USE
DEBUG
INTERNAL
RTC
USE INT.
PLL48
CPU IF=K8
H, H = PCI ROM
C
USB PHY
STRAPS STRAPS
DEFAULT
H, L = LPC TYPE I ROM
PULL
HIGH
MANUAL
PWR ON
SIO 24MHz XTAL MODE
NOT
POWERDOWN
PCIE_CM_SET
LOW
ENABLE
THERMTRIP#
L, H = LPC TYPE II ROM DEFAULT SUPPORTED DISABLE
DEFAULT DEFAULT DEFAULT DEFAULT
PULL IGNORE EXTERNAL USE EXT. CPU IF=P4 L, L = FWH ROM
LOW DEBUG RTC 48MHZ NOTE:FOR SB460,PCICLK[8:7]
ARE CONNECTED TO SUBSTRATE PULL AUTO SIO 48MHz 48MHZ OSC USB PHY PCIE_CM_SET DISABLE
STRAPS MODE HIGH THERMTRIP#
DEFAULT DEFAULT DEFAULT BALLS PCICLK[1:0] LOW PWR POWERDOWN
ON ENABLE
DEFAULT DEFAULT
BIOS ENABLE AFTER STARTUP
(16,21) PDDACK#
B B
(14,18,24) AD28
(14,18,24) AD27
(14,18,24) AD26
(14,18,24) AD25
(14,18,24) AD24
(14,18,24) AD23
DEBUG
STRAPS PDACK# PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23
PULL USE Reserved BYPASS BYPASS ACPI BYPASS IDE USE EEPROM
HIGH LONG PCI PLL BCLK PLL PCIE STRAPS Reserved
A A
RESET
DEFAULT
PULL USE USE PCI USE ACPI USE IDE USE DEFAULT PROJECT : ED5
LOW SHORT PLL BCLK PLL PCIE STRAPS
SB-4
RESET Quanta Computer Inc.
DEFAULT DEFAULT DEFAULT DEFAULT
Size Document Number Rev
Custom 1A
SB460M STRAPS
Date: Monday, May 22, 2006 Sheet 17 of 34
5 4 3 2 1
ID Select : AD20
Interrupt Pin : INTG# , INTF#
Request Indicate : REQ2#
Grant Indicate : GNT2#
DEBUG PURPOSE ONLY +3V
A A
CN3 *MINIPCI
1 2
+3V TIP RING
3 4
LAN1 LAN2 C142 C140 C129 C122
5 6
LAN3 LAN4 .1U_4 .1U_4 .1U_4 .1U_4
7 8
LAN5 LAN6
9 10
LAN7 LAN8
11 12
LED_GP LED_YP +3V
13 14
LED_GN LED_YN
15 16
NC1 NC2
(14,24) INTG# 17 18 +5V
-INTB +5V
19 20
+3V -INTA INTF# (14)
21 22
R(IRQ3) R(IRQ4)
23 24 +3VSUS
PCLK_MINI GND +3VAUX PCIRST#
(14,17) PCLK_MINI 25 26 PCIRST# (14,23,24,28)
PCICLK -RST
27 28
GND +3V
(14) REQ2# 29 30 GNT2# (14)
-REQ -GNT
31 32
+3V GND
(14,24) AD31 33 34
AD31 -PME
(14,24) AD29 35 36
AD29 (V)
37 38 AD30 (14,24)
GND AD30
(14,17,24) AD27 39 40
AD27 +3V
(14,17,24) AD25 41 42 AD28 (14,17,24)
AD25 AD28
B 43 44 AD26 (14,17,24) B
(V) AD26
(14,24) CBE3# 45 46 AD24 (14,17,24)
-CBE3 AD24 R93 150/F_4AD20
(14,17,24) AD23 47 48
AD23 IDSEL
49 50
GND GND
(14,24) AD21 51 52 AD22 (14,24)
AD21 AD22 AD20
(14,24) AD19 53 54 AD20 (14,24)
AD19 AD20
55 56 PAR (14,24)
GND PAR
(14,24) AD17 57 58 AD18 (14,24)
AD17 AD18
(14,24) CBE2# 59 60 AD16 (14,24)
-CBE2 AD16
(14,24) IRDY# 61 62
-IRDY GND
63 64 FRAME# (14,24)
+3V -FRAME
(14,24,28) CLKRUN# 65 66 TRDY# (14,24)
-CLKRUN -TRDY
(14,24) SERR# 67 68 STOP# (14,24)
-SERR -STOP
69 70
GND +3V
(14,24) PERR# 71 72 DEVSEL# (14,24)
-PERR -DEVSEL
(14,24) CBE1# 73 74
-CBE1 GND
(14,24) AD14 75 76 AD15 (14,24)
AD14 AD15
77 78 AD13 (14,24)
GND AD13
(14,24) AD12 79 80 AD11 (14,24)
AD12 AD11
(14,24) AD10 81 82
AD10 GND
83 84 AD9 (14,24)
GND AD9
(14,24) AD8 85 86 CBE0# (14,24)
AD8 -CBE0
(14,24) AD7 87 88
AD7 +3V
89 90 AD6 (14,24)
+3V AD6
C (14,24) AD5 91 92 AD4 (14,24) C
AD5 AD4
93 94 AD2 (14,24)
(V) AD2
(14,24) AD3 95 96 AD0 (14,24)
AD3 AD0
97 98
+5V +5V (V)
(14,24) AD1 99 100
AD1 SERIRQ SERIRQ (14,24,28)
101 102
GND GND
103 104
SYNC M66EN
105 106
SDIN0 SDOUT
107 108
BITCLK SDIN1
109 110
-AC_PRIMARY -RESET
111 112
BEEP -MPCICACK
113 114
AGND AGND
115 116
+MIC +SPK
117 118
-MIC -SPK
119 120
AGND AGND
121 122
-RI NC4
123 124 +3VSUS
+5V +5VA +3VAUX
GND
GND
125
126
D D
PROJECT : ED5
Quanta Computer Inc.
MPC 1 2 3 4 5 6
Size
Date:
Document Number
MINI PCI CONNECTOR (DEBUG ONLY)
Monday, May 22, 2006
7
Sheet 18
8
of 34
Rev
1A
2
51 52 .1U_4
10U/10V/X5R_8
Reserved +3.3V
D 49 50 D
Reserved GND (28) TV_POWERON#
47 48
Reserved +1.5V
45 46
Reserved LED_WPAN#
43 44
Reserved LED_WLAN#
41 42
Reserved LED_WWAN#
39 40
Reserved GND R470 0_4
37 38 USBP5+ (15)
Reserved USB_D+ R469 0_4
35 36 USBP5- (15)
GND USB_D-
(10) MINI_PCIE_TXP2 33 34
PETp0 GND R475 0_4
(10) MINI_PCIE_TXN2 31 32 PDAT_SMB (13,15,24)
PETn0 SMB_DATA R474 0_4
29 30 PCLK_SMB (13,15,24)
GND SMB_CLK
27 28
GND +1.5V
(10) MINI_PCIE_RXP2 25 26
PERp0 GND
(10) MINI_PCIE_RXN2 23 24
PERn0 +3.3Vaux
21 22 ALINK_RST# (11,14,21,23,24)
ECN 2A GND PERST#
19 20
Reserved Reserved
REMOVE CAP. 17 18
Reserved GND
+3VSUS 15 16 GP5_IR T81
GND Reserved
(13) CLK_PCIE_MINI_B 13 14
REFCLK+ Reserved
(13) CLK_PCIE_MINI_B# 11 12
2
GND
GND
Reserved GND TV_SENSE# (28)
R489 0_4 3 1 1 2
(15,23,24) PME# WAKE# +3.3V
Q33
53
54
DTC144EUA
51 52
Reserved +3.3V ECN E3B unstuff
49 50
Reserved GND
47 48 R476
Reserved +1.5V
45 46
Reserved LED_WPAN# WLAN_LED R476 *0_4 WIRELESS_LED
43 44 WIRELESS_LED (29)
Reserved LED_WLAN#
41 42
Reserved LED_WWAN#
39 40
Reserved GND
37 38
B Reserved USB_D+ B
35 36
33
GND USB_D-
34
NO SUPPORT USB
(10) MINI_PCIE_TXP3 PETp0 GND
31 32 R468 0_4 PDAT_SMB
(10) MINI_PCIE_TXN3 PETn0 SMB_DATA
29 30 R467 0_4 PCLK_SMB
GND SMB_CLK
27 28
GND +1.5V
(10) MINI_PCIE_RXP3 25 26
PERp0 GND
(10) MINI_PCIE_RXN3 23 24
PERn0 +3.3Vaux ALINK_RST#
21 22
ECN 2A GND PERST# R473 0_4 RF_EN
19 20 RF_EN (28)
Reserved Reserved
REMOVE CAP. 17 18
Reserved GND
+3VSUS 15 16 ECN E3B
GND Reserved
(13) CLK_PCIE_MINI_A 13 14 ADD Q40
2
REFCLK+ Reserved
(13) CLK_PCIE_MINI_A# 11 12
2
GND
54
*DTC144EUA
+3V +1.5V +3VSUS
A A
PROJECT : ED5
MINI CARD
Quanta Computer Inc.
Size Document Number Rev
MINI CARD (WLAN AND TV) 2A
Date: Monday, May 22, 2006 Sheet 19 of 34
5 4 3 2 1
C435 .1U_4
CRT D22
2
SSM14
1 +5V_CRT2
25 MIL
(28) MONITOR_PLUG# LVDS & DSC L15
+5V
+5V
BK2125HS330_8
CRT PORT DSC_5V
Change FootPrint
C86 C94 0_4 R60
16
0104
CN19 CN4 10U/10V/X5R_8 1U/10V_4
CRT_DFDS15FR459
L4 0_6 D2 MTW355 31 30 L23
D 6 D
VGA_RED CRT_R1 32 29 BUSBP6-
(11) VGA_RED 1 11 1 2 2 1 USBP6- (15)
L3 0_6 33 28 BUSBP6+ 2 1
7 3 4 USBP6+ (15)
VGA_GRN CRT_G1 CRTDDAT 34 27 3 4
(11) VGA_GRN 2 12
L2 0_6 26 INVCC 0_8 R334 VIN *DLW21HN900SQ2L
8
VGA_BLU CRT_B1 CRTHSYNC 25
(11) VGA_BLU 3 13
24 0_4 R61
9
CRTVSYNC 23
4 14
C9 C10 C12 22 TXLCLKOUT+
10 TXLCLKOUT+ (11)
R323 C429 R322 C428 R321 C427 CRTDCLK 21 TXLCLKOUT-
5 15 TXLCLKOUT- (11)
150/F_4 10P_4 150/F_4 10P_4 150/F_4 10P_4 10P_4 10P_4 10P_4 20
19 TXLOUT2+
18 TXLOUT2+ (11)
TXLOUT2- TXLOUT2- (11)
17
17
16 TXLOUT1+
15 TXLOUT1+ (11)
D3A D3A TXLOUT1-
14 TXLOUT1- (11)
U2
CM2009 13 TXLOUT0+
12 TXLOUT0+ (11)
+3V +5V_CRT2 1 16 VSYNC1 R549 12_6 L49 BLM18BA220SN1_6 TXLOUT0-
VCC_SYNC SYNC_OUT2 11 TXLOUT0- (11)
HSYNC1 R550 12_6 L50 BLM18BA220SN1_6 10 DISPON
7 14
VCC_DDC SYNC_OUT1 9 VADJ L24 BK1608LL121_6
8 CONTRAST (28)
8 15 VSYNC PHL_CLK PHL_CLK (11)
BYP SYNC_IN2 VSYNC (11) 7
+5V_CRT2 C8 C426 PHL_DATA PHL_DATA (11)
HSYNC 10P_4 10P_4 6 C106 .1U_4
2 13 HSYNC (11)
C13 VCC_VIDEO SYNC_IN1 Change Value to 4.7K 5
4 +3V
.22U/25V CRT_R1 3 10 DDCCLK LCD3V LCD3V
VIDEO_1 DDC_IN1 DDCCLK (11) R320 R5 3
C 2 C
CRT_G1 4 11 DDCDAT 4.7K/F_4 4.7K/F_4
VIDEO_2 DDC_IN2 DDCDAT (11) 1 +3V
CRT_B1 5 9 CRTDCLK_R R4 33_6 +3V
VIDEO_3 DDC_OUT1 LCD_CON30 INVCC
6 12 CRTDDAT_R R319 33_6
GND DDC_OUT2 LCD CONNECTOR R71 2.2K_4 PHL_DATA
C115 C476 C474
1U/10V_4 10U/25V_12 1000p/50V_4 C99
C7 C11 R69 2.2K_4 PHL_CLK .1U_4
R6 R8 +3V 10P_4 10P_4
4.7K/F_4 4.7K/F_4
4
IN OUT
1
2
LCDVCC
C480
0_8
C430
B
R325 C434 9 8 R324 LCD POWER SUPPLY B
3
3 1 R79 10K_4
7
DFMD07FR206 R88
10K_4
7
D8 MTW355
+3V TV_C/R_SYS TV_Y/G_SYS TV_COMP_SYS L53 1 2
(11) BLON
TV-COMP TV_COMP_SYS
TV_COMP_SYS (11)
D9 MTW355
C4311.8UH C437 1 2
(28) EC_FPBACK#
R326
82P_4 82P_4 +3VPCU
3
3
2
2
C436 150/F_4
.1U_4
R77
1
10K_4
D19 D21 D20 D7 MTW355
DA204U DA204U DA204U LID SWITCH CONN. 1 2 DISPON
SW5
+3V +3V +3V
3 1 LID# R83 1K/F_4
LID591# (28)
A 4 2 A
MPU-101-6 C120
.1U_4
change to Lid switch
PROJECT : ED5
51
52
R294 49 50 *100U/6.3V_3528
RST_HDD# R388 *22_4 -RST_HDD0 When SATA,Un-stuff R293 1000p/50V_4.1U_4 .1U_4 .1U_4
(15) RST_HDD#
51
52
*470_4@SATA DFHD50MR0V9
and stuff R294
B ALINK_RST# R384 *22_4
CLOSE IDE SIDE B
(11,14,19,23,24) ALINK_RST# Reserve Slave for PATA
R373 *10K_4 IRQ14
+3V +5V +3V Reserve Master for SATA
PDD7 R372 *10K_4
Q29
2
ALINK_RST# 1 3
H12
h-c177d83p2
H5
h-c209d146p2
H18
H-C177D83P2
H14
h-c177d83p2
H11
h-c209d146p2
H10
h-c209d146p2
H8
h-c209d146p2
H2
h-c209d146p2
H15
h-c177d83p2
H13
h-c177d83p2
H6
h-c209d146p2
H3
h-c209d98p2
H4
H-S315D98P2
SATA HDD
CN24
*SATA_HDD@SATA
1
GND1
2
1
1
RXP SATA_TXP0 (16)
3
RXN
4
SATA_TXN0 (16) 1 2
NB GND2 SATA_RXN0_C C209 .01U_4
TXN
5 SATA_RXN0 (16) 2 1
C MINI CARD hole for new card 6 SATA_RXP0_C C210 .01U_4 C
TXP SATA_RXP0 (16)
RST
GND
HS9 H-S315D110P2-V8 7
HS2 H-S315D110P2-V8 HS13 H-S315D110P2-V8 HS15 H-S315D110P2-V8 HS12 H-S315D110P2-V8 HS6 H-S315D110P2-V8 GND3
6
HS14 H-S315D110P2-V8
6
5
7 4 8 +3.3VSATA R158 *0_8@SATA +3V
3.3V
6
8 3 7 4 7 4 7 4 7 4 7 4 9
3.3V
9 2 7 4 8 3 8 3 8 3 8 3 8 3 10
3.3V
8 3 9 2 9 2 9 2 9 2 9 2 11
GND
9 2 12 20
GND
13
1
GND HDD_VCC
14
1
1
5V
15
1
HS11 H-S315D110P2-V8 5V
16 SPURCE AND CAP. COME FROM PATA HDD
HS10 HS8 H-S315D110P2LU39-V8 HS7 H-S315D110P2-V8 HS5 H-S315D110P2-V8 HS4 H-S315D110P2-V8 HS3 H-S315D110P2-V8 5V
17
GND
6
GND
H-C197D110P2 18
RSVD
6
5
7 4 19 For First build ,If next build no use remove from BOM.
X
GND
8 3 7 4 7 4 7 4 7 4 7 4
12V
20
43 44 44 43
9 2 8 3 8 3 8 3 8 3 8 3 21 +3.3VSATA
12V
9 2 9 2 9 2 9 2 9 2 22
12V
C192 C193 C194
1
1
1
1 2
DISK AND HOLE 3
Size
Date:
Document Number
HDD & CDROM , HOLES
Monday, May 22, 2006
4
Sheet 21 of 34
Rev
2A
2
Q16 L31
USB_OCP3# (15) R155 0_4 AO3403 BK2125HS330_8 CN7
1 3 BT_PWR_R BT_POWER
+5VSUS +5VSUS U11 L29 8
G548A2P8U BUSBP7+ 7
4 3
80 MILS 2 8 USBPWR_DB 80 MILS FOR
(15)
(15)
USBP7+
USBP7- 1
4 3
2 BUSBP7- 6
IN1 OUT3 1 2 BT_LED 5
USB/B
3 7
C23 IN2 OUT2 4
6
.1U_4 OUT1 *DLW21HN900SQ2L C182 3
4
EN# C226 C222 R152 0_4 *.01U_4 2
1
R162 GND 1
9 5 USB_OC_DB R163 0_4 .1U_4
10U/10V/X5R_8
*0_4 GND-C OC#
BT_LED DFHS08FR774
ECN E3B
USB_OCP4# (15) Remove ADDQ42
2
3 1
(29) BT_LED_AM
Q42
B DTC144EUA B
L6 BLM18PG330SN1D
USBPWR_MB USBP_PWR_MB
C
C20 + C
100U/6.3V_3528
R17 0_4
L8 CN8
4 3 BUSBP0-
(15) USBP0- 4 3
1 2 BUSBP0+ (15) USBP2- 1
(15) USBP0+ 1 2 1
(15) USBP2+ 2
2
(15) USBP3- 3
*DLW21HN900SQ2L C17 C18 3
(15) USBP3+ 4
R18 0_4 *.1U_4 *.1U_4 4
5
5
6
6
7
7
8
CN21 8
9
020122MR008SX90ZX USBPWR_DB 9
10
10
5 10
6 9
7 88266-10001
R15 0_4 8
L7 USBP_PWR_MB 1 11
(15) USBP1- 4 3 BUSBP1- 2 12
4 3 BUSBP1+
(15) USBP1+ 1 2 3
1 2
4
PROJECT : ED5
LED1_LINK#
LED0_ACT#
LED2_ACT#
25MHZ_LAN *BK1608HS220
MDI0+ 11
AVDD33
DVDD15
DVDD15
DVDD15
TRD1+
CTRL15
VDD33
1 2 V_DAC_LAN 12
GVDD
C25 C24 MDI0- TRCT1
10
.1U_4 TRD1-
1U/10V_4
C21 C22 MDI1+ 4
22P_4 C3 TRD2+
D 22P_4 6 D
R20 .1U_4 MDI1- TRCT2
5
2.49K_4 TRD2-
MDI2+ 3
TRD3+
1
MDI2- TRCT3
2
TRD3-
U6 MDI3+
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
8
TRD4+
7
MDI3- TRCT4
9
GVDD
NC
NC
VCTRL15
CKTAL2
CKTAL1
AVDD33
VDD15
LED0
LED1
LED2
LED3
VDD33
VDD15
VDD15
RSET
TRD4-
THERE IS ONE EGND PLANE UNDER IC
15
CTRL18 EESK C2 C4 C5 C6 LED_LINK# LED_O_C
1 48 17
AVDD33 VCTRL18 EESK EEDI .01U_4 .01U_4 .01U_4 .01U_4 LED_G_C
2 47
MDI0+ AVDD33 EEDI VDD33 VDD33 R3 100/F_4
3 46 +3V off during S3 and S5 16
MDI0- MDIP0 VDD33 EEDO LED_O/G_A
4 45
AVDD18 MDIN0 EEDO EECS
5 44 18
MDI1+ AVDD18 EECS DVDD15 +3V SHIELD1
6 43 19
MDI1- MDIP1 VDD15 SHIELD2
7 42
AVDD18 MDIN1 NC DVDD15
8 RTL8111B-GR 41
MDI2+ AVDD18 VDD1
9 40
MDI2- MDIP2 NC R39 DFHS17FR102
10 39
AVDD18 MDIN2 NC DVDD15 1K/F_4
11 38
MDI3+ AVDD18 VDD15 VDD33
12 37
MDI3- MDIP3 VDD33 ISOLATEB
13 36
AVDD18 MDIN3 ISOLATEB
14 35
DVDD15 AVDD18 NC
15 34
LANWAKEB
VDD15 NC
REFCLK_N
REFCLK_P
VDD33 16 33 DVDD15 R32
VDD33 VDD15
PERSTB
EVDD18
EVDD18
15K_4
VDD15
VDD15
EGND
HSON
EGND
HSOP
HSIN
HSIP
NC
NC
+3V_S5
C C
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
R53
*10K_4 LAYOUT SUGGESTION
SYSTEM GND
EVDD18
EVDD18
DVDD15
DVDD15
R52 *0_4
EGND
EGND
(15,19,24) PME#
LAN_PME# R44 0_4 LAN_PME_WAKE# E-PAD
(28) LAN_PME#
R51 0_4 LAN_PERST#
(11,14,19,21,24) ALINK_RST# R50 *0_4
(14,18,24,28) PCIRST#
F3C R50 NC
(10) LAN_PCIE_TXP0
(10) LAN_PCIE_TXN0
(13) CLK_PCIE_LAN
(13) CLK_PCIE_LAN# EGND
C58 .1U_4 LAN_RXP0
(10) LAN_PCIE_RXP0
C57 .1U_4 LAN_RXN0 BEAD BEAD
(10) LAN_PCIE_RXN0
POWER SUPPLY
+3V_S5
POWER SUPPLY 1.2W 30MILS
L10 BK1608HS220 VDD33
B C47 B
C33 C56 C459 C465 C456 C462 CLOSE RTL8111B VDD33 pins
22U/10V_8 22U/10V_8 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4
(16, 37, 46 and 53)
VDD33
EEDO 4 5
20MILS DO GND C451
AVDD18 AT93C46 .1U_4
2
3
R42 0_6 EVDD18
G1
TIP 1
VDD33 C69 C61 C59 1 RING 1
CLOSED for RTL8111B VDD18 pins 2
4.7U/6.3V_6 .1U_4 .1U_4 2
ISOLATE EGND AND GND (22 and 28) CN16 2
3
ACS_88266-0200
G2
A Q4 L16 BK1608HS220 EGND C610 C611 A
E
4
C
20MILS
DVDD15
2
TRACE <1"
WIDTH > 25MILS PROJECT : ED5
LAN
C463 C442 C452 C441 C28 C30 C464 C468 CLOSE RTL8111B VDD15 pins
C64 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4
22U/10V_8 (15, 21, 32, 33, 38, 41, 43, 49, 52 and 58)
Size Document Number
Quanta Computer Inc. Rev
LAN RTL8111B-GR PCI-E & RJ11 1A
Date: Monday, May 22, 2006 Sheet 23 of 34
5 4 3 2 1
PCMCIA PORT
AD14 R8 L15 FOXCONN_NEW_CARD
AD15 AD14 CAD9 // A10
W7 L18
AD16 AD15 CAD8 // D15
W4 L19
AD17 AD16 CAD7 // D7 +3V_S5
T2 M17
AD18 AD17 INTE# CAD6 // D13
T1 G1 INTE# (14) M18
AD19 AD18 MFUNC0 R416 0_4 CAD5 // D6
R3 H5 INTG# (14,18) N19
2
AD20 AD19 MFUNC1 INTH# CAD4 // D12
P5 H2 INTH# (14) M15
AD21 AD20 MFUNC2 SERIRQ CAD3 // D5 Q13
R2 H1 SERIRQ (14,18,28) N17
AD22 AD21 MFUNC3 3VSP R406 4.7K/F_4 CAD2 // D11 DTC144EUA
R1 J1 +3V N18
C
AD23 AD22 MFUNC4 FM_LED CAD1 // D4 C
P3 J2 FM_LED (25) P19
AD24 AD23 MFUNC5 CLKRUN# CAD0 // D3
N3 J3 CLKRUN# (14,18,28) (15,19) PCIE_WAKE# 3 1 NEWCARD_PCIE_WAKE#
AD25 AD24 MFUNC6
N2 E13
AD26 AD25 PCLK_PCM CC/BE3# // REG#
N1 L1 PCLK_PCM (14,17) E18
AD27 AD26 PCLK CC/BE2# // A12
M5 H18
AD28 AD27 PCIRST# CC/BE1# // A8
M6 K3 PCIRST# (14,18,23,28) L17
AD29 AD28 PRST CC/BE0# // CE1#
M3
AD30 AD29 PCMSPK
M2 H3 PCMSPK (26) H14
AD31 AD30 SPKROUT +3V CPAR // A13
M1 F19
AD31 PCM_PME# R189 *0_4 CDEVSEL# // A21
L5 RI# (15) E19
RI_OUT/PME CFRAME# // A23
(14,18) CBE0# W10 G17
2
C/BE0 SDA_CARD CGNT# // WE#
(14,18) CBE1# V7 G3 E12
C/BE1 SDA SCL_CARD Q17 CINT# // READY(IREQ#)
(14,18) CBE2# U5 G2 F17
C/BE2 SCL DTC144EUA CIRDY# // A15
(14,18) CBE3# P2 G19
C/BE3 CPERR# // A14
C9 C14
PAR LATCH R188 0_4 CREQ# // INPACK#
(14,18) PAR U7 B9 1 3 PME# (15,19,23) C12
DEVSEL# PAR DATA CSERR# // WAIT#
(14,18) DEVSEL# U6 A9 G18
FRAME# DEVSEL CLOCK CSTOP# // A20
R6 G15
(14,18) FRAME#
(14) GNT3#
GNT3#
PCM_IDSEL
IRDY#
L2
N5
FRAME
GNT
IDSEL
USB_EN
E10 USB_EN# R427 *10K_4
+3V
CTRDY# // A22
CCLK // A16
F18 NEW CARD'S POWER SWITCH
(14,18) IRDY# V5 A11
PERR# IRDY CCLKRUN# // WP(IOIS16#)
(14,18) PERR# R7 P17 TEST_MA R216 4.7K/F_4
1394_AVDD A12
REQ3# PERR PHY_TEST_MA CSTSCHG // BVD1(STSCHG#/RI#)
(14) REQ3# L3 H15
SERR# REQ CBLOCK# // A19 U8
(14,18) SERR# W6 P12 C15
STOP# SERR TEST0 CRST# // RESET
(14,18) STOP# V6 C4 PSMODE R417 10K_4
+3V B12 TPS2231PWG4
TRDY# STOPRSVD // VD0 // VCCD1# CAUDIO // BVD2(SPKR#) +NEW_3V
(14,18) TRDY# W5 E5 +3V 4 6
TRDY NC 3.3VIN 3.3VOUT
N15 5 7
PCIXX12_0 CCD1# // CD1# 3.3VIN 3.3VOUT
B11
CCD2# // CD2# +NEW_3VAUX
A13 +3V_S5 18 17
CVS1 // VS1# AUXIN AUXOUT
B16
CVS2 // VS2# +NEW_1.5V
+1.5V 16 14
B 1.5VIN 1.5VOUT B
H17 15 13
PCLK_PCM R397 *22_4 PCLK_PCM_R C499 *10p_4 RSVD // A18 1.5VIN 1.5VOUT
B10
RSVD // D2
RSVD // D14
M19
(11,14,19,21,23) ALINK_RST#
1
SYSRST# STBY#
3 F3C: Add RC delaly on
2 12 CPPE#
PCIXX12_0 SHDN# CPPE#
11 CPUSB# new of NEW_PERST#
CLK48_PCM R399 *22_4 CLK48_PCM_R C501 *10p_4 CPUSB#
19 R553
RCLKEN NEW_PERST# NEW_PERST#_RC
9 8
NC PERST#
10 20
GND OC#
28.7K/F
C618
3900p/25V
IEEE1394 EEPROM CPPE# : ( Internal Pull Up , active low when card support PCIE )
CPUSB# : ( Internal Pull Up , active low when card support USB )
+3V
SHDN# : ( Internal Pull Up )
3 2
Size
Date:
Document Number
PCI8402-1 & NEW CARD
Monday, May 22, 2006
1
Sheet 24 of 34
Rev
2A
Support :
PCI8402 I/F OF 1394 & CARD READER 5 IN 1 MEMORY CARD READER MMC
VCC_XD VCC_XD
SD
CN13 Memory Stick
MSX039-X0-0X00
ECN F3C Memory Stick Pro
SD_CDZ 1
MS_DATA2/SD_DAT2/SM_D2 2
CD_SD
DAT2_SD
xD
SM_CD# R556 10K_4 MS_DATA3/SD_DAT3/SM_D3 3
+3V CD/DAT3_SD
D
MS_BS/SD_CMD/SM_WEZ 4 41 D
CMD_SD VCC_XD SD_DAT3/SM_D7/SC_GPIO3
5 40
VSS_SD D7_XD SD_DAT2/SM_D6/SC_GPIO4
6 39
MS_CLK/SD_CLK/M_ELWPZ_R VDD_SD D6_XD SD_DAT1/SM_D5/SC_GPIO5
7 38
CLK_SD D5_XD SD_DAT0/SM_D4/SC_GPIO6
8 37
U24C MS_DATA0/SD_DAT0/SM_D0 VSS_SD D4_XD MS_DATA3/SD_DAT3/SM_D3
9 36
+3V MC_PWR_CTRL_0# MS_DATA1/SD_DAT1/SM_D1 DAT0_SD D3_XD MS_DATA2/SD_DAT2/SM_D2
F6 C8 10 35
VCC_00 MC_PWR_CTRL0 SM_R/B/SC_RFU R425 10K_4 SD_WP_SM_CEZ DAT1_SD D2_XD MS_DATA1/SD_DAT1/SM_D1
F9 F8 VCC_XD 11 34
C515 C510 C505 C313 C306 VCC_01 MC_PWR_CTRL_1 // SM_R/B# WP_SD D1_XD MS_DATA0/SD_DAT0/SM_D0
F12 12 33
VCC_02 SD_CDZ VSS_MS D0_XD
F14 E9 13 32
10U/10V/X5R_8
1U/10V_4 .1U_4 .01U_4 1000p/50V_4 J6 VCC_03 SD_CD MS_CDZ ECN F3C MS_CLK/SD_CLK/M_ELWPZ_R VCC_MS GND_XD MS_CLK/SD_CLK/M_ELWPZ_R
A8 14 31
VCC_04 MS_CD SM_CD# R554 *0_4 MS_DATA3/SD_DAT3/SM_D3 SCLK_MS -WP_XD MS_BS/SD_CMD/SM_WEZ
J14 B8 15 30
VCC_05 SM_CD R555 0_4 SM_CDZ MS_CDZ RESERVE_MS -WE_XD SD_CMD/SM_ALE/SC_GPIO2
L6 A3 16 29
VCC_06 XD_CD// SM_PHYS_WP# R_MS_SD_CLK R419 33/F_4 MS_CLK/SD_CLK/M_ELWPZ_R MS_DATA2/SD_DAT2/SM_D2 INS_MS ALE_XD SM_CLE/SC_GPIO0
L14 A7 17 28
VCC_07 MS_CLK // SD_CLK // SM_EL_WP# MS_BS/SD_CMD/SM_WEZ R423 100K/F_4 MS_DATA0/SD_DAT0/SM_D0 RESERVE_MS CLE_XD SD_WP_SM_CEZ
P6 E8 VCC_XD 18 27
VCC_08 MS_BS // SD_CMD // SM_WE# MS_DATA3/SD_DAT3/SM_D3 MS_DATA1/SD_DAT1/SM_D1 SDIO_MS -CE_XD SD_CLK/SM_RE/SCGPIO1
P8 B6 19 26
VCC_09 MS_DATA3 // SD_DAT3 // SM_D3 MS_DATA2/SD_DAT2/SM_D2 MS_BS/SD_CMD/SM_WEZ RESERVE_MS -RE_XD SM_R/B/SC_RFU
P10 A6 20 25
VCC_10 MS_DATA2 // SD_DAT2 // SM_D2 MS_DATA1/SD_DAT1/SM_D1 BS_MS R/-B_XD SM_CDZ
C7 21 24
MS_DATA1 // SD_DAT1 // SM_D1 MS_DATA0/SD_DAT0/SM_D0 VSS_MS GND_XD
B7 22 23
MS_SDIO(DATA0) // SD_DAT0 // SM_D0 SM_CLE/SC_GPIO0 GND GND
B4 42
SM_CLE // SC_GPIO0 SD_CLK/SM_RE/SCGPIO1 R418 100K/F_4 GND
A4 VCC_XD
SD_CLK // SM_RE# // SC_GPIO1 SD_CMD/SM_ALE/SC_GPIO2
P1 C5
VCCP SD_CMD // SM_ALE // SC_GPIO2 SD_DAT3/SM_D7/SC_GPIO3
W8 E6
VCCP SD_DAT3 // SM_D7 // SC_GPIO3 SD_DAT2/SM_D6/SC_GPIO4
B5
SD_DAT2 // SM_D6 // SC_GPIO4 SD_DAT1/SM_D5/SC_GPIO5
A5
1394_AVDD SD_DAT1 // SM_D5 // SC_GPIO5 SD_DAT0/SM_D4/SC_GPIO6
C6
L45 SD_DAT0 // SM_D4 // SC_GPIO6 SD_WP_SM_CEZ R421 100K/F_4
E7 VCC_XD
+3V SD_WP // SM_CE#
P13
P14
AVDD_33_00 MEMORY CARD READED POWER CONTROL +3V
BLM21P300S C344 C336 C317 C319 AVDD_33_01
U15 D1
AVDD_33_02 SC_RFU SC_FCB T122
U19 E3
1U/10V_4 .1U_4 .01U_4 1000p/50V_4 VDDPLL_33 SC_FCB
C C
F3 R515
1
SC_CD 10K_4
SC_CLK
E2 Reserve for xD identification
E1
C521 1U/10V_4 SC_DATA R410 0_4 Q37
P15 F2 +3V
VDDPLL_15 SC_OC MC_PWR_CTRL_0#
G5 2
SC_PWR_CTRL
F5
SC_RST SC_VCC R412 *1K_4 *AO3403
G6 +5V
SC_VCC5
K1
1.5V_00 20 MIL
3
K19 VCC_XD
1.5V_01
C503 C520 R12 CPS R195 390K_4 C580
CPS R510 10U/10V/X5R_8
1U/10V_4 1U/10V_4 K2 R13 TPBIAS0 *100K/F_4
VR_EN TPBIAS1
V14 TPA0P
TPA1P TPA0N
W14
TPA1N
R17
VSSPLL TPB0P
V13 VCC_XD
TPB1P TPB0N
W13
R14
TPB1N MEMORY CARD READED LED INDICATE R533
AGND_00 PCI8412 ARE NC PIN 10K_4
U13 W17
AGND_01 TPBIAS2
U14
AGND_02 PCI8412 ARE NC PIN
V16 FM_LED_EC (28)
TPA2P PCI8412 ARE NC PIN
W16
TPA2N
3
V15 PCI8412 ARE NC PIN
TPB2P PCI8412 ARE NC PIN Q26
W15
TPB2N
(24) FM_LED 2
PDTC144EU
F7 U12
GND_00 RSVD//PC0 ECN 2A
F10 V12
B GND_01 RSVD//PC1 B
F13 W12 MEMORY CARD'S LED FALSH TOO FAST,
GND_02 RSVD//PC2
1
G14 EE CHANGE CIRCUIT AND EC ADD DE-BOUNCE
GND_03 8402_R0
H6 T18
GND_04 R0
K6
GND_05 8402_R1 R451 6.34K/F
K14 T19
GND_06 R1 C533
M14
GND_07 8402_XI
N6 R19
P7
GND_08 XI
IEEE1394 CONNECTOR
2
GND_09 22p_4
P9 R18
GND_10 XO Y8
PCIXX12_0 24.576MHz
C534
8402_XO TPBIAS0
1
1U/10V_4 270p_4
56.2/F_4 56.2/F_4
MEMORY CARD READED POWER CONTROL (IC SOLUTION FOR C-TEST) CN2
5
TPA0P R9 0_4 L1394_TPA0+ L1394_TPB0- 1
TPA0N R10 0_4 L1394_TPA0- L1394_TPA0- 3 6
L1394_TPA0+ 4
TPB0P R11 0_4 L1394_TPB0+ L1394_TPB0+ 2
+3V U35 TPB0N R12 0_4 L1394_TPB0-
G545B2RD1U 30 MIL
2 8 VCC_XD
IN1 OUT3 1394_CON
3 7
IN2 OUT2 R236 R239 1394-020115FB004SX04ZX-4P-R-H
OUT1
6 PLACE CLOSE TO C580 AND TRACE WIDTH IS 30MIL.
MC_PWR_CTRL_0# 4 56.2/F_4 56.2/F_4 ECN 2A
EN#
A 1 Per ME's request, A
GND
9 5 Update its footprint.
GND-C OC#
R of discharge is 75ohm to 150ohm
1394_COM
ECN D3A
DECREASE "VCC_XD" PWR FALLING TIME. R241 C337
5.1K/F 270p_4
PROJECT : ED5
1
SHDNL NC4 L68
4 *10K_4 16 4
C596 C602 1U/10V_4 NC5 BLM11A601S
(28) SRS_EN 1 20
R492 *47P/50V/0402 C599 C1P NC6
HPS 3 10 1 2 +3V
20K/F_6 C1N SVDD
LO: NO PLUG-IN
2
19
R538 *47P/50V/0402 PVDD
5 2
GPIO 1 H.P. HI: PLUG-IN 0_4 7
PVSS PGND
17 C601
(27) SPDIF SVSS SGND
JDREF
1U/10V_4
U26 MAX4411ETP+
R493 +3V C603
R539 ALC262
48
47
46
45
44
43
42
41
40
39
38
37
*1K_4 1U/10V_4
*0_4 +5VA
SPDIFI/EAPD
NC
NC
HP_OUT_R
SPDIFO
GPIO1
GPIO0
AVSS2
HP_OUT_L
AVDD2
JDREF
MONO_OUT
2
RESERVE BYPASS PATH C559 C554 C553 R497
+3V .1U_4 .1U_4 .47u/X7R/10V_6 10K_4
BEEP-1 *0_4 R506
1
1 36 CODEC_HP_R (27)
+3V DVDD1 LINE_OUT_R
2 35 CODEC_HP_L (27)
C576 C556 *10p_4 GPIO2 LINE-OUT-L
3 34
U28 .1U_4 GPIO3 SENSEB
4 33
74LVC1G86GW DVSS1 DCVOL ECN C2B
5 32
(15) AZ_SDOUTA
ALC262
5
(15) AZ_SYNCA 10 27
5
SYNC VREF
1 (15) AZ_RESET# 11 26 AGND
BEEP PCBEEP-1 PCBEEP-2 RESET# AVSS1
4 12 25 +5VA
CODEC_BIT_CK PC-BEEP AVDD1
(28) SYSSPKOFF# 2
2
R502 C563
SENSEA
CD_GND
3 3
LINE2-R
LINE1-R
U27 10K_4 .1U_4 C408 C409 C560 C562 C561
3
LINE2-L
LINE1-L
MIC2-R
MIC1-R
MIC2-L
MIC1-L
CD_R
NC7SZ08P5X_NL R495 R503 .1U_4 .1U_4 10U/10V/X5R_8 12P
CD-L
1K/F_4
1
*22_4
10U/10V/X5R_8
13
14
15
16
17
18
19
20
21
22
23
24
ECN C2B AGND
C555 ADD CODEC_JD
*10p_4 AGND AGND
LINEINR_CODEC C569 .1U_4 Layout note:
R543 39.2K/F_4CODEC_JD LINEINL_CODEC C575 .1U_4 AGND
(27) HP_JD
R544 20K/F_4 CD_GND
(27) MIC_JD MICIN1-R C568 .1U_4 MIC_SYS
5mil
MIC_SYS (27) 5mil
CD_L 10mil
C571 .1U_4 LINE2-L MICIN1-L C567 .1U_4 5mil
CD_GND 5mil
C564 .1U_4 LINE2-R CD_RC C574 .1U_4 5mil
AGND CD_R
C572 .1U_4 MIC2-L CD_GNDC C566 .1U_4
10mil
AGND 5mil
CD_GND 5mil
MIC_SYS_INT C565 .1U_4 MIC2-R CD_LC C573 .1U_4
(27) MIC_SYS_INT
ECN C2B
PER VISTA REQUEST,
MODIFY MIC PATH
2
AUDIO POWER AND GND +5V AZALIA MDC INTERFACE 2
U13
G913C
+3VSUS
20 mil 4 3
20 mil
OUT IN
2 CN14
1
GND MDC_DFHS12FS688
R297
1
C404 C405 C407 5 1 C400 C401
.1U_4 10U/10V/X5R_8 SET SHDN .1U_4 10U/10V/X5R_8 C604 C605
.01U_4 1 MDC Reserved1 2
GND1 1U/10V_4 10U/10V/X5R_8
2
2
5 6
R295 GND2 3.3V
(15) CD_SYNC_MDC 7 8
10K/F_6 R302 22_4 IAC_SYNC GND3
(15) CD_SDIN0 9 10
IAC_SDATAIN GND4 R300 0_4
(15) CD_RESET#_MDC 11 12 CD_BITCLKA_MDC (15)
IAC_RESET# IAC_BITCLK
Vout=Vset{1+R(4,5)/R(5,gnd)}
AGND Vset=1.25V MAINON
AGND MAINON (28,31,32,33) C414 C413
Vout=1.25(1+29.4K/10K)=4.925V *10p_4 *10p_4
Vout=1.25(1+28.7K/10K)=4.8375V
Vout=1.25(1+27K/10K)=4.625V
AGND AGND
SPRAY THE BRIDGE ON THE GAP OF
A/DGND UNIFORMLY. PROJECT : ED5
Quanta Computer Inc.
Date:
Document Number
AUDIO CODEC ALC262 AND MDC
Monday, May 22, 2006
E
Sheet 26 of 34
Rev
2A
AGND
C612 C613
E 47P_4 47P_4
CN15
INT. SPEAKER E
25
15
10
8
7
*100K_4 2.2U/10V/X5R C581
2 1 2 20 R517 0_4
VDD
HPVDD
C1N
CPVDD
C1P
(26) CODEC_HP_L INL HPS AGND
2 1 28 14 SUPPORT MULTI-STREAMIN, ECN C2B ECN C2B ECN C2B
(26) CODEC_HP_R INR HPL
SO, H.P. FROM CODEC CHANGE PWR TO +5V DUE TO HAS HP_JD, REMOVE MOS FOLLOW DEMO CKT,
2.2U/10V/X5R C582 1 13 THEN DELECT Q36 SWAP PIN4 & 5
R509 NC HPR +5V
D AVDD 27 4 INSPKL+ D
+5V NC OUTL+ INSPKL- AVDD
5
*100K_4
GAIN1 24
OUTL-
OUTR-
17
18
INSPKR-
INSPKR+
L65 BK1608LL121_6 C552 .1U_4 HEADPHONE OUT
C600 .1U_4 R516 GAIN_SEL OUTR+
AGND *10K_4 23 6 S/PDIF
5
GND PVDDL
(28) AMP_MUTE# 1
PGNDL
3 NORMAL OPEN (HI) CN31
4 22 16
CPGND
CPVSS
/SHDN PVDDR
2 19 5 9
GND
GND
VSS
(26) CODAC_MUTE# PGNDR
U30 21 HP_JD 4 10
VBIAS (26) HP_JD
NC7SZ08P5X_NL C584 C578 C592 C595 R504 0_6 HPL_R L66 BK1608LL121_6 HPL_SYS
3
(26) HPL 2
R524 MAX9755AETI .1U_4 R505 0_6 HPL_L L67 BK1608LL121_6 HPR_SYS 3
(26) HPR
29
26
11
12
10K_4 C594 .1U_4
9
1
1U/10V_4
ECN E3B R501 R500 C558 C557 AGND 8
10U/10V/X5R_8
10U/10V/X5R_8
LED
SOUND CHANGE *1K_6 *1K_6 470P_50V_4 470P_50V_4 7 Drive
AGND 6 IC
AGND C589 AGND
R547 1U/10V_4 ECN C2B
10K_4 SWAP PIN7&8 GP1F562T AGND
AGND DFTJ10FR089
(26) MUTE#
AGND AGND SPDIF_OUT
R548
D28 +5V
20K/F_4 *DA204U
C C
1
D3A Add one 10K and 20K in front of U31/ MAX4411 and dehind HP_JD
3
U30/ NC75Z08 P.27 add R547,R548
AVDD
2
AGND
B B
CN32
+3VPCU +3VPCU
123
136
157
166
161
.1U_4 RF_SW# R317 4.7K/F_4
16
34
45
95
D D
U14 SHBM=1: Enable shared memory with host BIOS (HCFGBAH, (HCFGBAH,
1 0
VBAT
VDD
AVCC
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
HCFGBAL) HCFGBAL)+1 TV_SENSE#_D R315 10K_4
1 1 Reserved
+3VPCU SERIRQ 7 81 TEMP_MBAT MONITOR_PLUG# R316 10K_4
(14,18,24) SERIRQ SERIRQ AD0 TEMP_MBAT (34)
8 82 T86
LFRAME#/FWH4 LDRQ AD1 T89
(14,17) LFRAME#/FWH4 9 83
R313 LAD0/FWH0 LFRAME AD2 T85
(14) LAD0/FWH0 15 84
LAD1/FWH1 LAD0 Host interface AD3 RF_SW#
(14) LAD1/FWH1 14 87 RF_SW# (29)
470K_4 LAD2/FWH2 LAD1 IOPE0AD4
(14) LAD2/FWH2 13 88
LAD3/FWH3 LAD2 IOPE1/AD5 SUSC#
(14) LAD3/FWH3 10 89 SUSC# (15)
PCLK_591 LAD3 AD Input IOPE2/AD6 HWPG_591
(14,17) PCLK_591 18 90
LCLK IOPE3/AD7 +3VPCU
2 1 19 93
LREST DP/AD8
(15) KBSMI# 2 1 MTW355 22 94
D14 D15 SMI DN/AD9
(15) SWI# 2 1 23
MTW355 D16 *MTW355 PWUREQ CC-SET
99 CC-SET (34)
D17 DA0 CV-SET
100 CV-SET (34)
DA1
(15) SCI# 2 1MTW355 31 DA output 101 CONTRAST
CONTRAST (20)
R527 R526
IOPD3/ECSCI DA2 VFAN 4.7K/F_4 4.7K/F_4
102 VFAN (29)
D12 MTW355 DA3 +3VPCU
GATEA20 2 1 5 32 8724CELLS (34)
(15) GATEA20 GA20/IOPB5 IOPA0/PWM0
6 33 NB_PWRGD (5,11)
RCIN# KBRST/IOPB6 IOPA1/PWM1 U32
(15) RCIN# 2 1 36 SYSSPKOFF# (26)
D13 MTW355 PWM IOPA2/PWM2 D18 MBCLK
37 AMP_MUTE# (27) 6 1
MX0 IOPA3/PWM3 TV_SENSE#_D MBDATA SCL A0
(29) MX0 71 or PORTA 38 2 1 TV_SENSE# (19) 5 2
MX1 KBSIN0 IOPA4/PWM4 SDA A1
(29) MX1 72 39 BT1# (29) 3
MX2 KBSIN1 IOPA5/PWM5 A2
(29) MX2 73 40 BT2# (29)
MX3 KBSIN2 IOPA6/PWM6 MTW355
(29) MX3 74 43 MONITOR_PLUG# (20) 7 8
MX4 KBSIN3 IOPA7/PWM7 WP VCC
(29) MX4 77 4
MX5 KBSIN4 GND
(29) MX5 78 153 SRS_EN (26)
MX6 KBSIN5 IOPB0/URXD TX_551 24LC08
(29) MX6 79 154 T83
MX7 KBSIN6 Key matrix scan IOPB1/UTXD
(29) MX7 80 162 CPU_EC_PROCHOT# (5)
KBSIN7 IOPB2/USCLK MBCLK
163 MBCLK (34)
MY0 PORTB IOPB3/SCL1 MBDATA
C (29) MY0 49 164 MBDATA (34) C
MY1 KBSOUT0 IOPB4/SDA1 PCIRST# U33
(29) MY1 50 165 PCIRST# (14,18,23,24)
MY2 KBSOUT1 IOPB7/RING/PFAIL ST Micro M29W008AB/AMD-29LV081B/SST39VF080
(29) MY2 51
MY3 KBSOUT2 591_PME#
(29) MY3 52 168
MY4 KBSOUT3 IOPC0 MBCLK_CPU ENV0 D0
(29) MY4 53 169 MBCLK_CPU (5) 21 25
MY5 KBSOUT4 IOPC1/SCL2 MBDATA_CPU D11 ENV1 A0 D0 D1 +3VPCU
(29) MY5 56 170 MBDATA_CPU (5) 20 26
MY6 KBSOUT5 IOPC2/SDA2 BADDR0 A1 D1 D2
(29) MY6 57 171 1 2 DNBSWON# (15) 19 27
MY7 KBSOUT6 PORTC IOPC3/TA1 FANSIG BADDR1 A2 D2 D3
(29) MY7 58 172 FANSIG (29) 18 28
MY8 KBSOUT7 IOPC4/TB1/EXWINT22 EC_FPBACK# MTW355 TRIS A3 D3 D4 R531
(29) MY8 59 175 EC_FPBACK# (20) 17 32
MY9 KBSOUT8 IOPC5/TA2 LID591# +3VPCU SHBM A4 D4 D5 10K_4
(29) MY9 60 176 LID591# (20) 16 33
MY10 KBSOUT9 IOPC6/TB2/EXWINT23 PWROK_1 R311 0_6 A6 A5 D5 D6
(29) MY10 61 1 EC_PWRGD (5,14,15) 15 34
MY11 KBSOUT10 IOPC7/CLKOUT A7 A6 D6 D7
(29) MY11 64 14 35
MY12 KBSOUT11 A8 A7 D7
(29) MY12 65 26 VLDT_RUN_ON (31,33) 8
MY13 KBSOUT12 IOPD0/RI1/EXWINT20 ACIN A9 A8 VCC1_PWROK
(29) MY13 66 PORTD-1 29 ACIN (34) 7 10
MY14 KBSOUT13 IOPD1/RI2/EXWINT21 R304 R305 A10 A9 RESET#/NC
(29) MY14 67 30 36 12 T138
KBSOUT14 IOPD2/EXWINT24 A10 RY/BY#/NC
1
MY15 68 10K_4 10K_4 A11 6 29 C609
(29) MY15 KBSOUT15 A11 NC1
2 NBSWON# A12 5 38 .1U_4
IOPE4/SWIN NBSWON# (29) A12 NC2
105 44 SUSB# MBCLK_CPU A13 4 11
T88 TINT IOPE5/EXWINT40 SUSB# (15) A13 NC3
PORTE MBDATA_CPU A14
2
T87 106 24 3
TCK IOPE6/LPCPD/EXWIN45 R314 0_4 A15 A14 +3VPCU
T90 107 25 CLKRUN# (14,18,24) 2 31
TDO JTAG debug port IOPE7/CLKRUN/EXWINT46 A16 A15 VCC
T140 108 1 30
TDI ENV0 A17 A16 VCC
T139 109 124 40
TMS IOPH0/A0/ENV0 ENV1 +3VPCU +3V_S5 A18 A17
125 13
IOPH1/A1/ENV1 BADDR0 A19 A18
(25) FM_LED_EC 110 126 37
PSCLK1/IOPF0 IOPH2/A2/BADDR0 BADDR1 A19
(29) CARD_LED 111 127 23
PSDAT1/IOPF1 IOPH3/A3/BADDR1 GND
2
114 128 TRIS R303 R301 CS# 22 39
PSCLK2/IOPF2 PORTH IOPH4/A4/TRIS SHBM *4.7K_4 10K_4 RD# CE# GND
115 131 24
TBCLK PSDAT2/IOPF3 PS2 interface IOPH5/A5/SHBM A6 WR# OE#
(29) TBCLK 116 132 9
TBDATA PSCLK3/IOPF4 IOPH6/A6 A7 WE#
(29) TBDATA 117 133
CAPSLED# PSDAT3/IOPF5 IOPH7/A7 591_PME#
(29) CAPSLED# 118 3 1 LAN_PME# (23)
NUMLED# PSCLK4/IOPF6 D0
(29) NUMLED# 119 138
PSDAT4/IOPF7 IOPI0/D0 D1 Q20
139
IOPI1/D1 D2 PDTC143TT
140
IOPI2/D2 D3
141
591_32KX1 PORTI IOPI3/D3 D4
158 144
32KX1/32KCLKOUT IOPI4/D4 D5
B 145 B
R529 20M_6 591_32KX2 IOPI5/D5 D6
160 146
32KX2 IOPI6/D6 D7
147
Y9 IOPI7/D7
4 1 R528 121K/F_6 150 RD#
+3VPCU PORTJ-1 IOPJ0/RD WR# U34 *PLCC32
3 2 151
IOPJ1/WR0 D0
12 13
R532 10K_4 A0 D0 D1
Edison--11/11- Modify SELIO
152 11
A1 D1
14
32.768KHZ 10 15 D2
T84 A2 D2
C608 C607 (29) PWRLED# 62 41 9 17 D3
IOPJ2/BST0 IOPD4 CELL-SET A3 D3 D4
(29) SCROLED# 63 42 8 18
10P_4 10P_4 IOPJ3/BST1 PORTD-2 IOPD5 D/C# A4 D4 D5
(22) USBON# 69 54 D/C# (34) 7 19
IOPJ4/BST2 PORTJ-2 IOPD6 BL/C# A5 D5 D6
(29) SUSLED# 70 55 BL/C# (34) 6 20
IOPJ5/PFS IOPD7 A6 D6 D7
(29) BATLED0# 75 5 21
IOPJ6/PLI A8 A7 D7
(29) BATLED1# 76 143 27
IOPJ7/BRKL_RSTO IOPK0/A8 A9 A8
142 26
IOPK1/A9 A10 A9 A18
(19) RF_EN 148 135 23 1
BT_POWERON# IOPM0/D8 PORTK IOPK2/A10 A11 A10 VPP
(22) BT_POWERON# 149 134 25
IOPM1/D9 IOPK3/A11 A12 A11
(15) RSMRST# 155 130 4
IOPM2/D10 PORTM IOPK4/A12 A13 A12
(19) TV_POWERON# 156 129 28
VRON IOPM3/D11 IOPK5/A13/BE0 A14 A13
(30) VRON 3 121 29
MAINON IOPM4/D12 IOPK6/A14/BE1 A15 A14 +3VPCU
(26,31,32,33) MAINON 4 120 3
SUSON IOPM5/D13 IOPK7/A15/CBRD A15
(32,33) SUSON 27 2
S5_ON IOPM6/D14 A16 A16
(32,33) S5_ON 28 113 30 32
IOPM7/D15 IOPL0/A16 A17 A17 VCC
112
CS# PORTL IOPL1/A17 A18 CS# C606
173 104 22
SEL0 IOPL2/A18 A19 RD# CE#
174 103 24
+3V SEL1 IOPL3/A19 WR# OE# .1U_4
47 48 31 16
CLK IOPL4/WR1 WE# GND
AGND
GND1
GND2
GND3
GND4
GND5
GND6
GND7
R530
NC10
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
96
11
12
20
21
85
86
91
92
97
98
1 2
A
(33) HWPG_SYS
D30 MTW355
FWH A
(32) HWPG_1.8V 1 2
C422
D32 MTW355
1 2 1U/10V_4
(31) HWPG_1.2V
D31 MTW355
1 2
(30) CPU_COREPG PROJECT : ED5
HWPG_591 DIRECTLY 50 mS Quanta Computer Inc.
EC & FALSH ROM HWPG_591 ===> NB_PWRGD ===> EC_PWRGD Size Document Number Rev
NORTH BRIDGE SOUTH BRIDGE PC97551 & FLASH 2A
+3V
R328 0_4
INT K/B MAX6648_OV# (5) R327
10K/F_6
CN10
(28) FANSIG
U15 G995 CN22
25 2 3 TH_FAN_POWER
25 +3VSUS +5V VIN VO 1
MY15 24 5
(28) MY15 24 GND 30 MIL 2
2
MY14 23 1 6
(28) MY14 23 FON GND 3
MY13 22 RP2 10KX8 CA3 *220PX4 CA5 *220PX4 7 C439
(28) MY13 22 GND
MY12 21 10 1 MX1 MY3 7 8 7 8 MX7 4 8 2.2U/10V/X5R C438 85204-0300L
(28) MY12 21 (28) VFAN VSET GND
MY11 MX0 MX2 MX3 MY5 .01U_4
1
D (28) MY11 20 9 2 5 6 5 6 D
MY10 20 MY2 MX3 MX2 MY6
(28) MY10 19 8 3 3 4 3 4 D3A:Correct P/N
MY9 19 MY1 MY3 MX1 MY7
18 7 4 1 2 1 2
(28) MY9 to 995
TPM
MY8 18 MY0
(28) MY8 17 6 5
MY7 17
(28) MY7 16
MY6 16
(28) MY6 15
MY5 15 CA7 *220PX4 CA4 *220PX4
(28) MY5 14
MX7 14 RP4 10KX8 MY15 MY4
(28) MX7 13 7 8 7 8
MX6 13 MY8 MY14 MX4
(28) MX6 12 10 1 5 6 5 6
MX5 12 MY15 MY9 MY13 MX5 +5V L41 C258
(28) MX5 11 9 2 3 4 3 4
MX4 11 MY14 MY10 MY12 MX6 BK2125HS330_8 .1U_4
(28) MX4 10 8 3 1 2 1 2 SW7
MY4 10 MY13 MY11 +5V_TP
(28) MY4 9 7 4
MY3 9 MY12 TOUCH_RIGHT
(28) MY3 8 6 5 1 3
MX3 8
(28) MX3 7 2 4
MX2 7 CA6 *220PX4 CA2 *220PX4 R187 R177
(28) MX2 6 5
MX1 6 MY11 MY0 10K_4 10K_4
(28) MX1 5 7 8 7 8
MX0 5 RP3 10KX8 MY10 1
(28) MX0 4 5 6 5 6 MY1 DHP00006102
MY2 4 MX7 MY9 2
(28) MY2 3 10 1 3 4 3 4 MY2 L39 LZA10-2ACB104MT_6 TP_DATA
MY1 3 MX6 MY5 MY8 MX0 (28) TBDATA 3
(28) MY1 2 9 2 1 2 1 2
MY0 2 MX5 MY6 L38 LZA10-2ACB104MT_6 TP_CLK 4
(28) MY0 1 8 3 (28) TBCLK
1 MX4 MY7 5
7 4 SW6
MY4 6
6 5
6906-25 7 TOUCH_LEFT 1 3
C248 C229 TOUCH_LEFT 8
2 4
*.1U_4 *.1U_4 9
5
QCI P/N 10
TOUCH_RIGHT 11
IT IS NOT GREEN PART DHP00006102
KBC TPD
12
ECN 2A C227 C223 CN9
C BOM CHANGE *.1U_4 *.1U_4 TOUCH_PAD C
CHANGE TO 560OHM
+5V +5VPCU
D3A: change CN9 P/N, and
changed FootPrint
(28) SCROLED#
SCROLED# 1 3 SCRLED
LED5
R57 560/F_4
(28) BATLED0# 1 3 BAT_LED_BL
BAT_LED_AM
3
4
1 R368
2 R367
560/F_4
560/F_4
SWITCH
BLUE_LED DTC144EUA
DTC144EUA Q25
Q8 LED7 SW2
LED_BLUE/YELLOW
2
2
+3V +3VPCU
3 1 NBSWON# (28)
2
4 2
Q24 5
CAPSLED# 1 3 CAPSLED R48 560/F_4 DTC144EUA
(28) CAPSLED#
LED4 1 3 DHP00006102
(28) BATLED1#
BLUE_LED D3A:Change from SUS to PCU
DTC144EUA SW3
Q6
+5VPCU
2
4 2
Q2 5
DTC144EUA
+5V DHP00006102
*.1U_4@SATA
(28) SUSLED# 1 3 SRS ON/Off
C29
U5
*NC7SZ08P5X_NL@SATA (19) WLAN_LED_BL
5
1
(16) SATA_LED# DISK_LED# R33 560/F_4
4
2 ECN E3B
(21) IDELED# LED3 (19) WIRELESS_LED IT-1188E SW8
unstuff R370,Q27
BLUE_LED
3
5
0_4@PATA BT_LED_AM 4 2 R378 560/F_4
R27 10K_4 R28
LED
2
MSIC. 5 4 3 2
Size
Date:
Document Number
T/P,FAN,SWITCH,LED,K/B
Monday, May 22, 2006
1
Sheet 29 of 34
Rev
2A
+5VPCU
+5VPCU
+3V PR110
8774VCC
2
10/F_6 PC106
2
PR29 PC105
19
25
PR109
D 0_6 2.2U/10V/X5R 4.7U/10V/X5R_8 PL11 D
100K/F_4 PD7 VIN_8774 HI0805R800R_8_5A VIN
1
VCC
VDD
PR147 RB500V
10K/F_6 37 PR106 200K/F_4 PC114 PC111 PC104
TWO-PH
7
1
17 TON PL10
PHASEG
10U/25V_12
HI0805R800R_8_5A
PR21 0_6
2200P/50V_4
.1U/50V_6
10U/25V_12
10U/25V_12
(28) CPU_COREPG 1
5
PWRGD
29 8774DH1
DH1
PR39 4
D0 PR33 0_6 8774BST1 0_6 PC101 PC109
(5) VID0 31 30
D0 BST1 PQ34
D1 PR32 0_6
32
1
2
3
(5) VID1 D1 PC29 NTMFS4707NT1G PL20
D2 PR31 0_6 .22U/25V 0.36uH
(5) VID2 33
D2 28 8774LX1 1 2
D3 PR30 0_6 LX1
(5) VID3 34
D3
Change PL20 and PL21 from DC+45Q0M000 to CV+18V0MZ04
5
D4 PR28 0_6
35
4
(5) VID4 D4 Change PR117 & PR114 from CS22102FB12 to CS21622FB17
D5 PR26 0_6 8774DL1
(5) VID5 36 26 Change PR116 & PR113 from CS24022FB13 to CS23012FB16
2
D5 DL1 4
40 27 PQ31 PR117 01/10
1
IC PGND1 1.62K/F_4 PR116 PR118
NTMFS4108NT1G 3.01K/F_4 NTC 10K_6-B4.25K
1
2
3
PR27 0_4
38
1
C (28) VRON SHDN C
PR24 0_4 PC27 .22U/25V
8774SKIP# 39 Change PQ33 from P/N:
(5) PWR_PSI# SKIP PC107
*2200P BAM41190005 to P/N:
BAM41080005.
PR9 20K/F_6 PC19 470P_50V_4 18
GND
VCC_CORE 2 1 9
CCI
PR17 *1.5K/F PC17 *1000P VCC_CORE
PR12 71.5K/F_6 16 8774CSP1 2 1
8774TIME 6 CSP1 15 8774CSP2 PR8 10/F_6
TIME CSP2
Change PR20 from P/N:
2
PC18 470P_50V_4 11 PR20 2.49K/F_6 PC21 PC37
1 2 8774CCV 8 FB CS21503D900 to P/N: 1000p/50V_4
CCV COREFB+V (5) VCC_CORE
CS22493F945. COREFB- (5)
PR22
1
PC102 12 8774GNDS
GNDS
.1U/50V_6
8774REF 10 + + + + +
REF 10/F_6
1
.22U/25V
PC24 PR23
2
1000p/50V_4 10/F_6 VIN_8774
Change Value to +5VPCU PC117 PC36 PC35
2
PR10
31.6K C3A PC115 PC113 PC112 PC110 PC103 470u/2.5V_7343 470u/2.5V_7343 *470u/2.5V_7343
2
31.6K/F_4 PC116 PC34
470u/2.5V_7343 470u/2.5V_7343
PR19 169K/F PD8
2200P/50V_4
.1U/50V_6
10U/25V_12
10U/25V_12
470U/25V
B 8774OFS 2 RB500V + B
3
OFS
21 8774DH2
1
1
DH2
4
PWR_PSI# 2 PQ3 PC20 20 8774BST2
2N7002E-LF 470P_50V_4 BST2
PR34 0_6 PQ32
2
1
2
3
PC28
.22U/25V NTMFS4707NT1G PL21 Change PL20 and PL21 from DC+45Q0M000 to CV+18V0MZ04
0.36uH
1
PR18 100K/F_4 22 8774LX2 1 2 Change PR117 & PR114 from CS22102FB12 to CS21622FB17
VRHOT# LX2
+5VPCU 4 Change PR116 & PR113 from CS24022FB13 to CS23012FB16
VRHOT
5
24 01/10
4
PR16 10K/F_6 DL2
2
POUT 3
POUT 4 PR114
1
PR11 10K/F_6
2
1
THRM 5 23 PC25 .22U/25V
2
PROJECT : ED5
Quanta Computer Inc.
Size Document Number Rev
CPU CORE MAX8760 2A
VIN-1.2V
PL9
VIN
HI0805R800R_8_5A
+5VPCU PC98
PR4 PC99 PC100
.1U/50V_6 10U/25V_12 10U/25V_12
2
10/F_6
5
6
7
8
PC7 PD2
1
D PR6 PC8 PQ26 D
*.1u/25V_6 BAS316 FDS6612A
1M_6 4.7U/6.3V_6 4 Change PL8 from P/N:
PR5 *0_4
2
(26,28,32,33) MAINON DC-15A00036 to P/N:
REMOVE PR5 AND PC14 PU2 PC11 DC-15A00010.
SC1470 .1U/50V_6
PR148 0_4 1 14
(28,33) VLDT_RUN_ON EN/PSV BST
+3V 2 13 DH-1.2V PL8 D3A:Remove Jump
3
2
1
VIN DH 1.5uH-MSCDR1-104R
3 12
VOUT LX +1.2V
4 11 PR101 15K/F_6
5
6
7
8
PR3 VCCA ILIM
10K/F_6 5 10 PQ23
1
PR2 FBK VDDP FDS6690AS
6 9 DL-1.2V 4 + + PR100
(28) HWPG_1.2V PGOOD DL PC96
0_6 7 8 14K/F_6 1000p/50V_4
GND PGND
2
1.2V_FB
1
3
2
1
PC9 PC12 10K/F_6
.1U/50V_6 1000p/50V_4 470u/2.5V_7343 PC6 10U/6.3V_6
470u/2.5V_7343
2
C C
VOUT=(1+R2/R3)*0.5
PR48 PU5
MAINON 1 2 1 4
SHDN VO +2.5V
0_6
2
PR47 GND
1 2 3 5
+3VPCU 0_6 VIN SET
G923-330T1U PR49
20K/F_6 PC43
PC31 10U/10V/X5R_8
B 10U/10V/X5R_8 B
PR50
Change PU6 from P/N: AL004215003 to 20K/F_6
P/N: AL004215011 . BOM typo. Lead ->
EP
D3A:Remove Jump
MAINON PR51 0_6 1 5 +1.5V
NC0 NC2
2 6
Vout =1.25(1+R1/R2)
EN VO
+1.8V
= 1.25 (1+20K/20K)
PC39 3 8
.1U/50V_6 VIN GND0 = 2.5V
4 9
ADJ
NC1 GND1
+ PC46 PC57
PC51 *150U/4V_3528 .1U/50V_6
PC53 PU6 10U/10V/X5R_8 <Type>
7
10U/10V/X5R_8
1.5V-ADJ
R1
PR53 PR52
6.8K/F_6
7.5K/F_6 Vo=0.8(R1+R2)/R2
A A
R2
PROJECT : ED5
Quanta Computer Inc.
Size Document Number Rev
Custom 2A
+1.2V & NBRUN
Date: Monday, May 22, 2006 Sheet 31 of 34
5 4 3 2 1
480_VIN
PL19 +5VSUS
PR85
VIN
480VCCA
HI0805R800R_8_5A
D
10/F_6 D
1
PC150 PC149 PC148 PC147
PC91 Change PU10 from P/N: AL004800003 to P/N:
10U/25V_12 10U/25V_12 .1U/50V_6 PD18 4.7U/10V/X5R_8 1U/16V_6
AL000488013.
2
RB500V
+3VSUS
8
7
6
5
15
14
1.8V_BST
6
PU10
4 PR91 0_6 SC488MLTRT PR84
VDDP
VDDP
VCCA
D3A:Remove Jump 22 10K/F_6
PQ38 BST
FDS6612A 1.8V_DH 21 13
DH PGD HWPG_1.8V (28)
12
+1.8VSUS NC 0_6 PR149
PL18 PC145
1R5UH-LF .1U/25_8 0_6 PR136
1
2
3
11 SUSON (28,33)
EN/PSV
20
LX *0_6 PR137
10 MAINON (26,28,31,33)
VTTEN
8
7
6
5
8
7
6
5
1
1
+ +
4 4 1.8_DL 19 PC151 ECN 2A
PD19 DL PC92 PC93
7 CHANGE PC92 AND PC93 FROM CC1206 TO C0805
EC10QS04 NC .1U/50V_6 10U/10V-0805 10U/10V-0805
2
2
*CAP 18 D3A:Remove Jump
C
PC134 PC90 PR142 PGND1 PC152 PC142 PC143 C
560U/4V_8X6 PC88 10U/6.3V_6 .1U/50V_6 10U/10V-1206 10U/10V-1206
1
2
3
1
2
3
17
470u/2.5V_7343 PGND1 0.9V_P +0.9V_VTER
24
2.26K/F_6 RDS(ON)=6m ohm VTT
PR140 0_6 2 PR143 0_6
PR139 *0_6 VTTS
8
1.8V_FB VDDQS
+5VSUS 9 25
FB G
VSSA
26
REF
486TON G
480_VIN 4 27
TON
G
G
G
2
PR144
PC153 PR145 1M_6
29
28
10K/F_6
5
1U/16V_6
2
PC154 PR146
1000P-6 10/F_6
1
VOUT=(1+PR82/PR81)*1.5
+0.9V_REF
2
PC155
1U/16V_6
1
B B
+1.8VSUS
1
2
5
6
PR70 PU8
1 2 1 4 3 PQ7
(28,33) S5_ON SHDN VO +1.8V_S5 (33) MAIND
0_6 AO6402
2
PR74 GND
4
+3VPCU 1 2 3 5
0_6 VIN SET PR72
+1.8V
G923-330T1U
47K/F_6 PC74
PC75 10U/10V/X5R_8 PC30
10U/10V/X5R_8 .1U/50V_6
ECN 2A
CHANGE PR72 FROM 21K/F TO 47K/F 0603
PR71
100K/F_6
A A
Vout =1.25(1+R1/R2)
= 1.25 (1+44K/100K) PROJECT : ED5
= 1.8V Quanta Computer Inc.
Size Document Number Rev
Custom 2A
1.8V&DDR
Date: Monday, May 22, 2006 Sheet 32 of 34
5 4 3 2 1
+5VPCU
PC125 PR127 VIN1999 VIN1999-3
*100P *6.81K/F PD15 PR80
2 1 1 2 PL6 HI0805R800R_8_5A
VIN
1
4.7-LF PC136
1
ZD5.6V PC81
5
PC82 .1U/50V_6 PC70 .1U/50V_6
2
PR128 .1U/50V_6 .1U/50V_6
1
2
0_6 PR81
D1
D1
S2
G2
12K-LF
D PC76 PC73 D
PR79 *10U/25V_1206 10U/25V-X7R_T2
PQ12
(5) THERM_SYS_PWR
FDS6900AS PQ37
0_6
AO4812
S1/D2
G1
4
PL5
8
2 1 3R3UH
PC80 .22U/25V 1999LX3 +5VSUS
+3VPCU
FDS6900AS Rds on = 15mOhm
1
VL 1999DH3
+5V
FDS6690AS Rds on = 28mOhm PR78
1999DL3 PR60 + + PC52
ILOAD * Rds on * 10 = ILIM *2.7 .1U/50V_6 MAIND
PC130
PR130 100K/F_6 PC137 PC139
47/F_6 .1U/50V_6 .1U/50V_6
2
ILIM3 = 0.9V Current limit 6A
ILIM5 = 1.97V Current limit 7A SUSD
PC123 PC60
1U/16V_6 .1U/50V_6 *.01U PC61
Change PR76 from P/N: Change PR82 from P/N:
PC40 PC41 10U/10V/X5R_8
CS31003F949 to P/N: CS31003F949 to P/N: 1999VCC 17 22 330U/6.3V_7343 330U/6.3V_7343
VCC OUT3
CS41273F915 CS21213F914
REF2V REF2V 8 26 VIN1999-5
PC129 1U/16V_6 REF DH3
ILIM3 5 27 PL7 HI0805R800R_8_5A
ILIM3 LX3 VIN +3VPCU
PR82 ILIM5 11 28 1999BST3
PR76 ILIM5 BST3
51K/F_6 200K/F_4 7 24 PC84 PC83 PC132
FB3 DL3
5
6
7
8
VL 2 .1U/50V_6 10U/25V-X7R_T2 10U/25V-X7R_T2
ILIM3 ILIM5 +3VPCU VL 9 6 PC63
C FB5 SHDN 3 PD14 C
5
PR124 0_6 3VON 3 20 VIN1999 DAP202U 4 .1U/50V_6
ON3 V+ PQ16
1
1
PR77 PR83 PR122 0_6 5VON 4 18
100K/F_6 100K/F_6 ON5 LDO5 FDS6612A
PR121 23 10 PC128 Change PL8 from P/N: DC-15A00010 to P/N: Change PC85 from P/N:
GND PRO
2
100K/F_6 4.7U/10V/X5R_8 PC131
REF2V SKIP_SEL 12 19 .1U/50V_6
CV-2575MZ02. CH7331M8834 to P/N:
SKIP DL5 PQ9
3
2
1
CH73301M8L9.
PR123 0_6 PR131 100K/F_6 2 14 1999BST5 PL17 AO4812
(28) HWPG_SYS PGOOD BST5
D3A 2.5uH-MSCDR1-104R
1999LX5
4
1 15
N.C. LX5 +5VPCU
5
6
7
8
PC127 1U/16V_6 25 16 1999DH5
LDO3 DH5
1
PR132 +3VSUS
1999VCC 13 21 1999DL5 4 + +
TON OUT5 PR133 PC135
0_6 +3V
PU9 PQ15 *2.7 .1U/50V_6
MAX8734A-LF FDS6690AS
2
2
MAIND
PC45 PC42
PC133 PC138 PC85 PC86 .1U/50V_6 .1U/50V_6
3
2
1
D3A *.01U 390U/6.3V_8X6 330U/6.3V_7343 10U/10V/X5R_8 SUSD
PR129
SKIP_SEL *0_6
3
PR150 100K/F_6
+5VPCU 2 Change PU9 from P/N: AL001999W16 to P/N:
AL008734W18.
3
PQ40
B 2N7002E-LF VIN +1.8V +2.5V +3V +5V +12VOUT B
VIN +1.2V
1
2
(32) MAIND
PQ41
2N7002E-LF PR102 PR96 PR45 PR95 PR94 PR93
PR151 PR97 1M_6 22_8 22_8 22_8 22_8 1M_6
1
1M_6 22_8
RUN_ON_G
VLDT_RUN_G MAIND (32)
3
3
3
3
1
PC120 PQ42 1M_6 2N7002E-LF DTC144EUA
1
1
1999DL3 DTC144EUA
3
1
.1U/50V_6 10V-1
1
VIN +1.8VSUS +3VSUS +5VSUS +12VOUT
PC124
1U/16V_6
3
A PR125 0_6 10V-1 PQ11 PR61 A
2
1
2
5
6
3
PC121 PDTC143TT 1M_6
1999DL3
3 1 3 3 PQ10 2
(28,32) S5_ON PR111 2 2 2 2
.1U/50V_6 PR120 0_6 +12VOUT +12VOUT AO6402 (28,32) SUSON 1M_6 PC97
1 PQ29 PQ28 PQ27 PQ25 *2200P
PQ30 2N7002E-LF 2N7002E-LF 2N7002E-LF 2N7002E-LF
DTC144EUA
4
1
+3V_S5 PROJECT : ED5
1
PC122
1U/16V_6 PC62 Remove Short 0119 Quanta Computer Inc.
.1U/50V_6
Size Document Number Rev
Custom SYSTEM POWER MAX1999 2A
Date: Monday, May 22, 2006 Sheet 33 of 34
5 4 3 2 1
+3VPCU
PR67
D3A:Modify citcuit and Layout, update BOM, too VA 100K/F_6
HI0805R800R_8_5A
CN17 PL3 1
1 3 CELLR-SET PR66 0_6
D 8724CELLS (28) D
2 2
4 PD10 SPL1040PT
3 PL2 PC4 PC5 PC32 PC33
5 PR68
.1U/25_8 .1U/25_8 2200P/50V_4
.1U/25_8
POWER_JACK HI0805R800R_8_5A 100K/F_6
DCJK-2DC-S006-B14-3P-H
PC3
1
.1U/25_8
PC2 1P PC59 *.1u/50V_6
.1U/25_8 PR46
0.01_3720_1W 2P PC58 *.1u/50V_6
2
PD3 VH
2
SW1010C
5
6
7
8
VAD PR44
1
47K/F_6 PQ6
AO4414L
PL4 VAON PR43 4.7K/F_6 4
CSSP
PD4 CSSN HI0805R800R_8_5A
2
DA204U
PR7 PC54
10K/F_6 2 1U/16V_6 PC38 10U/25V_12
PC23 2 1
1
3
3
2
1
FOR 4S VIN
.01U/50V_6 1 CELLR-SET
VH
6
PC44 .1U/25_8
PQ2 PC22 PC119
IMZ2 PR62 33_6
4
3
2
1
IMD .1U/25_8 .1U/25_8
PU7 PQ36
27
26
2
+3VPCU MAX8724 FDS4435
C C
1
CSSP
CSSN
1 17 PC55 PC67
DCIN CELLS 1U/16V_6 1U/16V_6
1
Change net from PC65 28724LDO
PD5 USE DEFAULT 4.2V/CELL LDO
REFP to VIN .1U/50V_6 22 PD13 PR119
5
6
7
8
PD6 RB500V 8724LDO PR64 0_6 DLOV G1 PL14 0.015_3720
10 8 D1 1
RB500V VAD ACIN
24 8724BST 1 2 3R3UH PC126
VIN BST PC64 7 S1/D2 100U/25V BAT-V MBAT
D1 2 1 2
PR65 *0_6 15 SW1010C
PC26 (28) CV-SET VCTL .1U/25_8 6 G2 3
1
PR14 13 25 8724DH
1P
2P
.1U/25_8 (28) CC-SET ICTL DHI
5 S2 4 + + +
47K/F_6 PC69 PC66 12 23 8724LX PC118
REFIN LX PQ35 .01U/50V_6
1000p/50V_4 1000p/50V_4 11 21 FDS6900AS
2
PR13 47K/F_6 ACOK DLO
9 20 8724DL
ICHG PGND PC79 PC78
PU3A 28 19 CSIP 10U/25V_12 10U/25V_12
8
6
22K_6 CCI PR58 12.4K/F_6
3
CLS
5
GND
GND
CCS
TEMP_MBAT (28)
2
PC16 OSC PR57 PR56 PR55 PR54 PC56 HI0805R800R_8_5A
14
29
200KHz 10K/F_6 CN25 PL15
220p_4 1K/F_6 0_6 0_6 1U/16V_6 MBAT+ MBAT
6 5 TEMP_MBAT
1
4
B
PC50 PC49 PC48 3 PL16
B
2 HI0805R800R_8_5A
1
.1U/50V_6 .01U/50V_6 .01U/50V_6 7 1 PC68 PC71 PC77 +3VPCU
CURRNT LIMIT POINT = 3.4A SPE-C14455 47P_4 47P_4 .1U/50V_6 PR73 10K/F_6
PR69
2
330_4
VIN 10mil PR63
330_4
MBCLK (28)
VL
MBDATA MBDATA (28) TEMP_MBAT
1
PR37
PR35 PR42 PD12 PD11 PC72
220K_6 ZD5.6V .01U/50V_6
+3VPCU 22K_6 (28) ACIN ZD5.6V
2
PU3B 10K/F_6
5
2
+ 7 1 3 VAON
6 PR41 PD9
- 6.8K/F_6 1 2
VAD
PQ5
LM393 PR36 DTC144EUA ZD12V
PR40
PR38 220K_6 10K/F_6
2
3
D/C#
180K/F_6 D/C# (28)
2 BL/C#
BL/C# (28)
PQ4
2N7002E-LF
1
A A
PROJECT : ED5