MICROFABRICATION AND MEMS

Dr. Nisanth . A
Department of VLSI Design & Technology
Course objective
1. To introduce MEMS and Microsystems
2. To give an overview of Micro sensors, Actuators and Smart
Materials
3. To introduce CMOS compatible MEMS Fabrication Techniques
4. To explain the electronic circuits for micro and smart systems
5. To perform the case study of several MEMS Devices

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Syllabus
UNIT-I-Micro Sensors, Actuators, Systems and Smart Materials: An Overview

• Introduction: Why Miniaturization, Microsystems Versus MEMS Why

Microfabrication? Smart Materials, Structures and Systems, Integrated
Microsystems- Micromechanical Structures, Microsensors , Microactuators
• CMOS Compatible MEMS Fabrication- Silicon as a Material for
Micromachining, Thin-film Deposition, Lithography, Doping the Silicon
Wafer: Diffusion and Ion Implantation of Dopants, Etching, Silicon
Micromachining, Specialized Materials for Microsystems, Advanced
Microfabrication Processes.

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Syllabus
UNIT-II-Microsystems and Signal Conditioning Circuits

• Micro Sensors, Actuators, Systems and Smart Materials: An Overview-

Silicon Capacitive Accelerometer, Piezoresistive Pressure Sensor,
Conductometric Gas Sensor, Fiber-Optic Sensors, Electrostatic Comb-Drive,
Magnetic Microrelay, Microsystems at Radio Frequencies, Portable Blood
Analyzer, Piezoelectric Inkjet Print Head, Micromirror Array for Video
Projection, Micro-PCR Systems, Smart Materials and Systems.
• Electronics Circuits for Micro and Smart Systems- Signal Conditioning
Circuits, Practical Signal conditioning Circuits for Microsystem

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Syllabus
UNIT-III- Case Study of MEMS Devices

• Pressure Sensors, Inertial Sensors, Piezoelectric Transducers, RF MEMS,

Accelerometer with transducer.

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BOOKS:
• TEXTBOOKS:
• G. K. Ananthasuresh, K. J. Vinoy, S. Gopalakrishnan, K. N. Bhat, V.
K. Aatre “Micro and Smart Systems Technology and Modeling”,
John Wiley and Sons, 2009.
• REFERENCE BOOKS:
• Stephen D. Senturia, “Microsystem Design”, Kluar Publishers,
2001.
• Nadim Maluf, “An Introduction to Microelectromechanical
Systems Engineering”, Artech House, 2000.

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Processed Wafer → IC chip

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WHAT IS MEMS?
• MEMS=MicroElectroMechanical System
• Any engineering system that performs electrical and mechanical functions
with components in micrometers is a MEMS. (1 µm = 1/10 of human hair)
• Available MEMS products include:
• Micro sensors (acoustic wave, biomedical, chemical, inertia, optical,
pressure, radiation, thermal, etc.)
• Micro actuators (valves, pumps and microfluidics; electrical and optical
relays and switches; grippers, tweezers and tongs; linear and rotary motors,
etc.)
• Read/write heads in computer storage systems.
• Inkjet printer heads.
• Micro device components (e.g., mini robots and toys, micro surgical and
mobile telecom equipment, etc.)
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HOW SMALL ARE MEMS DEVICES?
• They can be of the size of a rice grain, or smaller!
• Two examples:-
• Inertia sensors for air bag deployment systems in
automobile
• Microcars

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 A scanning electron microscope picture of an ant carrying a
LIGA micro gear.

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Why miniaturization?
• A microsystem is a system that integrates, on a chip or in a package, one or more
of many things: sensors, actuators, electronics, computation, communication,
control, power generation, chemical processing, biological reactions, and more.
• Functionality of such an integrated system will not only be far superior to any other
engineered system that we know at the macroscale but will also achieve things
beyond those achievable by macrosystems.
• A chip that integrates several components, as already mentioned, can serve
multiple functions. This is one reason for miniaturization.
• Remains economical due to the batch production of microfabrication processes.
• Plenty of things on one single silicon wafer, and thus, the cost per individual thing
comes down drastically. This is another reason for miniaturization.
• Lower the energy requirements, thus adding a further reason for miniaturizing
devices and systems.

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Why miniaturization? Contd..
• Miniaturization can result in faster devices with improved thermal
management.
• Energy and materials requirement during fabrication can be reduced
significantly, thereby resulting in cost/performance advantages
• Another important advantage of miniaturization is the possibility of
integration of mechanical and fluidic parts with electronics, thereby
simplifying systems and reducing power requirements.
• Microfabrication employed for realizing such devices has improved
reproducibility, and devices thus produced have increased selectivity and
sensitivity, wider dynamic range, improved accuracy and reliability.
• Integrated microsystems are a collection of microsensors and actuators
that can sense their environment and react to changes in that
environment by use of a microcircuit control.
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MICROSYSTEMS VERSUS MEMS
• The acronym MEMS was coined during 1970-1980.
• However, this acronym is inadequate today because of the
numerous disciplines beyond just mechanical and electrical that
have joined the league.
• A more suitable term is ‘‘microsystems;’’

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WHY MICROFABRICATION?
• Microsystems technology emerged as a new discipline based on the
advances in integrate circuit (IC) fabrication processes, by which sensors,
actuators and control functions were co-fabricated in silicon.
• In microsystems, miniaturization is achieved by a fabrication approach
similar to that followed in ICs, commonly known as micromachining.
• As in ICs, much of the processing is done by chemical processing rather
than mechanical modifications.
• As with semiconductor processing in IC fabrication, micromachining has
become the fundamental technology for the fabrication of microsystems
devices and, in particular, miniaturized sensors and actuators.
• Silicon micromachining, the most mature of the micromachining
technologies, allows the fabrication of microsystems that have dimensions
in the submillimeter to micron range.
• It refers to fashioning microscopic mechanical parts out of a silicon
substrate or on a silicon substrate to make three-dimensional (3D)
structures.
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WHY MICROFABRICATION? Contd..
• Bulk micromachining, which involves carving out the required
structure by etching out the silicon substrate, is the commonly used
method.
• Surface micromachining is an alternate micromachining approach.
• It is based on patterning layers deposited on the surface of silicon or
any other substrate.
• This approach offers the attractive possibility of integrating the
micromachined device with microelectronics patterned and assembled
on the same wafer.
• In addition, the thickness of the structural layer in this case is precisely
determined by the thickness of the deposited layer and hence can be
controlled to submicron thickness levels.
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SEM image of SiO2 microcantilever beam prepared by bulk Schematic of a polycrystalline silicon resonating
micromachining (wet chemical etching) of silicon. made by the surface micromachining technique.

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Microfabrication Process:
• To fabricate any solid device component, one must first select materials and adequate
fabrication method.
• For MEMS and microsystems components, the sizes are so small that no machine
tools, e.g. lathe, milling machine, drilling press, etc. can do the job.
• There is simply no way one can even grip the work piece.
• Consequently, radically different techniques, non-machine-tool techniques need to be
used for such purpose.
• Most physical-chemical processes developed for “shaping” and fabricating ICs are
adopted for microsystems fabrications.
• This is the principal reason for using silicon and silicon compounds for most MEMS
and microsystems– because these are the materials used to produce ICs.

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Microfabrication Processes
• Photolithography
• Ion implantation
• Diffusion
• Oxidation
• Chemical vapour deposition
• Physical vapour deposition (Sputtering)
• Deposition by Epitaxy
• Etching

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SMART MATERIALS, STRUCTURES AND
SYSTEMS
• The objective is to develop technologies to produce nonbiological
systems that achieve optimum functionality as observed in natural
biological systems and emulate their adaptive capabilities by an
integrated design approach.
• A smart material is one whose electrical, mechanical, or acoustic
properties or whose structure, composition, or functions change in a
specified manner in response to some stimulus from the environment.
• Smart materials respond significantly to some external stimuli to which
most materials are unresponsive.
• Active system : has an inbuilt power source
• Passive system : there is no requirement for a power source.
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SMART MATERIALS, STRUCTURES AND
SYSTEMS
• Smart structures: that require
the addition of properly
designed sensors, actuators,
and controllers to an otherwise
‘‘dumb’’structure.
• Actuators and sensors can be
embedded at discrete locations
inside the structure without
affecting the structural integrity
of the main structure. Building blocks of a typical smart system.

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The historic Golden Bridge built in in Gujarat, India. The inset shows the details of one-time structural health
monitoring of a section of the bridge. It had 66 fiber optic strain gauges and micromachined accelerometers.
Courtesy: Instrumentation Scientific Technologies Pvt. Ltd., Bangalore, www.inscitechnologies.com.

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INTEGRATED MICROSYSTEMS
• Microsystems integrate sensors, actuators and electronics to provide some useful
function.
• Integrated microsystems can be classified into three major groups as follows:
• Micromechanical structures: These are non-moving structures, such as
microchannels.
• Microsensors: These respond to physical and chemical signals (such as
pressure, acceleration, pH, glucose level, etc.) and convert them to electrical
signals.
• Microactuators: These convert electrical or magnetic input to mechanical
forms of energy (e.g. resonating beams, switches, and micropumps).

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INTEGRATED MICROSYSTEMS- ADXL50

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INTEGRATED MICROSYSTEMS
• The ADXL50, which was released in 1991 and was Analog Devices’
first commercial device, is an excellent example of a microsystem.
• The block diagram of this system is shown in Figure.
• This microsystem is based on a surface micro machining technology
with sensing electronics integrated on the same chip as the
accelerometer.
• Here, the accelerometer is a sensor that responds to the acceleration or
deceleration and gives an output voltage to the control circuit, which
in turn triggers an actuator to deploy the airbag during a crash, so that
the persons seated in the front seat are protected from crashing into
the front windshield or the dashboard.
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Micromechanical Structures
• Micromachining is used commercially to
produce channels for microfluidic
devices and also to fabricate systems
referred to as ‘‘labs on a chip’’ for
chemical analysis and analysis of
biomedical materials.

silicon nanotip fabricated using bulk micromachining.

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Microsensors

Schematic diagrams of microsensors: (a) cut-away view of a piezoresistive pressure sensor; (b)
capacitive-sensing accelerometer.

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Microactuators

Schematic of a bulk micromachined micropump.

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Microactuators

(a) Schematic of micromirrors developed by Lucent Technologies optical switches in fiber optic communication.
(b) Lucent micromirror details.

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APPLICATIONS OF SMART MATERIALS AND
MICROSYSTEMS

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 CMOS Compatible MEMS Fabrication

SILICON AS A MATERIAL FOR MICROMACHINING

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Crystalline vs non crystalline

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Basic Crystal Structures

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FCC

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FCC

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Crystal Structure of Silicon
• Silicon crystals are made up of two interpenetrating face-centered cubic (FCC)
cells.
• In an FCC cell, atoms are located at the eight corners of the cubic lattice structure
and one atom at the center of each face.
• Because of interpenetration of two FCC unit cells, the unit cell of silicon crystal
contains four more atoms.
• Therefore, the silicon unit cell shown in Fig. has 18 atoms with eight atoms at the
corners, six atoms at the face centers, and four more atoms inside the unit cell
(shown as hollow spheres)

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Structure of silicon crystal

Diamond structure FCC

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• The arrangement of atoms in silicon crystal is not rotationally
symmetric, and as a result its material properties are anisotropic.
• Therefore, properties are specified with respect to designated
orientations and planes in the crystal.
• Crystal planes and orientations are designated by Miller indices
• In Cartesian coordinates, the equation of a plane is given by

• Where a,b,c are the intercepts of the plane on the x-,y-,and z-axes,
respectively. This equation can also be written as

• where h = 1/a, k =1/b and m = 1/c.

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Miller indices
• Miller indices are integer numbers obtained by multiplying the
reciprocal of intercepts with their least common multiple (LCM)
• These integers are given in the form
• (hkl) to designate the plane
and
• [hkl] to designate the direction normal to the plane.

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Numerical 1
• A plane intercepts the x-, y-, and z-axes at 2, 3, 4 respectively.
• Obtain an equation for the plane.
• Write down the Miller indices for this plane.

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Numerical 2
• A crystal plane in silicon intersects the x-, y-, and z-axes at x = 2, y
=1, and z = 1. Determine the Miller indices of this plane.

• Solution: The plane is denoted by (1/2, 1, 1) or properly denoted by

(1, 2, 2).

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Advantages of Si over Ge
• Si has a larger bandgap (1.1 eV for Si versus 0.66 eV for Ge)

• Si devices can operate at a higher temperature

• Intrinsic resistivity is higher (2.3 x 105 Ω-cm vs 47 Ω cm)

• SiO2 is more stable than GeO2 which is also water soluble

• Si is less costly

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Silicon Wafer Preparation
• Silicon is abundantly available in nature in the form of sand (SiO2) or
quartz.

• It must be converted into high-purity single-crystal silicon (SCS) with

impurity level less than 1 ppb (parts per billion) for use in
semiconductor and microsystems devices.

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Refining process
• Quartzite is refined chemically with carbon in an arc furnace at a very high
temperature to obtain 90%-99% pure silicon.
• This material, usually known as metallurgical-grade silicon (MGS)
• MGS is treated with hydrochloric acid to get trichlorosilane (SiHCl3).
• At room temperature trichlorosilane is in liquid form.
• Fractional distillation of SiHCl3 in a hydrogen atmosphere yields electronic-grade
silicon (EGS).
• The polycrystalline EGS obtained by the above process is the basic material for
the preparation of silicon wafers.
• The impurity level at this stage is about 1 ppb.
• The Czochralski method (a method of growing crystals) is adopted to convert
polycrystalline EGS into an SCS ingot.
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Basic Process Steps for Wafer Preparation

Wafer Lapping
Crystal Growth and Edge Grind Cleaning

Shaping Etching Inspection

Wafer Slicing Polishing Packaging

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Crystal growth process- Czochralski process

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Crystal orientation and dopant type in commercial silicon wafers with small diameters.

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 THIN-FILM DEPOSITION
• Thin films are an integral part of IC and microsystems fabrication.

• In ICs thin films are largely used as conductors or insulators.

• Metal films are used to form low-resistance ohmic connections to heavily doped n+/p+
regions or poly-Si layers, and are also used for rectifying contacts in metal-semiconductor
barriers.

• Common dielectric films include silicon dioxide (referred to as oxide) and silicon nitride.

• These are typically used as insulating layers between conducting layers in MOS devices,
for diffusion and ion implantation masks, and for passivation to protect devices from
impurities, moisture, and scratches.

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 THIN-FILM DEPOSITION
• Polysilicon (abbreviated as poly-Si or simply poly) is used as a gate
electrode in metal-oxide-semiconductor (MOS) devices, as a conductive
material for multilevel metallization, and as a contact material for devices
with shallow junctions.
• The source material for depositing these thin films on a substrate can be in
the gaseous, liquid, plasma, or solid state.
• The deposited films are characterized by their grain size, thickness,
uniformity, step coverage, adhesion, and corrosion resistance.

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 THIN-FILM DEPOSITION
• Physical vapor deposition (PVD) : In the PVD process, this transfer
takes place by physical means such as evaporation or impact.

• Chemical vapor deposition (CVD): In the CVD process, this transfer

takes place through a chemical reaction.

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Physical vapor deposition (PVD) :-Evaporation
• Evaporation is a relatively simple process of deposition of metal films
on a substrate.

• An evaporation system consists of an evaporation chamber, high-

vacuum pumping system, substrate holder, crucible/filament, and a
shutter.

• The source material is placed in the crucible/filament.

• The chamber is evacuated using vacuum pumps to a pressure of 10 -6 –

10 -7torr.

• The crucible/filament is heated by passing a heavy current or directing

an electron beam onto the material.

• The evaporated metal condenses on the substrate.

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Physical vapor deposition (PVD) :-Evaporation
• Evaporation is a standard method to deposit metallic layers onto silicon wafers.

• According to the applied sources, the technique is called thermal or electron beam
evaporation.

• The evaporation source and the silicon wafers are spatially distant from each other
and due to the high vacuum, very few scattering processes occur between residual
gas molecules and the evaporated material.

• Therefore, the particles move straight and strike the wafer surface perpendicularly,
and, consequently, the step coverage or conformity of the process is poor.

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Physical vapor deposition (PVD) :-Evaporation
• The thickness of the deposited film depends up on the duration of evaporation and the
distance between the source and the crucible

• Its purity depends upon contaminations from the source, support material (such as the
substrate holder and the crucible), and residual gases.

• Metal alloy films can be deposited by evaporating constituent elements simultaneously

from different sources.

• Evaporation by resistive heating is used only for low melting point metals (e.g. Al, Ag,
Cu) whereas electron-beam assisted evaporation is used for high melting point metals
such as Cr, Ni and Ti.

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Physical vapor deposition (PVD) :-Evaporation

• Disadvantages

• low step coverage

• imprecise layer composition

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Physical vapor deposition (PVD) :-Sputtering

• Sputtering is a physical phenomenon in which ions accelerated

through a potential gradient bombard a target which is set to be the
cathode.(Cathode sputtering)

• Because of the momentum transfer of the accelerated ions to the

atoms near the surface, target atoms are released and are transported
in vapor form to the substrate for deposition.

• Compared to vapourization, the process takes place at higher

ambient pressure

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Physical vapor deposition (PVD) :-Sputtering
• The vacuum chamber is evacuated to 10-6–10-8 torr. (1 torr=133 Pa=0.133 kPa)

• Argon gas is introduced into the chamber and the pressure is maintained at a few
millitorr.

• Argon is ionized by the application of a dc (for conducting targets) or RF (for insulators)

voltage.

• The ions bombard the target, releasing atoms from it.

• These atoms are deposited on the substrate surface.

• The deposition rate depends on the sputtered material, RF power applied, pressure inside
the chamber, and spacing between the electrodes.
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Physical vapor deposition (PVD) :-Sputtering
• Sputtered films usually have good compositional uniformity, adhesion to substrate
surface, and grain orientation.

• The sputtered films are amorphous but can be made crystalline by suitable
annealing.

• Their mechanical properties and stresses depend on the sputtering conditions.

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Physical vapor deposition (PVD) :-Sputtering

• Cathode sputtering can be divided into two processes:

• Passive (inert) sputtering:
• Reactive sputtering:

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Physical vapor deposition (PVD) :-Sputtering
• Passive (inert) sputtering:
• The material to be deposited must be present as a target material.
• Usually, argon ions generated by a gas discharge are accelerated onto the target
in an electric field to release the material.
• The ions collide with the target material and transfer their kinetic energy to
some atoms.
• These leave the solid material compound, spread into the vacuum ambient, and
condensate on the wafer’s surface.
• Reactive sputtering:
• A reaction gas is added to the noble gas used to ablate the target.
• A chemical reaction occurs between the atomized material and the reactive gas
in the atmosphere.
• In this way, insulating layers (e. g. Al2O3 from an Al target) or hardened
materials (TiN from a Ti target) can be produced from a metallic target.
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Physical vapor deposition (PVD) :-Sputtering

• DC cathode sputtering (“DC sputtering”) is suitable for metallic layers.

• Radio-frequency cathode sputtering is used to sputter insulating materials .

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Chemical Vapor Deposition (CVD)
• Chemical vapor deposition (CVD) is the most important process in microfabrication.

• It is used extensively for producing thin films by depositing many different kind of
foreign materials over the surface of silicon substrates, or over other thin films that have
already been deposited to the silicon substrate.

• Materials for CVD may include:

• (a) Metals: Al, Ag, Au, W, Cu, Pt and Sn.

• (b) Other materials: Al2O3, polysilicon, SiO2, Si3N4, piezoelectric ZnO, TiNi, etc.

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Working principle of CVD:
• CVD involves the flow of a gas containing diffused reactants (normally in vapor form)
over the hot substrate surface

• The gas that carries the reactants is called “carrier gas”

• The “diffused” reactants are foreign material that needed to be deposited on the substrate
surface

• The carrier gas and the reactant flow over the hot substrate surface, the energy supplied
by the surface temperature provokes chemical reactions of the reactants that form films
during and after the reactions

• The by-products of the chemical reactions are then let to the vent

• Various types of CVD reactors are built to perform the CVD processes
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CVD steps

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Different types of CVD reactors

• (a) horizontal
• (b) pancake and
• (c) barrel type.

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Chemical Vapor Deposition (CVD)
• There are three (3) available CVD processes in microfabrication:

• (a) APCVD: (Atmospheric-pressure CVD);

• (b) LPCVD (Low-pressure CVD), and

• (c) PECVD (Plasma-enhanced CVD).

• CVD usually takes place at elevated temperatures and in vacuum in high class
clean rooms.

• Most CVD processes involve low gas pressures (100–200 mtorr)

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Chemical Vapor Deposition (CVD)
• A CVD process that requires elevated temperature (700–800C) and near-atmospheric
pressure is called atmospheric pressure chemical vapor deposition (APCVD).

• The low pressure chemical vapor deposition (LPCVD) and plasma-enhanced chemical
vapor deposition (PECVD) processes are used to achieve higher growth rates and better
deposited film quality at lower temperatures.

• PECVD utilizes RF plasma to transfer energy to reactants, with the result that the
substrate can remain at lower temperature than in APCVD or LPCVD.

• Precise temperature control of substrate surface is necessary to ensure good deposited

film quality.

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Chemical Vapor Deposition:-types

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Parameters that significantly influence the rate of CVD

• Parameters that significantly influence the rate of CVD are:

1. Temperature

2. Pressure of carrier gas

3. Velocity of gas flow

4. Distance along the direction of gas flow

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CVD process for silicon dioxide
• The commonly used carrier gas is O2 and the other reactant is
silane (SiH4).
• The chemical reaction involved is:

• This may also be done by decomposing dichlorosilane:

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CVD process for Silicon Nitride
• Silicon nitride films can be deposited by a LPCVD process using ammonia as
the carrier gas and silane, silicon tetrachloride, or dichlorosilane as other
reactants.
• The chemical reactions are as follows:

• Typical properties of Si3N4 deposited by LPCVD include low density, high-

temperature strength, superior thermal shock resistance, excellent wear
resistance, good fracture toughness, mechanical fatigue and creep
resistance, and good oxidation resistance.
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CVD process for polysilicon
• Deposition of polysilicon is typically done by a decomposition of silane
using an LPCVD process.
• The following chemical reaction takes place:

• It may be noted that polysilicon comprises small crystallites of SCS, each

with different orientations, separated by grain boundaries.
• It is used in microelectronics for electrodes and as a conductor or high-value
resistor, depending on its doping level.
• It is preferred in CMOS fabrication for gate electrodes

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Epitaxial Growth of Silicon
• The method of growing a silicon layer on a substrate maintaining its crystalline
orientation is known as the epitaxial process.
• In this, the substrate wafer acts as the seed crystal.
• The epitaxial process is carried out at a much lower temperature than the
Czochralski process
• Epitaxial layers of silicon can be grown by either vapor-phase epitaxy (VPE)
process or molecular-beam epitaxy (MBE) process
• Silicon tetrachloride (SiCl4) is one of the commonly used silicon sources. Silicon
is obtained by reducing SiCl4 with hydrogen at around 12000C:

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Thermal Oxidation
• Oxidation refers to the conversion of the silicon wafer to silicon oxide (SiO2).

• The ability of Si to form an oxide layer is very important since this is one of the
reasons for choosing Si over Ge.

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Functions of SiO2 layer
• SiO2 helps in protecting the wafer from contamination, both physical and
chemical. Thus, it acts as a passivating layer.
• The oxide layer protects the wafer surface from scratches, and it also prevents dust
from interacting with the wafer surface, and thus minimizes contamination.
• The oxide layer also protects the wafer from chemical impurities, mainly
electrically active contaminants.
• SiO2 acts as a hard mask for doping and as an etch stop during patterning.
• The original gate oxide in MOSFET was made of SiO2.
• It is used to isolate one device from the other
• SiO2 was also used as the inter-layer dielectric separating different metallization
layers, though this is usually a deposited layer.
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Thermal Oxidation process
• Thermal oxidation is a process by which a thin film of silicon dioxide is grown
over the native silicon substrate surface.
• Depending upon whether steam or dry oxygen is used, the oxidation process is
called wet oxidation process or dry oxidation process.
• The chemical reactions involved are:

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Thermal Oxidation system

• The equipment consists of a resistance heated furnace and a cylindrical

fused quartz tube containing silicon wafers vertically loaded in a
slotted quartz boat.
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Thermal Oxidation: Wet vs Dry
• The wet oxidation process yields faster oxide growth.

• However, SiO2 films grown by this process are less dense and more porous.

• Dry oxidation results in much slower oxide growth (typically 1/10 of the growth
rate of wet oxidation), producing films that are compact, dense and nonporous.

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Thermal Oxidation: Grown layer vs Deposited layer
• Si exposed to ambient conditions has a native oxide on its surface. The
native oxide is approximately 3 nm thick at room temperature. But this is
too thin for most applications and hence a thicker oxide needs to be grown.
This is done by consuming the underlying Si to form SiOx. This is a grown
layer.

• It is also possible to grow SiOx by a chemical vapor deposition process

using Si and O precursor molecules. In this case, the underlying Si in the
wafer is not consumed. This is called a deposited layer.

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LITHOGRAPHY
• The successful development of microsystems involves successive steps of
deposition and patterning of various material layers.

• One of the key steps in patterning is the process of transferring a geometrical

pattern on a mask to a radiation sensitive material called a resist.

• This process is known as lithography.

• This geometrical pattern defines the area being protected or removed in a

subsequent process step.

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Key processes involved in photolithography
1. Resist coating

2. Pre baking

3. UV exposure

4. Developing

5. Post baking

6. Etching

7. Photoresist stripping

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• Resist coating: A few drops of the resist materials are placed on a clean wafer. A
high-speed (typically ranging from 2000 to 8000 rpm), high-acceleration spinner is
used to produce a uniform coating of photoresist on the substrate surface.

• Prebaking: Before transferring the pattern to the photoresist film, one must ensure
that it sticks well to the surface. To improve adhesion of the film, the substrate is
prebaked at 75C to 100C for about 10 minutes. This step removes organic solvents
and releases stress in the film in addition to improving adhesion.

• UV exposure: Pattern transfer by UV exposure is carried out using a mask aligner.

For good results, the UV source should have proper intensity, directionality, spectral
characteristics, and radiation uniformity across the exposed area.

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• Developing: After exposure, developing removes the softened portion of the photoresist. In
positive resists, this removes the exposed region; in negative resists, it removes the
unexposed region of the resist. The solvent system used for developing depends on the
photoresist material.

• Postbaking: Post baking at 1200C for about 20 minutes removes residual solvents, improves
further adhesion and toughens the remaining photoresist.

• Etching: Etching removes unwanted material from the substrates through the windows
opened by developed regions of the photoresist. This step transfers a pattern of the material
layer on to the substrate.

• Photoresist stripping: After all process steps are performed for pattern transfer, the
photoresist is removed by an organic solvent.

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Repeat the process using a negative photoresist

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Patterning
• Patterning process consists of mask design, mask fabrication and
wafer printing

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Photoresist
• A photoresist is a radiation-sensitive compound.

• For positive resists, the exposed region becomes more soluble and thus
more readily removed in the developing process.

• The net result is that the patterns formed in the positive resist are the
same as those on the mask.

• For negative resists, the exposed regions become less soluble, and the
patterns engraved are the reverse of the mask patterns.

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Positive Photoresist
• A positive photoresist consists of three constituents:

• a photosensitive compound

• a base resin, and

• an organic solvent

• Prior to exposure, the photosensitive compound is insoluble in the developer solution.

• After irradiation, the photosensitive compound in the exposed pattern areas absorbs
energy, changes its chemical structure, and transforms into a more soluble species.

• Upon developing, the exposed areas are removed.

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Negative Photoresists
• Negative photoresists are polymers combined with a photosensitive compound.

• Following exposure, the photosensitive compound absorbs the radiation energy and
converts it into chemical energy to initiate a chain reaction, thereby causing crosslinking
of the polymer molecules.

• The cross-linked polymer has a higher molecular weight and becomes insoluble in the
developer solution.

• After development, the unexposed portions are removed.

• One major drawback of a negative photoresist is that the resist absorbs developer solvent
and swells, thus limiting the resolution of a negative photoresist.

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Contrast curve
• A contrast curve is a graph that shows the relationship between
the exposure dose and the resist fraction of a photoresist

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• Resolution is defined to be the minimum feature dimension that
can be transferred with high fidelity to a resist film on a
semiconductor wafer.

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Lift-off process for pattern transfer

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Doping
• Doping refers to the process where specific amounts of electrically active ’impurities’ are
incorporated through openings on the wafer surface.

• The dopant materials are typically p or n type impurities and they are needed to form
devices like diodes, transistors, conductors, and other electronic devices that combine to
form the IC.

• Three different methods are available for introducing the dopants into the crystal:
• Alloying technique as the oldest method is suitable for coarse structures,
• Diffusion is a high-temperature step, and
• Ion implantation as a modern method offers the highest accuracy and reproducibility.
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Diffusion
• One of the main challenges in designing a front-end process for building a device
is accurate control of the placement of the active doping regions.

• Understanding and controlling diffusion and annealing behavior are essential to

obtaining the desired electrical characteristics.

• This process consists of the introduction of a few tenths to several micrometers of

impurities by the solid-state diffusion of dopants into selected regions of a wafer
to form junctions

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Diffusion
• Process occurs in two steps:
• Pre-deposition
• Drive-in
• Common dopants are Boron for P-type layers and Phosphorus, Antimony and
Arsenic for N-type layers.
• Boron and phosphorus have two desirable properties:
• A high diffusion rate (diffuse easily and quickly) into silicon and low diffusion
rate in SiO2
• High solubility in silicon
• Prior to carrying out the process of diffusion, windows are opened, in a previously
deposited layer of SiO2 , for the impurities to diffuse in.

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Diffusion:Pre-deposition
• A high concentration of dopant atoms are introduced at the silicon surface by a
vapor that contains the dopant at a temperature of about 1000oC.

• Silicon atoms move out of their lattice sites creating a high density of vacancies
and breaking the bond with the neighboring atoms.

• The impurity atoms, which are incident on the surface, move into the Silicon
because of their concentration gradient and into the locations that the Silicon
atoms vacated

• Pre-deposition produces a shallow but heavily doped layer near the Silicon surface
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Diffusion:Drive-in:
• It is used to drive the impurity atoms deeper into the surface, without adding any
more impurities, thus reducing the surface concentration of the dopant.

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 Diffusion:Overall
• The wafers are placed in a slotted quartz carrier known as a boat inside a quartz furnace
tube that is heated by resistance heaters surrounding it
• The dopant is placed in a container either inside the quartz tube, in a region of relatively low
temperature, or in a container outside the furnace at a temperature that helps maintain its
liquid form
• Nitrogen and oxygen gas are made to pass over the container. These gases carry the dopant
vapour into the furnace, where the gases are deposited on the surface of the wafers
• These deposited gases react with the silicon, forming a layer containing silicon, oxygen, and
dopant on the surface of the wafer.
• Due to the high temperature inside the furnace, dopants diffuse easily into Si wafer.
• Drive–in step is next performed at a higher temperature of 11000C inside a furnace so that
the dopant may be diffused deeper into Silicon.
• The higher temperature causes the dopant atoms to move quickly into the Si surface.

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Diffusion
• Diffusion depth is controlled by the time and temperature of the drive-in
process.

• The average distance the dopants diffuse is known as the diffusion length and is
given as √Dt where D is the diffusivity and t is the processing time.

• By precise control of the time and temperature, accurate junction depths of

fraction of a micron can be obtained

• Diffusion takes place at high temperature.

• Diffusion is a chemical process.

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 The typical gases for diffusion with gas sources are
phosphine (PH3), diborane (B2H6) and arsine (AsH3).

The main liquid dopant sources used are boron bromide

(BBr3) or phosphoryl chloride (POCl3).

For solid source diffusion, solid compounds of the dopant

material are placed as a disk between the silicon wafers so
that material diffuses from the source disks into the
atmosphere at process temperature.
Boron nitride or SiP2O7(silicon phosphate) are used as
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Dr. Nisanth.A 126
Diffusion: Ficks laws
• Fick’s law governs diffusion

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Diffusion: Ficks laws

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Diffusion

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Ion implantation
• Here, the dopant atoms are ionized and then made to impinge on the wafer
surface where they penetrate and get ‘implanted’ into the wafer.
• The advantage of this process is that doping can be done at room
temperature so that soft masks can be used.
• This also enables doping in small regions since lateral diffusion is
minimized.
• Ion implantation causes beam damage so there is a rapid annealing
treatment post implantation to repair the wafer and ‘activate’ the dopants.

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Ion implantation
• It is physical process used to dope silicon substrates.

• It involves “forcing” free charge-carrying ionized atoms of B, P of As into silicon

crystals.

• These ions associated with sufficiently high kinetic energy will be penetrated into
the silicon substrate.

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Ion implantation

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Ion implantation system

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