MP Exp2
MP Exp2
0 0 0 PORT A 80 H
0 0 1 PORT B 81 H
0 1 0 PORT C 82 H
0 1 1 Control Register 83 H
1 X X No Seletion X
Pin diagram –
Input-Output mode – If MSB of control word (D7) is 1, PPI works in input-output mode. This is further
divided into three modes:
Mode 0 –In this mode all the three ports (port A, B, C) can work as simple input function or simple
output function. In this mode there is no interrupt handling capacity.
Mode 1 – Handshake I/O mode or strobed I/O mode. In this mode either port A or port B can work as
simple input port or simple output port, and port C bits are used for handshake signals before actual
data transmission. It has interrupt handling capacity and input and output are latched. Example: A CPU
wants to transfer data to a printer. In this case since speed of processor is very fast as compared to
relatively slow printer, so before actual data transfer it will send handshake signals to the printer for
synchronization of the speed of the CPU and the peripherals.
Mode 2 – Bi-directional data bus mode. In this mode only port A works, and port B can work either in
mode 0 or mode 1. 6 bits port C are used as handshake signals. It also has interrupt handling capacity.
3. Draw and explain block diagram of 8257.
Suppose any device which is connected to input-output port wants to transfer data to memory, first of
all it will send input-output port address and control signal, input-output read to input-output port, then
it will send memory address and memory write signal to memory where data has to be transferred. In
normal input-output technique the processor becomes busy in checking whether any input-output
operation is completed or not for next input-output operation, therefore this technique is slow.
This problem of slow data transfer between input-output port and memory or between two memory is
avoided by implementing Direct Memory Access (DMA) technique. This is faster as the
microprocessor/computer is bypassed and the control of address bus and data bus is given to the DMA
controller.
Suppose a floppy drive that is connected at input-output port wants to transfer data to memory, the
following steps are performed:
Step-1: First of all the floppy drive will send a DMA request (DREQ) to the DMAC, it means the floppy
drive wants its DMA service.
Step-2: Now the DMAC will send a HOLD signal to the CPU.
Step-3: After accepting the DMA service request from the DMAC, the CPU will send hold
acknowledgment (HLDA) to the DMAC, it means the microprocessor has released control of the address
bus the data bus to DMAC and the microprocessor/computer is bypassed during DMA service.
Step-4: Now the DMAC will send one acknowledgement (DACL) to the floppy drive which is connected at
the input-output port. It means the DMAC tells the floppy drive be ready for its DMA service.
Step-5: Now with the help of input-output read and memory write signal the data is transferred from
the floppy drive to the memory.
Modes of DMAC:
1. Single Mode – In this only one channel is used, means only a single DMAC is connected to the
bus system.
2. Cascade Mode – In this multiple channels are used, we can further cascade more number of
DMACs.
It contains 3 registers commonly known as ISR, IRR, IMR & there is 1 priority resolver (PR).
Interrupt Request Register (IRR): It stores those bits which are requested for their interrupt services.
Interrupt Service Register (ISR): It stores the interrupt levels which is currently being served.
Interrupt Mask Register (IMR): It stores interrupt levels that have to be masked. These interrupt levels
are already accepted by the 8259 microprocessor.
Priority Resolver (PR): It examines all the 3 registers and sets the priority of interrupts and sets the
interrupt levels in ISR which has the highest priority and the rest of the interrupt bit is IRR which is
already accepted.
SP/EN (low active pin): If its value is 1 it works in master mode & if its value=e is 0 then it works in slave
mode.
Cascade Buffer: It is used to cascade more number of Programmable Interrupt Controller to increase the
interrupts handling capability up to 64 levels.
5. Explain following instructions: XLAT, XCHG, MOVSB, DAA,
CMC
1. XLAT (Translate)
Operation:
The XLAT instruction is used to perform a byte translation using the lookup table that is based on the
value of the AL register and an offset. The XLAT instruction translates the byte value in the AL register
using the table pointed to by the DS:BX register pair. After execution, the result of the translation is
stored back into the AL register.
Syntax:
nginx
Copy
XLAT
Explanation:
The AL register contains an index that is used to look up a byte in the table.
The address of the lookup table is pointed to by DS:BX.
The byte at the table address corresponding to the value in AL (as an index) is loaded into AL.
Example:
If DS:BX = 2000h, and AL = 5, the byte located at DS:BX + AL (which would be 2005h) is loaded into AL.
2. XCHG (Exchange)
Operation:
The XCHG instruction swaps the contents of two operands, which can be either registers or a register
and a memory location.
Syntax:
bash
Copy
XCHG destination, source
Explanation:
destination and source can either be two registers, or one register and a memory location.
The contents of the destination and source operands are exchanged.
Example:
objectivec
Copy
XCHG AX, BX
This swaps the contents of the AX and BX registers.
The XCHG instruction does not affect the flags except for the CF (Carry Flag) when used with memory
operands.
Algorithm:
We are taking first element of array in A
Comparing A with other elements of array, if A is smaller then store that element in A otherwise compare
with next element
The value of A is the answer
Program:
2014 HLT
Explanation:
Registers used: A, H, L, C
LXI 2050 assigns 20 to H and 50 to L
MOV C, M copies content of memory (specified by HL register pair) to C (this is used as a counter)
DCR C decrements value of C by 1
INX H increases value of HL by 1. This is done to visit next memory location
MOV A, M copies content of memory (specified by HL register pair) to A
INX H increases value of HL by 1. This is done to visit next memory location
CMP M compares A and M by subtracting M from A. Carry flag and sign flag becomes set if A-M is
negative
JNC 200D jumps program counter to 200D if carry flag = 0
MOV A, M copies content of memory (specified by HL register pair) to A
DCR C decrements value of C by 1
JNZ 2007 jumps program counter to 2007 if zero flag = 0
STA 3050 stores value of A at 3050 memory location
HLT stops executing the program and halts any further execution
7. Write an assembly language programming to reverse the string.
.MODEL SMALL
.STACK 100H
.DATA
.CODE
MAIN PROC FAR
MOV AX,@DATA
MOV DS,AX
; interrupt to exit
MOV AH, 4CH
INT 21H
MAIN ENDP
REVERSE PROC
; load the offset of
; the string
MOV SI, OFFSET STRING
LOOP1:
; compare if this is;
;the last character
MOV AX, [SI]
CMP AL, '$'
JE LABEL1
JMP LOOP1
LABEL1:
; again load the starting;
;address of the string
MOV SI, OFFSET STRING
LOOP2:
;if count not equal to zero
CMP CX,0
JE EXIT
; increment si and;
;decrement count
INC SI
DEC CX
JMP LOOP2
EXIT:
; add $ to the end of string
MOV [SI],'$ '
RET
REVERSE ENDP
END MAIN