07/01/2024

Multiplexer (Data selector)

 A multiplexer is a combinational circuit that selects binary information from one of many input lines
and directs it to a single output line.
 The selection of a particular input line is controlled by a set of selection lines.
 Normally, there are 2n input lines and n selection lines whose bit combinations determine which input
is selected.
 It also has data-select inputs, which permit digital data on any one of the inputs to be switched to the
output line. Multiplexers are also known as data selectors.
 The AND gates and inverters in the multiplexer resemble a decoder circuit, and indeed, they decode the
selection input lines. In general, a 2n-to-1-line multiplexer is constructed from an n-to-2n decoder by
adding 2n input lines to it, one to each AND gate.
 The outputs of the AND gates are applied to a single OR gate.
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2×1 Multiplexer (2n input n = selection line)

S0 Y
0 I0 S0′I0
1 I1 S0I1

4×1 Multiplexer (2n input n = selection line)

S1 S0 Y
0 0 I0 S1′S0′I0
0 1 I1 S1′S0I1
1 0 I2 S1S0′I2
1 1 I3 S1S0I3
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Construct 4×1 Multiplexer by using 2×1 only

S1 S0 Y
0 0 I0
0 1 I1
1 0 I2
1 1 I3

Construct 8×1 Multiplexer by using 4×1 only

S2 S1 S0 Y
0 0 0 I0
0 0 1 I1
0 1 0 I2
0 1 1 I3
1 0 0 I4
1 0 1 I5
1 1 0 I6
1 1 1 I7
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Boolean Function Implementation Using MUX

Example For taking ‘A’ as input &
Implement the following Boolean function using MUX taking A/B/C as Input ‘BC’ as selection line.
F(A, B, C) =  (1,2,4,5) I0 I1 I2 I3
A′ 0 1 2 3
A 4 5 6 7
A B C F A B C F A B C F
A 1 A′ 0
0 0 0 0 0 0 0 0 F=C′ 0 0 0 0 For taking ‘B’ as input &
‘AC’ as selection line.
F=B′
0 0 1 1 0 0 1 1 F=C 0 0 1 1 I0 I1 I2 I3
F=A′ B′ 0 1 4 5
0 1 0 1 0 1 0 1 F=C′ 0 1 0 1
F=B B 2 3 6 7
0 1 1 0 0 1 1 0 F=C 0 1 1 0 B B′ B′ B′
For taking ‘C’ as input &
1 0 0 1 1 0 0 1 F=C′ 1 0 0 1 ‘AB’ as selection line.
F=B′ I0 I1 I2 I3
1 0 1 1 1 0 1 1 F=C 1 0 1 1
F=A C′ 0 2 4 6
1 1 0 0 1 1 0 0 F=C′ 1 1 0 0 C 1 3 5 7
F=B
1 1 1 0 1 1 1 0 F=C 1 1 1 0 C C′ 1 0

Example
Implement the following Boolean function using MUX taking A/B/C as Input
F(A, B, C) =  (1,2,4,5)

For taking ‘A’ as input & For taking ‘B’ as input & For taking ‘C’ as input &
‘BC’ as selection line. ‘AC’ as selection line. ‘AB’ as selection line.

I0 I1 I2 I3 I0 I1 I2 I3 I0 I1 I2 I3

A′ 0 1 2 3 B′ 0 1 4 5 C′ 0 2 4 6

A 4 5 6 7 B 2 3 6 7 C 1 3 5 7

A 1 A′ 0 B B′ B′ B′ C C′ 1 0
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Example
Implement the following Boolean function using MUX taking A B C D F

A/B/C/D as Input F(A, B, C,D) =  (0,1,3,4,8,9,15) 0 0 0 0 D′ 1

C′
0
B′
0 0 1 D 1

0 0 1 0 0
For taking ‘C’ as input & ‘ABD’ as selection line.
C
I0 I1 I2 I3 I4 I5 I6 I7 A′ 0 0 1 1 1

0 1 0 0 1
C′ 0 1 4 5 8 9 12 13
0 1 0 1 0
C 2 3 6 7 10 11 14 15 B
0 1 1 0 0
C′ 1 C′ 0 C′ C′ 0 C
0 1 1 1 0

For taking ‘D’ as input & ‘ABC’ as selection line. 1 0 0 0 1

1 0 0 1 1
I0 I1 I2 I3 I4 I5 I6 I7
1 0 1 0 0
D′ 0 2 4 6 8 10 12 14
1 0 1 1 0
D 1 3 5 7 9 11 13 15
A 1 1 0 0 0
1 D D′ 0 1 0 0 D
1 1 0 1 0

1 1 1 0 0

1 1 1 1 1

Example
Implement the following Boolean function using MUX taking A/B/C/D as Input
F(A, B, C,D) =  (0,1,3,4,8,9,15)

For taking ‘A’ as input & ‘BCD’ as selection line.

I0 I1 I2 I3 I4 I5 I6 I7
A′ 0 1 2 3 4 5 6 7
A 8 9 10 11 12 13 14 15
1 1 0 A′ A′ 0 0 A

For taking ‘B’ as input & ‘ACD’ as selection line.

I0 I1 I2 I3 I4 I5 I6 I7
B′ 0 1 2 3 8 9 10 11
B 4 5 6 7 12 13 14 15
1 B′ 0 B′ B′ B′ 0 B
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Example
Implement the Full adder circuit using MUX by two 8:1 MUX
with enabled input X A B C Y

0 0 0 0 0
S(x, y, z) = (1, 2, 4, 7)
C(x, y, z) = (3, 5, 6, 7) 0 0 0 1 1

F(X,A, B, C) 0 0 1 0 1

=  (1,2,4,7,11,13,14,15) X=0 0 0 1 1 0
Sum 0 1 0 0 1

0 1 0 1 0

0 1 1 0 0

0 1 1 1 1

1 0 0 0 0

1 0 0 1 0

1 0 1 0 0

1 0 1 1 1

X=1 1 1 0 0 0
Carry 1 1 0 1 1

1 1 1 0 1

1 1 1 1 1

Example
Implement the Full adder circuit using MUX by one 8:1 MUX X A B C Y

0 0 0 0 0
S(x, y, z) = (1, 2, 4, 7)
F(X,A, B, C) C(x, y, z) = (3, 5, 6, 7)
0 0 0 1 1

=  (1,2,4,7,11,13,14,15) 0 0 1 0 1

I0 I1 I2 I3 I4 I5 I6 I7 X=0 0 0 1 1 0
Sum 0 1 0 0 1
X′ 0 1 2 3 4 5 6 7
0 1 0 1 0
X 8 9 10 11 12 13 14 15
0 1 1 0 0
0 X′ X′ X X′ X X 1
0 1 1 1 1

1 0 0 0 0

1 0 0 1 0

1 0 1 0 0

1 0 1 1 1

X=1 1 1 0 0 0
Carry 1 1 0 1 1

1 1 1 0 1

1 1 1 1 1
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Example
Implement the Full adder circuit using MUX by two 4:1 MUX
S(x, y, z) = (1, 2, 4, 7)
C(x, y, z) = (3, 5, 6, 7)
X Y Z C S
Taking Z as input
Sum 0 0 0 0 0

I0 I1 I2 I3 0 0 1 0 1

Z′ 0 2 4 6 0 1 0 0 1

Z 1 3 5 7 0 1 1 1 0

1 0 0 0 1
Z Z′ Z′ Z
1 0 1 1 0
Taking Z as input
1 1 0 1 0
Carry
1 1 1 1 1
I0 I1 I2 I3
Z′ 0 2 4 6
Z 1 3 5 7
0 Z Z 1

Example
Implement the Full adder circuit using MUX by two 2:1 MUX
S(x, y, z) = (1, 2, 4, 7) X Y Z S m
X Y Z C m
C(x, y, z) = (3, 5, 6, 7)
0 0 0 0 0 0 0 0

0 0 1 0 0 0 1 1 y′z
I0
0 1 0 0 0 1 0 1 yz′

0 1 1 1 yz 0 1 1 0

1 0 0 0 1 0 0 1 y′z′

1 0 1 1 y′z 1 0 1 0
I1
1 1 0 1 yz′ 1 1 0 0

1 1 1 1 yz 1 1 1 1 yz

Taking YZ as input Taking YZ as input

Carry SUM
I 0= y z I 0= y ′ z + y z ′ = y ⊕ z
I 1= y ′ z + y z ′ + y z I 1= y ′ z ′ + y z
=y′z+y(z′+z) = (y⊕z)′
= y′z+y
=(y+y′)(y+z)
= y+z