Bahria University,

Karachi Campus

LAB EXPERIMENT NO.

_11_

LIST OF TASKS
TASK NO OBJECTIVE
1. Design and implement the circuits for a half adder, full adder, half subtractor, and full
subtractor in Multisim using basic gates, along with their truth tables and corresponding
sum, difference, and carry/borrow equations.
2. Design and implement a 2-bit adder and subtractor circuit in Multisim using basic gates.
3. Design and implement a 4-bit adder and subtractor circuit in Multisim using Full Adder
ICs.

Submitted On:
Date: __23/12/24__
[Lab no. 11] [COMPUTER ARCHITECTURE AND LOGIC
DESIGN]
[DESIGN & IMPLEMENTAION OF BINARY ADDER AND
SUBTRACTOR]

Task No. 01:

“Design and implement the circuits for a half adder, full adder, half subtractor,
and full subtractor in Multisim using basic gates, along with their truth tables and
corresponding sum, difference, and carry/borrow equations.”

Half Adder:

A B Sum Carry

0 0 0 0

0 1 1 0

1 0 1 0

1 1 0 1

Equations:
S = A’B + AB’ = A⊕B

C = AB

FIZA KHAN 02-131232-048

[Lab no. 11] [COMPUTER ARCHITECTURE AND LOGIC
DESIGN]
[DESIGN & IMPLEMENTAION OF BINARY ADDER AND
SUBTRACTOR]

Full Adder:
Cin A B S (Sum) Cout (Carry)
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

Equations:
S = A'B'C + A'BC' + AB'C' + ABC

C = A'BC + AB'C + ABC' + ABC

FIZA KHAN 02-131232-048

[Lab no. 11] [COMPUTER ARCHITECTURE AND LOGIC
DESIGN]
[DESIGN & IMPLEMENTAION OF BINARY ADDER AND
SUBTRACTOR]

= AC + AB + BC (after simplification)

Half Subtractor:

A B D (Difference) B0 (Borrow)

0 0 0 0

0 1 1 1

1 0 1 0

1 1 0 0

Equations:
D = A’B + AB’ = A⊕B

B0 = A’B

FIZA KHAN 02-131232-048

[Lab no. 11] [COMPUTER ARCHITECTURE AND LOGIC
DESIGN]
[DESIGN & IMPLEMENTAION OF BINARY ADDER AND
SUBTRACTOR]

Full Subtractor:
B A Bin D (Difference) Bo (Borrow)

0 0 0 0 0

0 0 1 1 1

0 1 0 1 1
0 1 1 0 1
1 0 0 1 0

1 0 1 0 0

1 1 0 0 0

1 1 1 1 1

FIZA KHAN 02-131232-048

[Lab no. 11] [COMPUTER ARCHITECTURE AND LOGIC
DESIGN]
[DESIGN & IMPLEMENTAION OF BINARY ADDER AND
SUBTRACTOR]

Equations:
D = A'B'C + A'BC' + AB'C' + ABC

B0 = A'B'C + A'BC' + A'BC + ABC

= A'B + A'C + BC (after simplification)

Task No. 02:

“Design and implement a 2-bit adder and subtractor circuit in Multisim using
basic gates.”

2 Bit Adder:

FIZA KHAN 02-131232-048

[Lab no. 11] [COMPUTER ARCHITECTURE AND LOGIC
DESIGN]
[DESIGN & IMPLEMENTAION OF BINARY ADDER AND
SUBTRACTOR]

2 Bit Subtractor:

Task No. 03:

“Design and implement a 4-bit adder and subtractor circuit in Multisim using
Full Adder ICs.”
FIZA KHAN 02-131232-048
[Lab no. 11] [COMPUTER ARCHITECTURE AND LOGIC
DESIGN]
[DESIGN & IMPLEMENTAION OF BINARY ADDER AND
SUBTRACTOR]

4 Bit Adder:

VCC
5V

B1 A1 B2 A2 B3 A3 B4 A4

Key = Space Key = Space Key = Space

Key = Space Key = Space
Key = Space Key = Space
Key = Space
X1 X2 X3
X4 X5

2.5 V 2.5 V 2.5 V

2.5 V 2.5 V
U1 U2 U3 U4
A SUM A SUM A SUM A SUM
B CARRY B CARRY B CARRY B CARRY

CIN CIN CIN CIN

FULL_ADDER FULL_ADDER FULL_ADDER FULL_ADDER

4 Bit Subtractor:

VCC
5V

B1 A1 B2 A2 B3 A3 B4 A4

Key = Space Key = Space Key = Space

Key = Space Key = Space
Key = Space Key = Space
Key = Space
X1 X2 X3
X4 X5
U5 2.5U6
V 2.5 VU7 2.5U8
V
XOR2 XOR2 XOR2 XOR2 2.5 V 2.5 V
U1 U2 U3 U4
A SUM A SUM A SUM A SUM
B CARRY B CARRY B CARRY B CARRY

CIN CIN CIN CIN

FULL_ADDER FULL_ADDER FULL_ADDER FULL_ADDER

FIZA KHAN 02-131232-048