COEN 317 - Microprocessor-based Systems

Assignment 2
 Microprocessor-based Systems – Assignment 2

1. Consider the execution of an addition instruction. Before the execution of this

instruction, both C and V flags are cleared. If the instruction uses the S suffix, then
give two examples of operands that result in the setting of C and V flags: One
example of operands that results in the setting of the C flag, and another example
of operands that results in the setting of the V flag. (8 points)

Answer 1:
Carry flag will be set when there is a carry after an arithmetic instruction such as
addition. Assume R1 = AB00 0000 and R2 = A200 0000. Then ADDS R1, R2
results in a carry, therefore C flag will be set to 1.

This carry is also an unsigned overflow as the result exceeds the range for 32-bit
unsigned values (see next page about unsigned overflow).

If these numbers are signed numbers, the result indicates a signed overflow as it
also exceeds the range for signed values (see next page about signed overflow).
Therefore, V flag will be set to 1 too.
 Microprocessor-based Systems – Assignment 2

Solution 1 (continue):
There are two types of overflow: unsigned overflow and signed overflow.

Unsigned overflow:
Let’s say R0 = 0xFFFFFFFF and R1 = 0x00000001. If we perform an addition
instruction, the 32-bit answer comes out to be 0x00000000 with carry, i.e., 1
comes out of the most significant bit (MSB). If these numbers are assumed to be
unsigned, then our expected answer is:
4,294,967,295 + 1 = 4,294,967,296.

As the correct answer cannot be accommodated in a 32-bit register, we got an

incorrect answer (i.e., 0). This situation is reflected by a 1 carried out of the MSB
and we say that an unsigned overflow has occurred. The carry flag is used for
unsigned overflow. In this case, the Carry flag will be set to 1.

Signed overflow:
Let’s say R0 = 0x7FFFFFFF and R1 = 0x7FFFFFFF and both are signed. By
performing an addition instruction, the answer will be 0xFFFF FFFE. However, the
real answer is out of the range of signed numbers and we say that a signed
overflow has occurred. It will be indicated by V = 1.
 Microprocessor-based Systems – Assignment 2

2. Write the equivalent assembly instructions for each of the following instructions
written in C programming language, without using explicit multiplication and division.
Assume 𝑥, 𝑦, and 𝑧 are R1, R2, and R3 registers, respectively. (15 points)
a) y = z + x/64;
b) z = 8 * z + 𝑦 ∗ 𝑥;
z
c) z = 2 − y + 128x;

Answer 2:
a) ADD R2, R3, R1, ASR #6

b) For simplicity, assume 𝑥 is 2𝑅1

LSL R3, R3, #3
LSL R2, R2, R1
ADD R3, R3, R2

c) ASR R3, R3, #1

SUB R3, R3, R2
ADD R3, R3, R1, LSL #7
 Microprocessor-based Systems – Assignment 2
3. Assume the content of the registers and flags are as follows before executing
any instructions (values are signed):

R1 = A000 D4BA H
R2 = B001 B1C2 H
R3 = 7FFF FFFE H
R4 = 8000 0002 H
N = 0, Z = 0, C = 1, V = 0, Q = 0
Indicate the content of registers and flags after executing each one of the following
instructions: (9 x 3pts = 27 points)
a) ADD R1, R2
b) ADD R3, R1, R2
c) ADDS R1, R2
d) ADDS R3, R4, R3
e) ADCS R3, R1, R2
f) ADDEQ R3, R4
g) SUBS R2, R4, R3
h) BIC R1, R2, R3
i) ORN R2, R1, R3
Note: Examine each instruction independent of the previous instructions.
 Microprocessor-based Systems – Assignment 2

Answer 3:
a) ADD R1, R2: As the instruction does not have the optional S, the flags are not
updated if there is any.
R1 R2 R3 R4 N Z C V Q
5002 867C B001 B1C2 7FFF FFFE 8000 0002 0 0 1 0 0

b) ADD R3, R1, R2: As the instruction does not have the optional S, the flags are
not updated if there is any.
R1 R2 R3 R4 N Z C V Q
A000 D4BA B001 B1C2 5002 867C 8000 0002 0 0 1 0 0

c) ADDS R1, R2: The result is placed in R1, and flags are updated. R1 and R2
are negative, the result is positive, which is wrong -> a signed overflow occurs

R1 R2 R3 R4 N Z C V Q
5002 867C B001 B1C2 7FFF FFFE 8000 0002 0 0 1 1 0
 Microprocessor-based Systems – Assignment 2

Solution 3 (continue):
d) ADDS R3, R4, R3: The flags are updated.
R1 R2 R3 R4 N Z C V Q
A000 D4BA B001 B1C2 0000 0000 8000 0002 0 1 1 0 0

e) ADCS R3, R1, R2: This one is an addition with carry. Since carry bit is 1, the
result of R1, and R2 addition will be incremented by 1.
R1 R2 R3 R4 N Z C V Q
A000 D4BA B001 B1C2 5002 867D 8000 0002 0 0 1 1 0

f) ADDEQ R3, R4: This one is a conditional instruction. EQ means if zero flag is
equal to 1 (i.e. Z = 1), then execute the instruction. Since before this
instruction execution Z = 0, therefore the instruction will not be executed, and
everything will remain unchanged.
R1 R2 R3 R4 N Z C V Q
A000 D4BA B001 B1C2 7FFF FFFE 8000 0002 0 0 1 0 0
 Microprocessor-based Systems – Assignment 2
g) SUBS R2, R4, R3: This is a subtraction with S condition. The result of R4
and R3 subtraction (R4 – R3) equals R4 + (2’s complement of R3). Therefore,
C flag will be 1, and V will be 1 because there will be a signed overflow.
R1 R2 R3 R4 N Z C V Q
A000 D4BA 0000 0004 7FFF FFFE 8000 0002 0 0 1 1 0

h) BIC R1, R2, R3: This is AND logic of R2 with 1’s complement of R3 with no S.
Therefore, no flags will be updated. C was originally 1 and stays 1.
1’s complement of R3 = 8000 0001 H.

R1 R2 R3 R4 N Z C V Q
8000 0000 B001 B1C2 7FFF FFFE 8000 0002 0 0 1 0 0

i) ORN R2, R1, R3: This is OR logic of R1 with 1’s complement of R3 with no S.
Therefore, no flags will be updated. C was originally 1 and stays 1.
1’s complement of R3 = 8000 0001 H.
R1 R2 R3 R4 N Z C V Q
A000 D4BA A000 D4BB 7FFF FFFE 8000 0002 0 0 1 0 0
 Microprocessor-based Systems – Assignment 2

4. Assume that a byte-addressable memory has the content 0x98 in each of its
cells. If R0 = 0x00000000, R1 = 0x1F348796, R2 = 0x00000012, indicate the
memory address to be accessed and the contents of R0, R1, and R2 after the
execution of the following instructions independently: (3 x 6pts = 18 points)

LDR R0, [R1, R2, LSL #0x6]

LDR R0, [R1, #0x7]!
LDR R0, [R1], #0x8

Answer 4:

a) LDR R0, [R1, R2, LSL #0x6]

R2 content is shifted 6 bits to the left.
The last two hexadecimal digits “12” in binary are: 0001 0010. Shifting them
to the left will be 0100 1000 0000. The shifted result will 0x0000 0480.
 Microprocessor-based Systems – Assignment 2

Solution 4 (continue):

R1 + shifted R2 =
1F34 8796
0000 0480 +
--------------
1F34 8C16
Memory addresses accessed: 0x1F34 8C16
0x1F34 8C17
0x1F34 8C18
0x1F34 8C19
R0 = 0x9898 9898
R1 = 0x1F34 8796
R2 = 0x0000 0012

b) LDR R0, [R1, #0x7]!

R1 + 0x7 =
1F34 8796
0000 0007 +
--------------
1F34 879D
 Microprocessor-based Systems – Assignment 2

Solution 4 (continue) :
Memory addresses accessed: 0x1F34 879D
0x1F34 879E
0x1F34 879F
0x1F34 87A0

R0 = 0x9898 9898
R1 = 0x1F34 879D
R2 = 0x0000 0012

c) LDR R0, [R1], 0x8

Memory addresses accessed: 0x1F34 8796

0x1F34 8797
0x1F34 8798
0x1F34 8799

R0 = 0x9898 9898
R1 = 0x1F34 879E
R2 = 0x0000 0012
5. Repeat Q4 if the three instructions are executed consecutively (not
independently) in the same order they appear. (21 points)

LDR R0, [R1, R2, LSL #0x6]

LDR R0, [R1, #0x7]!
LDR R0, [R1], #0x8

Answer 5:

After the execution of the first instruction:

Memory addresses accessed: 0x1F34 8C16

0x1F34 8C17
0x1F34 8C18
0x1F34 8C19
R0 = 0x9898 9898
R1 = 0x1F34 8796
R2 = 0x0000 0012
Solution 5 (continue):

After the execution of the second instruction:

Memory addresses accessed: 0x1F34 879D

0x1F34 879E
0x1F34 879F
0x1F34 87A0
R0 = 0x9898 9898
R1 = 0x1F34 879D
R2 = 0x0000 0012

After the execution of the third instruction:

Memory addresses accessed: 0x1F34 879D
0x1F34 879E
0x1F34 879F
0x1F34 87A0
R0 = 0x9898 9898
R1 = 0x1F34 87A5
R2 = 0x0000 0012
 Microprocessor-based Systems – Assignment 2

6. Consider the following assembly program: (11 points)

MOV R2, 0x1100
DLY: SUBS R2, R2, #0x1
NOP
BNE DLY
NXT: --- ---
a) How many times does the BNE DLY instruction get executed? (2 points)
b) Change the first line of the program so that BNE DLY is executed 99 times. (2 pts)
c) Change the second line of the program so that BNE DLY is executed 99 times,
while the first line stays unchanged (MOV R2, 0x1100). You may replace NOP with
one instruction only if needed. (7 points)

Answer 6:
The program is known as the delay loop:
a) 110016 = 212 + 28 = 4352 times
b) 99 = 6316 → 0x1100 must be replaced with 0x63
c) DLY: SUBS R2, R2, #0x2C
and replace NOP with ADDSMI R2, R2, #0x4