MC79L00A Series

100 mA Negative Voltage

Regulators
The MC79L00A Series negative voltage regulators are
inexpensive, easy−to−use devices suitable for numerous applications
requiring up to 100 mA. Like the higher powered MC7900 Series
negative regulators, this series features thermal shutdown and current www.onsemi.com
limiting, making them remarkably rugged. In most applications, no
external components are required for operation. THREE−TERMINAL LOW
The MC79L00A devices are useful for on−card regulation or any CURRENT NEGATIVE FIXED
other application where a regulated negative voltage at a modest
current level is needed. These regulators offer substantial advantage VOLTAGE REGULATORS
over the common resistor/Zener diode approach.
MARKING
Features
DIAGRAMS
• No External Components Required Pin 1. Vout
• Internal Short Circuit Current Limiting
8
2. Vin 8

• Internal Thermal Overload Protection

1
3.
4.
Vin
NC
9Lxxx
ALYWy
• Low Cost SOIC−8 5. GND G
• Complementary Positive Regulators Offered (MC78L00 Series) D SUFFIX 6. Vin 1
CASE 751 7. Vin
• Pb−Free Packages are Available 8. NC

TO−92
P SUFFIX
CASE 29
12 1
GND 2
3 3
R8
R6 STRAIGHT LEAD BENT LEAD
R Q10 BULK PACK TAPE & REEL
5 Q5 R9 AMMO PACK
R18 R17
R1 Q4
Pin 1. Ground
R7 2. Input MC79L
Q8 Q14 3. Output xxxxx
Q9 ALYWG
R16 G
Q1 R4 Output
R2 Q12
Q13
Z1 C Q2 xxx = Specific Device Code
R3 Q6 Q7 Q11 A = Assembly Location
R10 R11 L = Wafer Lot
R14 R15
Y = Year
Input W = Work Week
*Automotive temperature range selections are available with special test conditions y = B or C
and additional tests in 5, 12 and 15 V devices. Contact your local ON Semiconductor G = Pb−Free Package
sales office for information.
(Note: Microdot may be in either location)
Figure 1. Representative Schematic Diagram

ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.

© Semiconductor Components Industries, LLC, 1994 1 Publication Order Number:

October, 2016 − Rev. 10 MC79L00/D
This datasheet has been downloaded from http://www.digchip.com at this page
 MC79L00A Series

MAXIMUM RATINGS (TA = +25°C, unless otherwise noted.)

Rating Symbol Value Unit
Input Voltage (−5 V) VI −30 Vdc
(−12, −15, −18 V) −35
(−24 V) −40
Power Dissipation
Case 29 (TO−92 Type)
TA = 25°C PD Internally Limited W
Thermal Resistance, Junction−to−Ambient RqJA 160 °C/W
Thermal Resistance, Junction−to−Case RqJC 83 °C/W

Case 751 (SOIC−8 Type) (Note 1)

TA = 25°C PD Internally Limited W
Thermal Resistance, Junction−to−Ambient RqJA 180 °C/W
Thermal Resistance, Junction−to−Case RqJC 45 °C/W

Storage Temperature Range Tstg −65 to +150 °C

Junction Temperature TJ +150 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. SOIC−8 Junction−to−Ambient Thermal Resistance is for minimum recommended pad size. Refer to Figure 9 for Thermal Resistance variation
versus pad size.
*This device series contains ESD protection and exceeds the following tests:
Human Body Model 2000 V per MIL_STD_883, Method 3015
Machine Model Method 200 V.

ELECTRICAL CHARACTERISTICS (VI = −10 V, IO = 40 mA, CI = 0.33 mF, CO = 0.1 mF, −40°C < TJ +125°C (for MC79LXXAB),
0°C < TJ < +125°C (for MC79LXXAC)).
MC79L05AC, AB
Characteristics Symbol Min Typ Max Unit
Output Voltage (TJ = +25°C) VO −4.8 −5.0 −5.2 Vdc
Input Regulation (TJ = +25°C) Regline mV
−7.0 Vdc ≥ VI ≥ −20 Vdc − − 150
−8.0 Vdc ≥ VI ≥ −20 Vdc − − 100
Load Regulation Regload mV
TJ = +25°C, 1.0 mA ≤ IO ≤ 100 mA − − 60
1.0 mA ≤ IO ≤ 40 mA − − 30
Output Voltage VO Vdc
−7.0 Vdc ≥ VI ≥ −20 Vdc, 1.0 mA ≤ IO ≤ 40 mA −4.75 − −5.25
VI = −10 Vdc, 1.0 mA ≤ IO ≤ 70 mA −4.75 − −5.25
Input Bias Current IIB mA
(TJ = +25°C) − − 6.0
(TJ = +125°C) − − 5.5
Input Bias Current Change IIB mA
−8.0 Vdc ≥ VI ≥ −20 Vdc − − 1.5
1.0 mA ≤ IO ≤ 40 mA − − 0.1
Output Noise Voltage (TA = +25°C, 10 Hz ≤ f ≤ 100 kHz) Vn − 40 − mV
Ripple Rejection (−8.0 ≥ VI ≥ −18 Vdc, f = 120 Hz, TJ = +25°C) RR 41 49 − dB
Dropout Voltage (IO = 40 mA, TJ = +25°C) |VI−VO| − 1.7 − Vdc
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.

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2
 MC79L00A Series

ELECTRICAL CHARACTERISTICS (VI = −19 V, IO = 40 mA, CI = 0.33 mF, CO = 0.1 mF, −40°C < TJ +125°C (for MC79LXXAB),
0°C < TJ < +125°C (for MC79LXXAC)).
MC79L12AC, AB
Characteristics Symbol Min Typ Max Unit
Output Voltage (TJ = +25°C) VO −11.5 −12 −12.5 Vdc
Input Regulation (TJ = +25°C) Regline mV
−14.5 Vdc ≥ VI ≥ −27 Vdc − − 250
−16 Vdc ≥ VI ≥ −27 Vdc − − 200
Load Regulation Regload 100 mV
TJ = +25°C, 1.0 mA ≤ IO ≤ 100 mA − − 50
1.0 mA ≤ IO ≤ 40 mA − −
Output Voltage VO −11.4 −12.6 Vdc
−14.5 Vdc ≥ VI ≥ −27 Vdc, 1.0 mA ≤ IO ≤ 40 mA −11.4 − −12.6
VI = −19 Vdc, 1.0 mA ≤ IO ≤ 70 mA −
Input Bias Current IIB mA
(TJ = +25°C) − − 6.5
(TJ = +125°C) − − 6.0
Input Bias Current Change IIB 1.5 mA
−16 Vdc ≥ VI ≥ −27 Vdc − − 0.2
1.0 mA ≤ IO ≤ 40 mA − −
Output Noise Voltage (TA = +25°C, 10 Hz ≤ f ≤ 100 kHz) Vn − 80 − mV
Ripple Rejection (−15 ≤ VI ≤ −25 Vdc, f = 120 Hz, TJ = +25°C) RR 37 42 − dB
Dropout Voltage (IO = 40 mA, TJ = +25°C) |VI−VO| − 1.7 − Vdc
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.

ELECTRICAL CHARACTERISTICS (VI = −23 V, IO = 40 mA, CI = 0.33 mF, CO = 0.1 mF, −40°C < TJ +125°C (for MC79LXXAB),
0°C < TJ < +125°C (for MC79LXXAC)).
MC79L15AC, AB
Characteristics Symbol Min Typ Max Unit
Output Voltage (TJ = +25°C) VO −14.4 −15 −15.6 Vdc
Input Regulation (TJ = +25°C) Regline mV
−17.5 Vdc ≥ VI ≥ −30 Vdc − − 300
−20 Vdc ≥ VI ≥ −30 Vdc − − 250
Load Regulation Regload mV
TJ = +25°C, 1.0 mA ≤ IO ≤ 100 mA − − 150
1.0 mA ≤ IO ≤ 40 mA − − 75
Output Voltage VO Vdc
−17.5 Vdc ≥ VI ≥ −Vdc, 1.0 mA ≤ IO ≤ 40 mA −14.25 − −15.75
VI = −23 Vdc, 1.0 mA ≤ IO ≤ 70 mA −14.25 − −15.75

Input Bias Current IIB mA

(TJ = +25°C) − − 6.5
(TJ = +125°C) − − 6.0
Input Bias Current Change DIIB mA
−20 Vdc ≥ VI ≥ −30 Vdc − − 1.5
1.0 mA ≤ IO ≤ 40 mA − − 0.1
Output Noise Voltage (TA = +25°C, 10 Hz ≤ f ≤ 100 kHz) VN − 90 − mV
Ripple Rejection (−18.5 ≤ VI ≤ −28.5 Vdc, f = 120 Hz) RR 34 39 − dB
Dropout Voltage IO = 40 mA, TJ = +25°C |VI−VO| − 1.7 − Vdc
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.

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3
 MC79L00A Series

ELECTRICAL CHARACTERISTICS (VI = −27 V, IO = 40 mA, CI = 0.33 mF, CO = 0.1 mF, −40°C < TJ +125°C (for MC79LXXAB),
0°C < TJ < +125°C (for MC79LXXAC), unless otherwise noted).
MC79L18AC
Characteristics Symbol Min Typ Max Unit
Output Voltage (TJ = +25°C) VO −17.3 −18 −18.7 Vdc
Input Regulation (TJ = +25°C) Regline mV
−20.7 Vdc ≥ VI ≥ −33 Vdc − − 325
−21.4 Vdc ≥ VI ≥ −33 Vdc − − −
−22 Vdc ≥ VI ≥ −33 Vdc − − −
−21 Vdc ≥ VI ≥ −33 Vdc − − 275
Load Regulation Regload mV
TJ = +25°C, 1.0 mA ≤ IO ≤ 100 mA − − 170
1.0 mA ≤ IO ≤ 40 mA − − 85
Output Voltage VO Vdc
−20.7 Vdc ≥ VI ≥ −33 Vdc, 1.0 mA ≤ IO ≤ 40 mA −17.1 − −18.9
−21.4 Vdc ≥ VI ≥ −33 Vdc, 1.0 mA ≤ IO ≤ 40 mA − − −
VI = −27 Vdc, 1.0 mA ≤ IO ≤ 70 mA −17.1 − −18.9
Input Bias Current IIB mA
(TJ = +25°C) − − 6.5
(TJ = +125°C) − − 6.0
Input Bias Current Change IIB mA
−21 Vdc ≥ VI ≥ −33 Vdc − − 1.5
−27 Vdc ≥ VI ≥ −33 Vdc − − −
1.0 mA ≤ IO ≤ 40 mA − − 0.1
Output Noise Voltage (TA = +25°C, 10 Hz ≤ f ≤ 100 kHz) Vn − 150 − mV
Ripple Rejection (−23 ≤ VI ≤ −33 Vdc, f = 120 Hz, TJ = +25°C) RR 33 48 − dB
Dropout Voltage IO = 40 mA, TJ = +25°C |VI−VO| − 1.7 − Vdc
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.

ELECTRICAL CHARACTERISTICS (VI = −33 V, IO = 40 mA, CI = 0.33 mF, CO = 0.1 mF, −40°C < TJ +125°C (for MC79LXXAB),
0°C < TJ < +125°C (for MC79LXXAC), unless otherwise noted).
MC79L24AC
Characteristics Symbol Min Typ Max Unit
Output Voltage (TJ = +25°C) VO −23 −24 −25 Vdc
Input Regulation (TJ = +25°C) Regline mV
−27 Vdc ≥ VI ≥ −38 Vdc − − 350
−27.5 Vdc ≥ VI ≥ −38 Vdc − − −
−28 Vdc ≥ VI ≥ −38 Vdc − − 300
Load Regulation Regload mV
TJ = +25°C, 1.0 mA ≤ IO ≤ 100 mA − − 200
1.0 mA ≤ IO ≤ 40 mA − − 100
Output Voltage VO Vdc
−27 Vdc ≥ VI ≥ −38 V, 1.0 mA ≤ IO ≤ 40 mA −22.8 − −25.2
−28 Vdc ≥ VI ≥ −38 Vdc, 1.0 mA ≤ IO ≤ 40 mA − − −
VI = −33 Vdc, 1.0 mA ≤ IO ≤ 70 mA −22.8 − −25.2
Input Bias Current IIB mA
(TJ = +25°C) − − 6.5
(TJ = +125°C) − − 6.0
Input Bias Current Change DIIB mA
−28 Vdc ≥ VI ≥ −38 Vdc − − 1.5
1.0 mA ≤ IO ≤ 40 mA − − 0.1
Output Noise Voltage (TA = +25°C, 10 Hz ≤ f ≤ 100 kHz) Vn − 200 − mV
Ripple Rejection (−29 ≤ VI ≤ −35 Vdc, f = 120 Hz, TJ = +25°C) RR 31 47 − dB
Dropout Voltage IO = 40 mA, TJ = +25°C |VI−VO| − 1.7 − Vdc
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.

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4
 MC79L00A Series

APPLICATIONS INFORMATION
Design Considerations high−frequency characteristics to insure stable operation
The MC79L00A Series of fixed voltage regulators are under all load conditions. A 0.33 mF or larger tantalum,
designed with Thermal Overload Protections that shuts mylar, or other capacitor having low internal impedance at
down the circuit when subjected to an excessive power high frequencies should be chosen. The bypass capacitor
overload condition, Internal Short Circuit Protection that should be mounted with the shortest possible leads directly
limits the maximum current the circuit will pass. across the regulator’s input terminals. Normally good
In many low current applications, compensation construction techniques should be used to minimize ground
capacitors are not required. However, it is recommended loops and lead resistance drops since the regulator has no
that the regulator input be bypassed with a capacitor if the external sense lead. Bypassing the output is also
regulator is connected to the power supply filter with long recommended.
wire length, or if the output load capacitance is large. An
input bypass capacitor should be selected to provide good

Input MC79LXX Output

+Vin MC78LXX +VO
CI* CO**
0.33mF 0.1mF
0.33mF 0.1mF

0.1mF
-Vin MC79LXX -VO A common ground is required between the input and the output
voltages. The input voltage must remain typically 2.0 V above
the output voltage even during the low point on the ripple voltage.
0.33mF
* CI is required if regulator is located an appreciable
* distance from the power supply filter

** CO improves stability and transient response.

Figure 2. Positive and Negative Regulator Figure 3. Standard Application

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5
 MC79L00A Series

TYPICAL CHARACTERISTICS
(TA = +25°C, unless otherwise noted.)

8.0 -2.5

V I -V O , INPUT/OUTPUT DIFFERENTIAL
MC79L05C
VO, OUTPUT VOLTAGE (V)

VO = -5.0 V -2.0 IO = 70 mA
6.0 TJ = 25°C
IO = 40 mA
-1.5

VOLTAGE (V)
IO = 1.0 mA IO = 100 mA
4.0 IO = 1.0 mA
-1.0
Dropout of Regulation is
2.0 defined when
IO = 40 mA -0.5 DVO = 2% of VO

0 0
0 -2.0 -4.0 -6.0 -0.8 -10 0 25 50 75 100 125
Vin, INPUT VOLTAGE (V) TJ, JUNCTION TEMPERATURE (°C)

Figure 4. Dropout Characteristics Figure 5. Dropout Voltage versus

Junction Temperature

4.2 5.0
I IB , INPUT BIAS CURRENT (mA)

I IB , INPUT BIAS CURRENT (mA)

4.0
4.0
3.8

3.6 3.0
MC79L05C
VO = -5.0 V
3.4
2.0 IO = 40 mA
MC79L05C
3.2 Vin = -10 V
VO = -5.0 V 1.0
3.0 IO = 40 mA

0 0
0 25 50 75 100 125 0 -5.0 -10 -15 -20 -25 -30 -35 -40
TA, AMBIENT TEMPERATURE (°C) Vin, INPUT VOLTAGE (V)

Figure 6. Input Bias Current versus Figure 7. Input Bias Current versus
Ambient Temperature Input Voltage

10,000 170 3.2

150 2.8 PD, MAXIMUM POWER DISSIPATION (W)

RθJA , THERMAL RESISTANCE

PD(max) for TA = +50°C

P D , POWER DISSIPATION (mW)

JUNCTION-TO-AIR (°C/W)

130 2.4
1,000 No Heatsink

ÎÎÎ
ÎÎÎ
ÎÎÎ
110 Graph represents symmetrical layout 2.0

ÎÎÎ
ÎÎÎ
ÎÎÎ
90 2.0 oz. 1.6
L
100 Copper
70 1.2
L 3.0 mm
RqJA = 200°C/W 50 0.8
PD(max) to 25°C = 625 mW RqJA
10 30 0.4
25 50 75 100 125 150 0 10 20 30 40 50
TA, AMBIENT TEMPERATURE (°C) L, LENGTH OF COPPER (mm)

Figure 8. Maximum Average Power Dissipation Figure 9. SOP−8 Thermal Resistance and Maximum
versus Ambient Temperature (TO−92) Power Dissipation versus P.C.B. Copper Length

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6
 MC79L00A Series

ORDERING INFORMATION
Device Nominal Operating Temperature Package Shipping†
Voltage Range
MC79L05ABDG −5.0 V TJ = −40° to +125°C SOIC−8 98 Units / Rail
(Pb−Free)

MC79L05ABDR2G SOIC−8 2500 / Tape & Reel

(Pb−Free)
MC79L05ABPG TO−92 2000 Units / Bag
(Pb−Free)
MC79L05ABPRAG TO−92 2000 / Tape & Reel
(Pb−Free)
MC79L05ACDG TJ = 0° to +125°C SOIC−8 98 Units / Rail
(Pb−Free)
MC79L05ACDR2G SOIC−8 2500 / Tape & Reel
(Pb−Free)
MC79L05ACPG TO−92 2000 Units / Bag
(Pb−Free)
MC79L05ACPRAG TO−92 2000 / Tape & Reel
(Pb−Free)
MC79L05ACPRMG TO−92 2000 / Tape & Ammo Box
(Pb−Free)
MC79L05ACPRPG TO−92 2000 / Tape & Ammo Box
(Pb−Free)
MC79L12ABDG −12 V TJ = −40° to +125°C SOIC−8 98 Units / Rail
(Pb−Free)
MC79L12ABDR2G SOIC−8 2500 / Tape & Reel
(Pb−Free)
MC79L12ABPG TO−92 2000 Units / Bag
(Pb−Free)
MC79L12ABPRAG TO−92 2000 / Tape & Reel
(Pb−Free)
MC79L12ACDG −12 V TJ = 0° to +125°C SOIC−8 98 Units / Rail
(Pb−Free)
MC79L12ACDR2G SOIC−8 2500 / Tape & Reel
(Pb−Free)
MC79L12ACPG TO−92 2000 Units / Bag
(Pb−Free)
MC79L12ACPRAG TO−92 2000 / Tape & Reel
(Pb−Free)
MC79L12ACPRPG TO−92 2000 / Tape & Ammo Box
(Pb−Free)

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7
 MC79L00A Series

ORDERING INFORMATION (continued)

Device Nominal Operating Temperature Package Shipping†
Voltage Range
MC79L15ABDG −15 V TJ = −40° to +125°C SOIC−8 98 Units / Rail
(Pb−Free)
MC79L15ABDR2G SOIC−8 2500 / Tape & Reel
(Pb−Free)
MC79L15ABPG TO−92 2000 Units / Bag
(Pb−Free)
MC79L15ABPRPG TO−92 2000 / Tape & Ammo Box
(Pb−Free)
MC79L15ACDG TJ = 0° to +125°C SOIC−8 98 Units / Rail
(Pb−Free)
MC79L15ACDR2G SOIC−8 2500 / Tape & Reel
(Pb−Free)
MC79L15ACPG TO−92 2000 Units / Bag
(Pb−Free)
MC79L15ACPRAG TO−92 2000 / Tape & Reel
(Pb−Free)
MC79L15ACPREG TO−92 2000 / Tape & Reel
(Pb−Free)
MC79L15ACPRPG TO−92 2000 / Tape & Ammo Box
(Pb−Free)
MC79L18ABPRPG −18 V TJ = −40° to +125°C TO−92 2000 / Tape & Ammo Box
(Pb−Free)
MC79L18ACPG TJ = 0° to +125°C TO−92 2000 Units / Bag
(Pb−Free)
MC79L24ABPG −24 V TJ = −40° to +125°C TO−92 2000 Units / Bag
(Pb−Free)
MC79L24ACPG TJ = 0° to +125°C TO−92 2000 Units / Bag
(Pb−Free)
MC79L24ACPRMG TO−92 2000 / Tape & Ammo Box
(Pb−Free)
MC79L24ACPRPG TO−92 2000 / Tape & Ammo Box
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.

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8
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS

TO−92 (TO−226) 1 WATT

CASE 29−10
SCALE 1:1 ISSUE A
DATE 08 MAY 2012

12 1
2
3 3
STRAIGHT LEAD BENT LEAD

A
NOTES:
STRAIGHT LEAD 1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1994.
B 2. CONTROLLING DIMENSION: INCHES.
3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS
R UNCONTROLLED.
4. DIMENSION F APPLIES BETWEEN DIMENSIONS P
P AND L. DIMENSIONS D AND J APPLY BETWEEN DI­
L MENSIONS L AND K MINIMUM. THE LEAD
F DIMENSIONS ARE UNCONTROLLED IN DIMENSION
K P AND BEYOND DIMENSION K MINIMUM.
INCHES MILLIMETERS
DIM MIN MAX MIN MAX
A 0.175 0.205 4.44 5.21
B 0.290 0.310 7.37 7.87
X X D C 0.125 0.165 3.18 4.19
G D 0.018 0.021 0.46 0.53
F 0.016 0.019 0.41 0.48
H J G 0.045 0.055 1.15 1.39
H 0.095 0.105 2.42 2.66
V C J 0.018 0.024 0.46 0.61
SECTION X−X K 0.500 --- 12.70 ---
L 0.250 --- 6.35 ---
1 N N 0.080 0.105 2.04 2.66
P --- 0.100 --- 2.54
N R 0.135 --- 3.43 ---
V 0.135 --- 3.43 ---

A
NOTES:
R BENT LEAD 1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
B 2. CONTROLLING DIMENSION: INCHES.
3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS
UNCONTROLLED.
4. DIMENSION F APPLIES BETWEEN DIMENSIONS P
P AND L. DIMENSIONS D AND J APPLY BETWEEN
T DIMENSIONS L AND K MINIMUM. THE LEAD
DIMENSIONS ARE UNCONTROLLED IN DIMENSION
SEATING
PLANE K P AND BEYOND DIMENSION K MINIMUM.
INCHES MILLIMETERS
DIM MIN MAX MIN MAX
A 0.175 0.205 4.44 5.21
B 0.290 0.310 7.37 7.87
X X D C 0.125 0.165 3.18 4.19
G D 0.018 0.021 0.46 0.53
G 0.094 0.102 2.40 2.80
J J 0.018 0.024 0.46 0.61
V K 0.500 --- 12.70 ---
C N 0.080 0.105 2.04 2.66
SECTION X−X P --- 0.100 --- 2.54
R 0.135 --- 3.43 ---
1 N V 0.135 --- 3.43 ---

STYLES ON PAGE 2
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DOCUMENT NUMBER: 98AON52857E Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: TO−92 (TO−226) 1 WATT PAGE 1 OF 2

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the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
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 TO−92 (TO−226) 1 WATT
CASE 29−10
ISSUE A
DATE 08 MAY 2012

STYLE 1: STYLE 2: STYLE 3: STYLE 4: STYLE 5:

PIN 1. EMITTER PIN 1. BASE PIN 1. ANODE PIN 1. CATHODE PIN 1. DRAIN
2. BASE 2. EMITTER 2. ANODE 2. CATHODE 2. SOURCE
3. COLLECTOR 3. COLLECTOR 3. CATHODE 3. ANODE 3. GATE

STYLE 6: STYLE 7: STYLE 8: STYLE 9: STYLE 10:

PIN 1. GATE PIN 1. SOURCE PIN 1. DRAIN PIN 1. BASE 1 PIN 1. CATHODE
2. SOURCE & SUBSTRATE 2. DRAIN 2. GATE 2. EMITTER 2. GATE
3. DRAIN 3. GATE 3. SOURCE & SUBSTRATE 3. BASE 2 3. ANODE

STYLE 11: STYLE 12: STYLE 13: STYLE 14: STYLE 15:
PIN 1. ANODE PIN 1. MAIN TERMINAL 1 PIN 1. ANODE 1 PIN 1. EMITTER PIN 1. ANODE 1
2. CATHODE & ANODE 2. GATE 2. GATE 2. COLLECTOR 2. CATHODE
3. CATHODE 3. MAIN TERMINAL 2 3. CATHODE 2 3. BASE 3. ANODE 2

STYLE 16: STYLE 17: STYLE 18: STYLE 19: STYLE 20:
PIN 1. ANODE PIN 1. COLLECTOR PIN 1. ANODE PIN 1. GATE PIN 1. NOT CONNECTED
2. GATE 2. BASE 2. CATHODE 2. ANODE 2. CATHODE
3. CATHODE 3. EMITTER 3. NOT CONNECTED 3. CATHODE 3. ANODE

STYLE 21: STYLE 22: STYLE 23: STYLE 24: STYLE 25:
PIN 1. COLLECTOR PIN 1. SOURCE PIN 1. GATE PIN 1. EMITTER PIN 1. MT 1
2. EMITTER 2. GATE 2. SOURCE 2. COLLECTOR/ANODE 2. GATE
3. BASE 3. DRAIN 3. DRAIN 3. CATHODE 3. MT 2

STYLE 26: STYLE 27: STYLE 28: STYLE 29: STYLE 30:
PIN 1. VCC PIN 1. MT PIN 1. CATHODE PIN 1. NOT CONNECTED PIN 1. DRAIN
2. GROUND 2 2. SUBSTRATE 2. ANODE 2. ANODE 2. GATE
3. OUTPUT 3. MT 3. GATE 3. CATHODE 3. SOURCE

STYLE 31: STYLE 32: STYLE 33: STYLE 34: STYLE 35:
PIN 1. GATE PIN 1. BASE PIN 1. RETURN PIN 1. INPUT PIN 1. GATE
2. DRAIN 2. COLLECTOR 2. INPUT 2. GROUND 2. COLLECTOR
3. SOURCE 3. EMITTER 3. OUTPUT 3. LOGIC 3. EMITTER

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98AON52857E Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: TO−92 (TO−226) 1 WATT PAGE 2 OF 2

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.

© Semiconductor Components Industries, LLC, 2019 www.onsemi.com

MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS

SOIC−8 NB
8 CASE 751−07
1 ISSUE AK
SCALE 1:1 DATE 16 FEB 2011

NOTES:
1. DIMENSIONING AND TOLERANCING PER
−X− ANSI Y14.5M, 1982.
A 2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
8 5 PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
B S 0.25 (0.010) M Y M PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
1 IN EXCESS OF THE D DIMENSION AT
4 MAXIMUM MATERIAL CONDITION.
−Y− K 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
MILLIMETERS INCHES
G
DIM MIN MAX MIN MAX
A 4.80 5.00 0.189 0.197
C N X 45 _ B 3.80 4.00 0.150 0.157
SEATING C 1.35 1.75 0.053 0.069
PLANE D 0.33 0.51 0.013 0.020
−Z− G 1.27 BSC 0.050 BSC
H 0.10 0.25 0.004 0.010
0.10 (0.004) J 0.19 0.25 0.007 0.010
H M J K 0.40 1.27 0.016 0.050
D
M 0_ 8_ 0 _ 8 _
N 0.25 0.50 0.010 0.020
S 5.80 6.20 0.228 0.244
0.25 (0.010) M Z Y S X S

GENERIC
MARKING DIAGRAM*
SOLDERING FOOTPRINT*
8 8 8 8
XXXXX XXXXX XXXXXX XXXXXX
ALYWX ALYWX AYWW AYWW
1.52
G G
0.060
1 1 1 1
IC IC Discrete Discrete
(Pb−Free) (Pb−Free)
7.0 4.0
XXXXX = Specific Device Code XXXXXX = Specific Device Code
0.275 0.155
A = Assembly Location A = Assembly Location
L = Wafer Lot Y = Year
Y = Year WW = Work Week
W = Work Week G = Pb−Free Package
G = Pb−Free Package

0.6 1.270 *This information is generic. Please refer to

0.024 0.050 device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
SCALE 6:1 ǒinches
mm Ǔ or may not be present. Some products may
not follow the Generic Marking.
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.

STYLES ON PAGE 2

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98ASB42564B Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: SOIC−8 NB PAGE 1 OF 2

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.

© Semiconductor Components Industries, LLC, 2019 www.onsemi.com

 SOIC−8 NB
CASE 751−07
ISSUE AK
DATE 16 FEB 2011
STYLE 1: STYLE 2: STYLE 3: STYLE 4:
PIN 1. EMITTER PIN 1. COLLECTOR, DIE, #1 PIN 1. DRAIN, DIE #1 PIN 1. ANODE
2. COLLECTOR 2. COLLECTOR, #1 2. DRAIN, #1 2. ANODE
3. COLLECTOR 3. COLLECTOR, #2 3. DRAIN, #2 3. ANODE
4. EMITTER 4. COLLECTOR, #2 4. DRAIN, #2 4. ANODE
5. EMITTER 5. BASE, #2 5. GATE, #2 5. ANODE
6. BASE 6. EMITTER, #2 6. SOURCE, #2 6. ANODE
7. BASE 7. BASE, #1 7. GATE, #1 7. ANODE
8. EMITTER 8. EMITTER, #1 8. SOURCE, #1 8. COMMON CATHODE
STYLE 5: STYLE 6: STYLE 7: STYLE 8:
PIN 1. DRAIN PIN 1. SOURCE PIN 1. INPUT PIN 1. COLLECTOR, DIE #1
2. DRAIN 2. DRAIN 2. EXTERNAL BYPASS 2. BASE, #1
3. DRAIN 3. DRAIN 3. THIRD STAGE SOURCE 3. BASE, #2
4. DRAIN 4. SOURCE 4. GROUND 4. COLLECTOR, #2
5. GATE 5. SOURCE 5. DRAIN 5. COLLECTOR, #2
6. GATE 6. GATE 6. GATE 3 6. EMITTER, #2
7. SOURCE 7. GATE 7. SECOND STAGE Vd 7. EMITTER, #1
8. SOURCE 8. SOURCE 8. FIRST STAGE Vd 8. COLLECTOR, #1
STYLE 9: STYLE 10: STYLE 11: STYLE 12:
PIN 1. EMITTER, COMMON PIN 1. GROUND PIN 1. SOURCE 1 PIN 1. SOURCE
2. COLLECTOR, DIE #1 2. BIAS 1 2. GATE 1 2. SOURCE
3. COLLECTOR, DIE #2 3. OUTPUT 3. SOURCE 2 3. SOURCE
4. EMITTER, COMMON 4. GROUND 4. GATE 2 4. GATE
5. EMITTER, COMMON 5. GROUND 5. DRAIN 2 5. DRAIN
6. BASE, DIE #2 6. BIAS 2 6. DRAIN 2 6. DRAIN
7. BASE, DIE #1 7. INPUT 7. DRAIN 1 7. DRAIN
8. EMITTER, COMMON 8. GROUND 8. DRAIN 1 8. DRAIN

STYLE 13: STYLE 14: STYLE 15: STYLE 16:

PIN 1. N.C. PIN 1. N−SOURCE PIN 1. ANODE 1 PIN 1. EMITTER, DIE #1
2. SOURCE 2. N−GATE 2. ANODE 1 2. BASE, DIE #1
3. SOURCE 3. P−SOURCE 3. ANODE 1 3. EMITTER, DIE #2
4. GATE 4. P−GATE 4. ANODE 1 4. BASE, DIE #2
5. DRAIN 5. P−DRAIN 5. CATHODE, COMMON 5. COLLECTOR, DIE #2
6. DRAIN 6. P−DRAIN 6. CATHODE, COMMON 6. COLLECTOR, DIE #2
7. DRAIN 7. N−DRAIN 7. CATHODE, COMMON 7. COLLECTOR, DIE #1
8. DRAIN 8. N−DRAIN 8. CATHODE, COMMON 8. COLLECTOR, DIE #1

STYLE 17: STYLE 18: STYLE 19: STYLE 20:

PIN 1. VCC PIN 1. ANODE PIN 1. SOURCE 1 PIN 1. SOURCE (N)
2. V2OUT 2. ANODE 2. GATE 1 2. GATE (N)
3. V1OUT 3. SOURCE 3. SOURCE 2 3. SOURCE (P)
4. TXE 4. GATE 4. GATE 2 4. GATE (P)
5. RXE 5. DRAIN 5. DRAIN 2 5. DRAIN
6. VEE 6. DRAIN 6. MIRROR 2 6. DRAIN
7. GND 7. CATHODE 7. DRAIN 1 7. DRAIN
8. ACC 8. CATHODE 8. MIRROR 1 8. DRAIN
STYLE 21: STYLE 22: STYLE 23: STYLE 24:
PIN 1. CATHODE 1 PIN 1. I/O LINE 1 PIN 1. LINE 1 IN PIN 1. BASE
2. CATHODE 2 2. COMMON CATHODE/VCC 2. COMMON ANODE/GND 2. EMITTER
3. CATHODE 3 3. COMMON CATHODE/VCC 3. COMMON ANODE/GND 3. COLLECTOR/ANODE
4. CATHODE 4 4. I/O LINE 3 4. LINE 2 IN 4. COLLECTOR/ANODE
5. CATHODE 5 5. COMMON ANODE/GND 5. LINE 2 OUT 5. CATHODE
6. COMMON ANODE 6. I/O LINE 4 6. COMMON ANODE/GND 6. CATHODE
7. COMMON ANODE 7. I/O LINE 5 7. COMMON ANODE/GND 7. COLLECTOR/ANODE
8. CATHODE 6 8. COMMON ANODE/GND 8. LINE 1 OUT 8. COLLECTOR/ANODE

STYLE 25: STYLE 26: STYLE 27: STYLE 28:

PIN 1. VIN PIN 1. GND PIN 1. ILIMIT PIN 1. SW_TO_GND
2. N/C 2. dv/dt 2. OVLO 2. DASIC_OFF
3. REXT 3. ENABLE 3. UVLO 3. DASIC_SW_DET
4. GND 4. ILIMIT 4. INPUT+ 4. GND
5. IOUT 5. SOURCE 5. SOURCE 5. V_MON
6. IOUT 6. SOURCE 6. SOURCE 6. VBULK
7. IOUT 7. SOURCE 7. SOURCE 7. VBULK
8. IOUT 8. VCC 8. DRAIN 8. VIN
STYLE 29: STYLE 30:
PIN 1. BASE, DIE #1 PIN 1. DRAIN 1
2. EMITTER, #1 2. DRAIN 1
3. BASE, #2 3. GATE 2
4. EMITTER, #2 4. SOURCE 2
5. COLLECTOR, #2 5. SOURCE 1/DRAIN 2
6. COLLECTOR, #2 6. SOURCE 1/DRAIN 2
7. COLLECTOR, #1 7. SOURCE 1/DRAIN 2
8. COLLECTOR, #1 8. GATE 1

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98ASB42564B Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: SOIC−8 NB PAGE 2 OF 2

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.

© Semiconductor Components Industries, LLC, 2019 www.onsemi.com

 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
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