ELECTRONC DEVICES AND CIRCUITS

UNIT-I
PN JUNCTION DIODE AND APPLICATIONS
INTRODUCTON
Based on the electrical conductivity all the materials in nature are classified as
insulators, semiconductors, and conductors.

Insulator: An insulator is a material that offers a very low level (or negligible) of conductivity
when voltage is applied. Eg: Paper, Mica, glass, quartz. Typical resistivity level of an insulator
is of the order of 1010 to 1012 Ω-cm. The energy band structure of an insulator is shown in the
fig.1.1. Band structure of a material defines the band of energy levels that an electron can
occupy. Valance band is the range of electron energy where the electron remain bended too
the atom and do not contribute to the electric current. Conduction bend is the range of electron
energies higher than valance band where electrons are free to accelerate under the influence
of external voltage source resulting in the flow of charge.
The energy band between the valance band and conduction band is called as forbidden
band gap. It is the energy required by an electron to move from balance band to conduction
band i.e. the energy required for a valance electron to become a free electron.
1 eV = 1.6 x 10-19 J
For an insulator, as shown in the fig.1.1 there is a large forbidden band gap of greater than
5Ev. Because of this large gap there a very few electrons in the CB and hence the conductivity
of insulator is poor. Even an increase in temperature or applied electric field is insufficient to
transfer electrons from VB to CB.

C
C C

Forbidden
o
Eo =≈6eV
band gap Eo
≈6eV

V
V
V

Insulator Semiconductor Conductor

FiG:1.1 Energy band diagrams insulator, semiconductor and conductor
Conductors: A conductor is a material which supports a generous flow of charge when a
voltage is applied across its terminals. i.e. it has very high conductivity. Eg: Copper, Aluminum,
Silver, Gold. The resistivity of a conductor is in the order of 10 -4 and 10-6 Ω-cm. The Valance
and conduction bands overlap (fig1.1) and there is no energy gap for the electrons to move
from valance band to conduction band. This implies that there are free electrons in CB even at
absolute zero temperature (0K). Therefore at room temperature when electric field is applied
large current flows through the conductor.

Semiconductor: A semiconductor is a material that has its conductivity somewhere between

the insulator and conductor. The resistivity level is in the range of 10 and 10 4 Ω-cm. Two of the
most commonly used are Silicon (Si=14 atomic no.) and germanium (Ge=32 atomic no.). Both
have 4 valance electrons. The forbidden band gap is in the order of 1eV. For eg., the band gap
energy for Si, Ge and GaAs is 1.21, 0.785 and 1.42 eV, respectively at absolute zero
temperature (0K). At 0K and at low temperatures, the valance band electrons do not have
sufficient energy to move from V to CB. Thus semiconductors act a insulators at 0K. as the
temperature increases, a large number of valance electrons acquire sufficient energy to leave
the VB, cross the forbidden bandgap and reach CB. These are now free electrons as they can
move freely under the influence of electric field. At room temperature there are sufficient
electrons in the CB and hence the semiconductor is capable of conducting some current at
room temperature.
Inversely related to the conductivity of a material is its resistance to the flow of charge or
current. Typical resistivity values for various materials’ are given as follows.

Insulator Semiconductor Conductor

10-6 Ω-cm 50Ω-cm (Ge) 1012 Ω-
(Cu) cm
(mica)
50x103 Ω-cm
(Si)
Typical resistivity values

Semiconductor Types

A pure form of semiconductors is called as intrinsic semiconductor. Conduction in

intrinsic sc is either due to thermal excitation or crystal defects. Si and Ge are the two most
important semiconductors used. Other examples include Gallium arsenide GaAs, Indium
Antimonide (InSb) etc.
 Let us consider the structure of Si. A Si atomic no. is 14 and it has 4 valance electrons.
These 4 electrons are shared by four neighboring atoms in the crystal structure by means of
covalent bond. Fig. 1.2a shows the crystal structure of Si at absolute zero temperature (0K).
Hence a pure SC acts has poor conductivity (due to lack of free electrons) at low or absolute
zero temperature.

Covalent bond

Valence

electron

Fig. 1.2a crystal structure of Si at 0K

At room temperature some of the covalent bonds break up to thermal energy as shown
in fig 1.2b. The valance electrons that jump into conduction band are called as free electrons
that are available for conduction.

Free electron

Valance electron

hole

Fig. 1.2b crystal structure of Si at

room temperature0K
 The absence of electrons in covalent bond is represented by a small circle usually
referred to as hole which is of positive charge. Even a hole serves as carrier of electricity in a
manner similar to that of free electron.

The mechanism by which a hole contributes to conductivity is explained as follows:

When a bond is in complete so that a hole exists, it is relatively easy for a valance
electron in the neighboring atom to leave its covalent bond to fill this hole. An electron moving
from a bond to fill a hole moves in a direction opposite to that of the electron. This hole, in its
new position may now be filled by an electron from another covalent bond and the hole will
correspondingly move one more step in the direction opposite to the motion of electron. Here
we have a mechanism for conduction of electricity which does not involve free electrons. This
phenomenon is illustrated in fig1.3

Electron

movement Hole

movement

Fig. 1.3a

Fig. 1.3b Fig. 1.3c

 Fig 1.3a show that there is a hole at ion 6.Imagine that an electron from ion 5 moves
into the hole at ion 6 so that the configuration of 1.3b results. If we compare both fig1.3a &fig
1.3b, it appears as if the hole has moved towards the left from ion6 to ion 5. Further if we
compare fig 1.3b and fig 1.3c, the hole moves from ion5 to ion 4. This discussion indicates the
motion of hole is in a direction opposite to that of motion of electron. Hence we consider holes
as physical entities whose movement constitutes flow of current.

In a pure semiconductor, the number of holes is equal to the number of free electrons.

EXTRINSIC SEMICONDUCTOR

Intrinsic semiconductor has very limited applications as they conduct very small
amounts of current at room temperature. The current conduction capability of intrinsic
semiconductor can be increased significantly by adding a small amounts impurity to the
intrinsic semiconductor. By adding impurities it becomes impure or extrinsic semiconductor.
This process of adding impurities is called as doping. The amount of impurity added is 1 part in
106 atoms.

N type semiconductor: If the added impurity is a pentavalent atom then the resultant
semiconductor is called N-type semiconductor. Examples of pentavalent impurities are
Phosphorus, Arsenic, Bismuth, Antimony etc.

A pentavalent impurity has five valance electrons. Fig 1.4a shows the crystal structure of N-
type semiconductor material where four out of five valance electrons of the impurity
atom(antimony) forms covalent bond with the four intrinsic semiconductor atoms. The fifth
electron is loosely bound to the impurity atom. This loosely bound electron can be easily

Fifth valance electron of SB

CB
Ec
Ed
Donor energy level
Ev
VB

Fig. 1.4a crystal structure of N type SC Fig. 1.4bEnergy band diagram of N type
 Excited from the valance band to the conduction band by the application of electric field or
increasing the thermal energy. The energy required to detach the fifth electron form the
impurity atom is very small of the order of 0.01ev for Ge and 0.05 eV for Si.

The effect of doping creates a discrete energy level called donor energy level in the
forbidden band gap with energy level Ed slightly less than the conduction band (fig 1.4b). The
difference between the energy levels of the conducting band and the donor energy level is the
energy required to free the fifth valance electron (0.01 eV for Ge and 0.05 eV for Si). At room
temperature almost all the fifth electrons from the donor impurity atom are raised to conduction
band and hence the number of electrons in the conduction band increases significantly. Thus
every antimony atom contributes to one conduction electron without creating a hole.

In the N-type sc the no. of electrons increases and the no. of holes decreases compared to
those available in an intrinsic sc. The reason for decrease in the no. of holes is that the larger
no. of electrons present increases the recombination of electrons with holes. Thus current in N
type sc is dominated by electrons which are referred to as majority carriers. Holes are the
minority carriers in N type sc

P type semiconductor: If the added impurity is a trivalent atom then the resultant
semiconductor is called P-type semiconductor. Examples of trivalent impurities are Boron,
Gallium , indium etc.

The crystal structure of p type sc is shown in the fig1.5a. The three valance electrons of the
impurity (boon) forms three covalent bonds with the neighboring atoms and a vacancy exists in
the fourth bond giving rise to the holes. The hole is ready to accept an electron from the
neighboring atoms. Each trivalent atom contributes to one hole generation and thus introduces
a large no. of holes in the valance band. At the same time the no. electrons are decreased
compared to those available in intrinsic sc because of increased recombination due to creation
of additional holes.

hole

Fig. 1.5a crystal structure of P type sc

 Thus in P type sc , holes are majority carriers and electrons are minority carriers. Since
each trivalent impurity atoms are capable accepting an electron, these are called as acceptor
atoms. The following fig 1.5b shows the pictorial representation of P type sc

hole (majority carrier)

Electron (minority carrier)

Acceptor atoms

Fig. 1.5b crystal structure of P type sc

 The conductivity of N type sc is greater than that of P type sc as the mobility of

electron is greater than that of hole.

 For the same level of doping in N type sc and P type sc, the conductivity of an
Ntype sc is around twice that of a P type sc

CONDUCTIVITY OF SEMICONDUCTOR

In a pure sc, the no. of holes is equal to the no. of electrons. Thermal agitation continue
to produce new electron- hole pairs and the electron hole pairs disappear because of
recombination. with each electron hole pair created , two charge carrying particles are formed .
One is negative which is a free electron with mobility µn . The other is a positive i.e., hole with
mobility µp . The electrons and hole move in opppsitte direction in a an electric field E, but
since they are of opposite sign, the current due to each is in the same direction. Hence the
total current density J within the intrinsic sc is given by

J = Jn + Jp

=q n µn E + q p µp E

= (n µn + p µp)qE

=ς E

Where n=no. of electrons / unit volume i.e., concentration of free

electrons P= no. of holes / unit volume i.e., concentration of

holes

E=applied electric field strength, V/m

q= charge of electron or hole I n Coulombs

 Hence, ς is the conductivity of sc which is equal to (n µ n + p µp)q. he resistivity of sc is
reciprocal of conductivity.

Ρ = 1/ ς

It is evident from the above equation that current density with in a sc is directly
proportional to applied electric field E.

For pure sc, n=p= ni where ni = intrinsic concentration. The value of ni is

giiven by n 2=AT3 exp (-E /KT)

therefore, J= ni ( µn + µp) q E

Hence conductivity in intrinsic sc is ςi= ni ( µn + µp) q

Intrinsic conductivity increases at the rate of 5% per o C for Ge and 7% per o C for Si.

Conductivity in extrinsic sc (N Type and P Type):

The conductivity of intrinsic sc is given by ςi= ni ( µn + µp) q = (n µn + p

µp)q For N type , n>>p

Therefore ς= q n µn

For P type ,p>>n

Therefore ς= qpµ p

CHARGE DENSITIES IN P TYPE AND N TYPE SEMICONDUCTOR:

Mass Action Law:

Under thermal equilibrium for any semiconductor, the product of the no. of holes and the
concentration of electrons is constant and is independent of amount of donor and acceptor
impurity doping.

n.p= ni 2

where n= electron oncentration

p = hole concentration

ni2= intrinsic concentration

 Hence in N type sc , as the no. of electrons increase the no. of holes decreases.
Similarly in P type as the no. of holes increases the no. of electrons decreases. Thus the
product isi constant and is equal to n 2 in case of intrinsic as well as extrinsic sc.

The law of mass action has given the relationship between free electrons concentration
and hole concentration. These concentrations are further related by the law of electrical
neutrality as explained below.

Law of electrical neutrality:

Sc materials are electrically neutral. According to the law of electrical neutrality, in an

electrically neutral material, the magnitude of positive charge concentration is equal to tat of
negative charge concentration. Let us consider a sc that has ND donor atoms per cubic
centimeter and NA acceptor atoms per cubic centimeter i.e., the concentration of donor and
acceptor atoms are ND and NA respectively. Therefore ND positively charged ions per cubic
centimeter are contributed by donor atoms and NA negatively charged ions per cubic
centimeter are contributed by the acceptor atoms. Let n, p is concentration of free electrons
and holes respectively. Then according to the law of neutrality

ND + p =NA + n ............................................................................................. eq 1.1

For N type sc, NA =0 and n>>p. Therefore ND ≈ n .................................................... eq 1.2

Hence for N type sc the free electron concentration is approximately equal to the
concentration of donor atoms. In later applications since some confusion may arise as to which
type of sc is under consideration a the given moment, the subscript n or p is added for Ntype
or P type respectively. Hence eq1.2 becomes ND ≈ nn

Therefore current density in N type sc is J = ND

µn q E And conductivity ς= ND µn q

For P type sc, ND = 0 and p>>n. Therefore NA ≈ p

Or NA ≈pp

Hence for P type sc the hole concentration is approximately equal to the concentration
of acceptor atoms.

Therefore current density in N type sc is J = NA

µp q E And conductivity ς= NA µp q

Mass action law for N type, nn pn= ni2

pn= ni2/ ND since (nn≈ ND)

Mass action law for P type, np pp = ni 2

np= ni 2/ NA since (pp ≈ NA )

QUANTITATIVE THEORY OF PN JUNCTION DIODE

PN JUNCTION WITH NO APPLIED VOLTAGE OR OPEN CIRCUIT CONDITION:

In a piece of sc, if one half is doped by p type impurity and the other half is doped by n
type impurity, a PN junction is formed. The plane dividing the two halves or zones is called PN
junction. As shown in the fig the n type material has high concentration of free electrons, while
p type material has high concentration of holes. Therefore at the junction there is a tendency of
free electrons to diffuse over to the P side and the holes to the N side. This process is called
diffusion. As the free electrons move across the junction from N type to P type, the donor
atoms become positively charged. Hence a positive charge is built on the N-side of the
junction. The free electrons that cross the junction uncover the negative acceptor ions by filing
the holes. Therefore a negative charge is developed on the p –side of the junction..This net
negative charge on the p side prevents further diffusion of electrons into the p side. Similarly
the net positive charge on the N side repels the hole crossing from p side to N side. Thus a
barrier sis set up near the junction which prevents the further movement of charge carriers i.e.
electrons and holes. As a consequence of induced electric field across the depletion layer, an
electrostatic potential difference is established between P and N regions, which are called the
potential barrier, junction barrier, diffusion potential or contact potential, Vo. The magnitude of
the contact potential Vo varies with doping levels and temperature. Vo is 0.3V for Ge and 0.72
V for Si.

Fig 1.6: Symbol of PN Junction Diode

The electrostatic field across the junction caused by the positively charged N-Type
region tends to drive the holes away from the junction and negatively charged p type regions
tend to drive the electrons away from the junction. The majority holes diffusing out of the P
region leave behind negatively charged acceptor atoms bound to the lattice, thus exposing a
negatives pace charge in a previously neutral region. Similarly electrons diffusing from the N
region expose positively ionized donor atoms and a double space charge builds up at the
junction as shown in the fig. 1.7a
 Fig 1.7a

It is noticed that the space charge layers are of opposite sign to the majority carriers
diffusing into them, which tends to reduce the diffusion rate. Thus the double space of the layer
causes an electric field to be set up across the junction directed from N to P regions, which is
in such a direction to inhibit the diffusion of majority electrons and holes as illustrated in fig
1.7b. The shape of the charge density, ρ, depends upon how diode id doped. Thus the junction
region is depleted of mobile charge carriers. Hence it is called depletion layer, space region, and
transition region. The depletion region is of the order of 0.5µm thick. There are no mobile
carriers in this narrow depletion region. Hence no current flows across the junction and the
system is in equilibrium. To the left of this depletion layer, the carrier concentration is p= NA
and to its right it is n= ND.
 Fig 1.7b

FORWARD BIASED JUNCTION DIODE

When a diode is connected in a Forward Bias condition, a negative voltage is applied

to the N- type material and a positive voltage is applied to the P-type material. If this external
voltage becomes greater than the value of the potential barrier, approx. 0.7 volts for silicon and
0.3 volts for germanium, the potential barriers opposition will be overcome and current will start
to flow. This is because the negative voltage pushes or repels electrons towards the junction
giving them the energy to cross over and combine with the holes being pushed in the opposite
direction towards the junction by the positive voltage. This results in a characteristics curve of
zero current flowing up to this voltage point,
called the "knee" on the static curves and then a high current flow through the diode with little
increase in the external voltage as shown below.

Forward Characteristics Curve for a Junction Diode

Fig 1.8a: Diode Forward Characteristics

The application of a forward biasing voltage on the junction diode results in the depletion
layer becoming very thin and narrow which represents a low impedance path through the
junction thereby allowing high currents to flow. The point at which this sudden increase in
current takes place is represented on the static I-V characteristics curve above as the "knee"
point.

Forward Biased Junction Diode showing a Reduction in the Depletion Layer

Fig 1.8b: Diode Forward Bias

This condition represents the low resistance path through the PN junction allowing very large
currents to flow through the diode with only a small increase in bias voltage. The actual
potential difference across the junction or diode is kept constant by the action of the depletion
layer at approximately 0.3v for germanium and approximately 0.7v for silicon junction diodes.
Since the diode can conduct "infinite" current above this knee point as it effectively becomes a
short circuit, therefore resistors are used in series with the diode to limit its current flow.
Exceeding its maximum forward current specification causes the device to dissipate more
power in the form of heat than it was designed for resulting in a very quick failure of the
device.

1.1.2 PN JUNCTION UNDER REVERSE BIAS

CONDITION: Reverse Biased Junction Diode

When a diode is connected in a Reverse Bias condition, a positive voltage is applied to the N-type
material and a negative voltage is applied to the P-type material. The positive voltage applied
to the N- type material attracts electrons towards the positive electrode and away from the
junction, while the holes in the P-type end are also attracted away from the junction towards
the negative electrode. The net result is that the depletion layer grows wider due to a lack of
electrons and holes and presents a high impedance path, almost an insulator. The result is
that a high potential barrier is created thus preventing current from flowing through the
semiconductor material.

Reverse Biased Junction Diode showing an Increase in the

Depletion

Fig 1.9a: Diode Reverse Bias

This condition represents a high resistance value to the PN junction and practically zero
current flows through the junction diode with an increase in bias voltage. However, a very
small leakage current does flow through the junction which can be measured in
microamperes, (μA). One final point, if the reverse bias voltage Vr applied to the diode is
increased to a sufficiently high enough value, it will
cause the PN junction to overheat and fail due to the avalanche effect around the junction.
This may cause the diode to become shorted and will result in the flow of maximum circuit
current, and this shown as a step downward slope in the reverse static characteristics curve
below.

Reverse Characteristics Curve for a Junction Diode

Fig 1.9b: Diode Reverse Characteristics

Sometimes this avalanche effect has practical applications in voltage stabilizing circuits
where a series limiting resistor is used with the diode to limit this reverse breakdown current
to a preset maximum value thereby producing a fixed voltage output across the diode. These
types of diodes are commonly known as Zener Diodes

VI CHARACTERISTICS AND THEIR TEMPERATURE DEPENDENCE

Diode terminal characteristics equation for diode junction current:

v

D  I 0 (e
I vT  1)

Where VT = KT/q;
VD_ diode terminal voltage,
Volts
Io _ temperature-dependent saturation current,
µA T _ absolute temperature of p-n junction, K
K _ Boltzmann’s constant 1.38x 10 -
23J/K) q _ electron charge 1.6x10-19 c
 = empirical constant, 1 for Ge and 2 for Si

Fig 1.10: Diode Characteristics

Temperature Effects on Diode

Temperature can have a marked effect on the characteristics of a silicon
semiconductor diode as shown in Fig. 11 It has been found experimentally that the reverse
saturation current Io will just about double in magnitude for every 10°C increase in
temperature.

Fig 1.11 Variation in Diode Characteristics with temperature change

It is not uncommon for a germanium diode with an Io in the order of 1 or 2 A at 25°C to have a
leakage current of 100 A - 0.1 mA at a temperature of 100°C. Typical values of Io for silicon are
much lower than that of germanium for similar power and current levels. The result is that even
at high temperatures the levels of I o for silicon diodes do not reach the same high levels
obtained. For germanium—a very important reason that silicon devices enjoy a significantly
higher level of development and utilization in design. Fundamentally, the open-circuit
equivalent in the reverse bias region is better realized at any temperature with silicon than with
germanium. The increasing levels of I o with temperature account for the lower levels of
threshold voltage, as shown in Fig. 1.11. Simply increase the level of Io in and not rise in diode
current. Of course, the level of TK also will be increase, but the increasing level of Io will
overpower the smaller percent change in TK. As the temperature increases the forward
characteristics are actually becoming more “ideal,”

IDEAL VERSUS PRACTICAL RESISTANCE LEVELS

DC or Static Resistance
The application of a dc voltage to a circuit containing a semiconductor diode will result in
an operating point on the characteristic curve that will not change with time. The resistance of
the diode at the operating point can be found simply by finding the corresponding levels of VD
and ID as shown in Fig. 1.12 and applying the following Equation:

The dc resistance levels at the knee and below will be greater than the resistance levels
obtained for the vertical rise section of the characteristics. The resistance levels in the
reverse-bias region will naturally be quite high. Since ohmmeters typically employ a
relatively constant-current source, the resistance determined will be at a preset current level
(typically, a few mill amperes).
Fig 1.12 Determining the dc resistance of a diode at a particular operating point.

AC or Dynamic Resistance
It is obvious from Eq. 1.3 that the dc resistance of a diode is independent of the shape
of the characteristic in the region surrounding the point of interest. If a sinusoidal rather than dc
input is applied, the situation will change completely. The varying input will move the
instantaneous operating point up and down a region of the characteristics and thus defines a
specific change in current and voltage as shown in Fig. 1.13. With no applied varying signal,
the point of operation would be the Q- point appearing on Fig. 1.13 determined by the applied
dc levels. The designation Q-point is derived from the word quiescent, which means “still or
unvarying.” A straight-line drawn tangent to the curve through the Q-point as shown in Fig. 1.13
will define a particular change in voltage and current that can be used to determine the ac or
dynamic resistance for this region of the diode characteristics. In equation form,

Where Δ Signifies a finite change in the quantity

Fig 1.13: Determining the ac resistance of a diode at a particular operating point.

 DIODE EQUIVALENT CIRCUITS
An equivalent circuit is a combination of elements properly chosen to best represent the
actual terminal characteristics of a device, system, or such in a particular operating region. In
other words, once the equivalent circuit is defined, the device symbol can be removed from a
schematic and the equivalent circuit inserted in its place without severely affecting the actual
behavior of the system. The result is often a network that can be solved using traditional circuit
analysis techniques.

Piecewise-Linear Equivalent Circuit

One technique for obtaining an equivalent circuit for a diode is to approximate the
characteristics of the device by straight-line segments, as shown in Fig. 1.31. The resulting
equivalent circuit is naturally called the piecewise-linear equivalent circuit. It should be obvious
from Fig. 1.31 that the straight-line segments do not result in an exact duplication of the actual
characteristics, especially in the knee region. However, the resulting segments are sufficiently
close to the actual curve to establish an equivalent circuit that will provide an excellent first
approximation to the actual behaviour of the device. The ideal diode is included to establish
that there is only one direction of conduction through the device, and a reverse-bias condition
will result in the open- circuit state for the device. Since a silicon semiconductor, diode does
not reach the conduction state until VD reaches 0.7 V with a forward bias (as shown in Fig.
1.14a), a battery VT opposing the conduction direction must appear in the equivalent circuit as
shown in Fig. 1.14b. The battery simply specifies that the voltage across the device must be
greater than the threshold battery voltage before conduction through the device in the direction
dictated by the ideal diode can be established. When conduction is established, the resistance
of the diode will be the specified value of rav.

Fig: 1.14aDiode piecewise-linear model characteristics

 Fig: 1.14b Diode piecewise-linear model equivalent circuit
The approximate level of rav can usually be determined from a specified operating point on the
specification sheet. For instance, for a silicon semiconductor diode, if IF _ 10 mA (a forward
conduction current for the diode) at VD _ 0.8 V, we know for silicon that a shift of 0.7 V is
required before the characteristics rise.

Fig 1.15 Ideal Diode and its characteristics

Fig 1.16: Diode equivalent circuits(models)

 TRANSITION AND DIFFUSION CAPACITANCE
Electronic devices are inherently sensitive to very high frequencies. Most shunt
capacitive effects that can be ignored at lower frequencies because the reactance XC=1/2πfC
is very large (open- circuit equivalent). This, however, cannot be ignored at very high
frequencies. XC will become sufficiently small due to the high value of f to introduce a low-
reactance “shorting” path. In the p-n semiconductor diode, there are two capacitive effects to
be considered. In the reverse-bias region we have the transition- or depletion region
capacitance (CT), while in the forward-bias region we have the diffusion (CD) or storage
capacitance. Recall that the basic equation for the capacitance of a parallel- plate capacitor is
defined by C=€A/d, where € is the permittivity of the dielectric (insulator) between the plates of
area A separated by a distance d. In the reverse-, bias region there is a depletion region (free
of carriers) that behaves essentially like an insulator between the layers of opposite charge.
Since the depletion width (d) will increase with increased reverse-bias potential, the resulting
transition capacitance will decrease. The fact that the capacitance is dependent on the applied
reverse-bias potential has application in a number of electronic systems. Although the effect
described above will also be present in the forward-bias region, it is over shadowed by a
capacitance effect directly dependent on the rate at which charge is injected into the regions
just outside the depletion region. The capacitive effects described above are represented by a
capacitor in parallel with the ideal diode, as shown in Fig. 1.38. For low- or mid-frequency
applications (except in the power area), however, the capacitor is normally not included in the
diode symbol.

Fig 1.17: Including the effect of the transition or diffusion capacitance on the semiconductor diode

Diode capacitances: The diode exhibits two types of capacitances transition capacitance and
diffusion capacitance.
 Transition capacitance: The capacitance which appears between positive ion layer in n-
region and negative ion layer in p-region.
 Diffusion capacitance: This capacitance originates due to diffusion of charge carriers in
the opposite regions.
The transition capacitance is very small as compared to the diffusion
capacitance. In reverse bias transition, the capacitance is the dominant and
is given by:
 where CT - transition
capacitance A - diode cross
sectional area
W - depletion region width
In forward bias, the diffusion capacitance is the dominant and is given by:

where CD - diffusion capacitance

dQ - change in charge stored in
depletionregion

V - change in applied voltage

- time interval for change in
voltage
g - diode conductance
r - diode resistance
The diffusion capacitance at low frequencies is given by the formula:

The diffusion capacitance at high frequencies is inversely proportional to the frequency and is
given by the formula:

Note: The variation of diffusion capacitance with applied voltage is used in the design of varactor.

BREAK DOWN MECHANISMS

When an ordinary P-N junction diode is reverse biased, normally only very small reverse
saturation current flows. This current is due to movement of minority carriers. It is almost
independent of the voltage applied. However, if the reverse bias is increased, a point is
reached when the junction breaks down and the reverse current increases abruptly. This
current could be large enough to destroy the junction. If the reverse current is limited by means
of a suitable series resistor, the power dissipation at the junction will not be excessive, and the
device may be operated continuously in its
breakdown region to its normal (reverse saturation) level. It is found that for a suitably
designed diode, the breakdown voltage is very stable over a wide range of reverse currents.
This quality gives the breakdown diode many useful applications as a voltage reference
source.

The critical value of the voltage, at which the breakdown of a P-N junction diode occurs, is
called the breakdown voltage. The breakdown voltage depends on the width of the depletion
region, which, in turn, depends on the doping level. The junction offers almost zero
resistance at the breakdown point.

There are two mechanisms by which breakdown can occur at a reverse biased P-N junction:

1. avalanche breakdown and

2. Zener breakdown.

Avalanche breakdown

The minority carriers, under reverse biased conditions, flowing through the junction
acquire a kinetic energy which increases with the increase in reverse voltage. At a sufficiently
high reverse voltage (say 5 V or more), the kinetic energy of minority carriers becomes so
large that they knock out electrons from the covalent bonds of the semiconductor material. As
a result of collision, the liberated electrons in turn liberate more electrons and the current
becomes very large leading to the breakdown of the crystal structure itself. This phenomenon
is called the avalanche breakdown. The breakdown region is the knee of the characteristic
curve. Now the current is not controlled by the junction voltage but rather by the external
circuit.

Zener breakdown

Under a very high reverse voltage, the depletion region expands and the potential
barrier increases leading to a very high electric field across the junction. The electric field will
break some of the covalent bonds of the semiconductor atoms leading to a large number of
free minority carriers, which suddenly increase the reverse current. This is called the Zener
effect. The breakdown occurs at a particular and constant value of reverse voltage called the
breakdown voltage, it is found that Zener breakdown occurs at electric field intensity of about 3
x 107 V/m.
 Fig 1.18: Diode characteristics with breakdown

Either of the two (Zener breakdown or avalanche breakdown) may occur independently,
or both of these may occur simultaneously. Diode junctions that breakdown below 5 V are
caused by Zener effect. Junctions that experience breakdown above 5 V are caused by
avalanche effect. Junctions that breakdown around 5 V are usually caused by combination of
two effects. The Zener breakdown occurs in heavily doped junctions (P-type semiconductor
moderately doped and N-type heavily doped), which produce narrow depletion layers. The
avalanche breakdown occurs in lightly doped junctions, which produce wide depletion layers.
With the increase in junction temperature Zener breakdown voltage is reduced while the
avalanche breakdown voltage increases. The Zener diodes have a negative temperature
coefficient while avalanche diodes have a positive temperature coefficient. Diodes that have
breakdown voltages around 5 V have zero temperature coefficient. The breakdown
phenomenon is reversible and harmless so long as the safe operating temperature is
maintained.
7/20/2020 Electronic Circuits - Diode as a Switch - Tutorialspoint

Diode as a Switch
Diode is a two terminal PN junction that can be used in various applications. One of such
applications is an electrical switch. The PN junction, when forward biased acts as close circuited and
when reverse biased acts as open circuited. Hence the change of forward and reverse biased states
makes the diode work as a switch, the forward being ON and the reverse being OFF state.

Electrical Switches over Mechanical Switches

Electrical switches are a preferred choice over mechanical switches due to the following reasons −
Mechanical switches are prone to oxidation of metals whereas electrical switches don’t.
Mechanical switches have movable contacts.
They are more prone to stress and strain than electrical switches. The
worn and torn of mechanical switches often affect their working.
Hence an electrical switch is more useful than a Mechanical switch.

Working of Diode as a Switch

Whenever a specified voltage is exceeded, the diode resistance gets increased, making the diode
reverse biased and it acts as an open switch. Whenever the voltage applied is below the reference
voltage, the diode resistance gets decreased, making the diode forward biased, and it acts as a
closed switch.
The following circuit explains the diode acting as a switch.
7/20/2020 Electronic Circuits - Diode as a Switch - Tutorialspoint

A switching diode has a PN junction in which P-region is lightly doped and N-region is heavily
doped. The above circuit symbolizes that the diode gets ON when positive voltage forward biases the
diode and it gets OFF when negative voltage reverse biases the diode.

Ringing

As the forward current flows till then, with a sudden reverse voltage, the reverse current flows for
an instance rather than getting switched OFF immediately. The higher the leakage current, the
greater the loss. The flow of reverse current when diode is reverse biased suddenly, may
sometimes create few oscillations, called as ringing.
This ringing condition is a loss and hence should be minimized. To do this, the switching times of the
diode should be understood.

Diode Switching Times

While changing the bias conditions, the diode undergoes a transient response. The response of a
system to any sudden change from an equilibrium position is called as transient response.
The sudden change from forward to reverse and from reverse to forward bias, affects the circuit. The
time taken to respond to such sudden changes is the important criterion to define the
effectiveness of an electrical switch.
The time taken before the diode recovers its steady state is called as Recovery time.
The time interval taken by the diode to switch from reverse biased state to forward biased state
is called as Forward Recovery Time. $tfr $

The time interval taken by the diode to switch from forward biased state to reverse biased
state is called as Reverse Recovery Time.. $tfr$
7/20/2020 Electronic Circuits - Diode as a Switch - Tutorialspoint

To understand this more clearly, let us try to analyze what happens once the voltage is applied to a
switching PN diode.

Carrier Concentration

Minority charge carrier concentration reduces exponentially as seen away from the junction. When the
voltage is applied, due to the forward biased condition, the majority carriers of one side move towards
the other. They become minority carriers of the other side. This concentration will be more at the
junction.
For example, if N-type is considered, the excess of holes that enter into N-type after applying
forward bias, adds to the already present minority carriers of N-type material.
Let us consider few notations.

The majority carriers in P-type holes = Ppo

The majority carriers in N-type electrons = Nno

The minority carriers in P-type electrons = Npo

The majority carriers in N-type holes = Pno

During Forward biased condition − The minority carriers are more near junction and less far
away from the junction. The graph below explains this.
7/20/2020 Electronic Circuits - Diode as a Switch - Tutorialspoint
7/20/2020 Electronic Circuits - Diode as a Switch - Tutorialspoint

Excess minority carrier charge in P-type = Pn − Pno with pno steady state value

Excess minority carrier charge in N-type = Np − Npo with Npo steady state value

During reverse biased condition − Majority carriers doesn’t conduct the current through the junction and
hence don’t participate in current condition. The switching diode behaves as a short circuited for an
instance in reverse direction.

The minority carriers will cross the junction and conduct the current, which is called as Reverse
Saturation Current. The following graph represents the condition during reverse bias.

In the above figure, the dotted line represents equilibrium values and solid lines represent actual
values. As the current due to minority charge carriers is large enough to conduct, the circuit will be ON
until this excess charge is removed.
The time required for the diode to change from forward bias to reverse bias is called Reverse
recovery time. The following graphs explain the diode switching times in detail.
7/20/2020 Electronic Circuits - Diode as a Switch - Tutorialspoint

From the above figure, let us consider the diode current graph.

At t1 the diode is suddenly brought to OFF state from ON state; it is known as Storage time.

Storage time is the time required to remove the excess minority carrier charge. The negative
7/20/2020 Electronic Circuits - Diode as a Switch - Tutorialspoint

current flowing from N to P type material is of a considerable amount during the Storage time. This
negative current is,

−VR
−IR =
R

The next time period is the transition time” from$t2 $to$t3 $

Transition time is the time taken for the diode to get completely to open circuit condition. After t3

diode will be in steady state reverse bias condition. Before t1 diode is under steady state

forward bias condition.

So, the time taken to get completely to open circuit condition is

Reverse recovery time (trr) = Storage time (Ts ) + Transition time (Tt )

Whereas to get to ON condition from OFF, it takes less time called as Forward recovery time.
Reverse recovery time is greater than Forward recovery time. A diode works as a better switch if this
Reverse recovery time is made less.

Definitions

Let us just go through the definitions of the time periods discussed.

Storage time − The time period for which the diode remains in the conduction state even in the
reverse biased state, is called as Storage time.
Transition time − The time elapsed in returning back to the state of non-conduction, i.e. steady
state reverse bias, is called transition time.
Reverse recovery time − The time required for the diode to change from forward bias to
reverse bias is called as Reverse recovery time.
Forward recovery time − The time required for the diode to change from reverse bias to
forward bias is called as Forward recovery time.

Factors that affect diode switching times

There are few factors that affect the diode switching times, such as
Diode Capacitance − The PN junction capacitance changes depending upon the bias conditions.

Diode Resistance − The resistance offered by the diode to change its state.
7/20/2020 Electronic Circuits - Diode as a Switch - Tutorialspoint

Doping Concentration − The level of doping of the diode, affects the diode switching times.

Depletion Width − The narrower the width of the depletion layer, the faster the switching will be.
A Zener diode has narrow depletion region than an avalanche diode, which makes the former
a better switch.

Applications

There are many applications in which diode switching circuits are used, such as − High
speed rectifying circuits
High speed switching circuits
RF receivers
General purpose applications
Consumer applications
Automotive applications
Telecom applications etc.
Rectifiers

Whenever there arises the need to convert an AC to DC power, a rectifier circuit comes for the
rescue. A simple PN junction diode acts as a rectifier. The forward biasing and reverse biasing
conditions of the diode makes the rectification.

Rectification

An alternating current has the property to change its state continuously. This is understood by
observing the sine wave by which an alternating current is indicated. It raises in its positive
direction goes to a peak positive value, reduces from there to normal and again goes to negative
portion and reaches the negative peak and again gets back to normal and goes on.

During its journey in the formation of wave, we can observe that the wave goes in positive and
negative directions. Actually it alters completely and hence the name alternating current.

But during the process of rectification, this alternating current is changed into direct current DC.
The wave which flows in both positive and negative direction till then, will get its direction
restricted only to positive direction, when converted to DC. Hence the current is allowed to flow
only in positive direction and resisted in negative direction, just as in the figure below.

The circuit which does rectification is called as a Rectifier circuit. A diode is used as a rectifier, to
construct a rectifier circuit.

Types of Rectifier circuits

There are two main types of rectifier circuits, depending upon their output. They are
 Half-wave Rectifier
 Full-wave Rectifier
A Half-wave rectifier circuit rectifies only positive half cycles of the input supply whereas a Full-
wave rectifier circuit rectifies both positive and negative half cycles of the input supply.

Half-Wave Rectifier

The name half-wave rectifier itself states that the rectification is done only for half of the cycle. The
AC signal is given through an input transformer which steps up or down according to the usage.
Mostly a step down transformer is used in rectifier circuits, so as to reduce the input voltage.

The input signal given to the transformer is passed through a PN junction diode which acts as a
rectifier. This diode converts the AC voltage into pulsating dc for only the positive half cycles of the
input. A load resistor is connected at the end of the circuit. The figure below shows the circuit of a
half wave rectifier.

Working of a HWR

The input signal is given to the transformer which reduces the voltage levels. The output from
thetransformer is given to the diode which acts as a rectifier. This diode gets ON
conductsforpositive half cycles of input signal. Hence a current flows in the circuit and there will be
a voltagedrop across the load resistor. The diode gets OFFdoesn’t conduct for negative half
cycles andhence the output for negative half cycles will be,iD = 0 and Vo = 0.

Hence, the output is present for positive half cycles of the input voltage only neglecting the
reverse leakage current. This output will be pulsating which is taken acrossthe load resistor.
Waveforms of a HWR
The input and output waveforms are as shown in the following figure.

Hence the output of a half wave rectifier is a pulsating dc. Let us try to analyze the above circuit by
understanding few values which are obtained from the output of half wave rectifier.

Analysis of Half-Wave Rectifier

To analyze a half-wave rectifier circuit, let us consider the equation of input voltage.

Vm is the maximum value of supply voltage.

Let us assume that the diode is ideal.

 The resistance in the forward direction, i.e., in the ON state is Rf.
 The resistance in the reverse direction, i.e., in the OFF state is Rr.
The current in the diode or the load resistorRLis given by

Where

DC Output Current

The average current Idc is given by

Substituting the value of Im ,we get

If RL>>Rf , then
DC Output Voltage

The DC output voltage is given by

If RL>>Rf , then

RMS Current and Voltage

The value of RMS current is given by

RMS voltage across the load is

If RL>>Rf , then
Rectifier Efficiency

Any circuit needs to be efficient in its working for a better output. To calculate the efficiency of a
half wave rectifier, the ratio of the output power to the input power has to be considered.

The rectifier efficiency is defined as

Now

Further

Where

And

From both the expressions ofPac and Pdc,we can write

Percentage rectifier efficiency

Theoretically, the maximum value of rectifier efficiency of a half wave rectifier is 40.6% when

Further, the efficiency may be calculated in the following way

Ripple Factor

The rectified output contains some amount of AC component present in it, in the form of ripples.
This is understood by observing the output waveform of the half wave rectifier. To get a pure dc,
we need to have an idea on this component.

The ripple factor gives the waviness of the rectified output. It is denoted byγ. This can be defined
as the ratio of the effective value of ac component of voltage or current to the direct value or
average value.
Here,

Therefore,

Now,

The ripple factor is also defined as

As the value of ripple factor present in a half wave rectifier is 1.21, it means that the amount of
a.c.present in the output is 121% of the d.c. voltage

Regulation

The current through the load may vary depending upon the load resistance. But even at such
condition, we expect our output voltage which is taken across that load resistor, to be constant.
So, our voltage needs to be regulated even under different load conditions.

The variation of D.C. output voltage with change in D.C. load current is defined as the
Regulation.The percentage regulation is calculated as follows.

The lower the percentage regulation, the better would be the power supply. An ideal power supply
will have a zero percentage regulation.

Transformer Utilization Factor

The D.C. power to be delivered to the load, in a rectifier circuit decides the rating of the
transformer used in a circuit.

So, the transformer utilization factor is defined as

According to the theory of transformer, the rated voltage of the secondary will be

The actual R.M.S. voltage flowing through it will be

Therefore

But

Therefore

Peak Inverse Voltage

A diode when connected in reverse bias, should be operated under a controlled level of voltage. If
that safe voltage is exceeded, the diode gets damaged. Hence it is very important to know about
that maximum voltage.

The maximum inverse voltage that the diode can withstand without being destroyed is called as
Peak Inverse Voltage. In short, PIV.

Here the PIV is nothing but Vm.

Form Factor

This can be understood as the mathematical mean of absolute values of all points on the
waveform. The form factor is defined as the ratio of R.M.S. value to the average value. It is
denoted by F.
Peak Factor

The value of peak in the ripple has to be considered to know how effective the rectification is. The
value of peak factor is also an important consideration. Peak factor is defined as the ratio of peak
value to the R.M.S. value.

Therefore

All these are the important parameters to be considered while studying about a rectifier.
 Electronic Circuits - Full Wave Rectifiers

A Rectifier circuit that rectifies both the positive and negative half cycles can be termed as a full
wave rectifier as it rectifies the complete cycle. The construction of a full wave rectifier can be
made in two types. They are
 Center-tapped Full wave rectifier
 Bridge full wave rectifier
Both of them have their advantages and disadvantages. Let us now go through both of their
construction and working along with their waveforms to know which one is better and why.

Center-tapped Full-Wave Rectifier

A rectifier circuit whose transformer secondary is tapped to get the desired output voltage, using
two diodes alternatively, to rectify the complete cycle is called as a Center-tapped Full wave
rectifier circuit. The transformer is center tapped here unlike the other cases.

The features of a center-tapping transformer are −

 The tapping is done by drawing a lead at the mid-point on the secondary winding. This
winding is split into two equal halves by doing so.
 The voltage at the tapped mid-point is zero. This forms a neutral point.
 The center tapping provides two separate output voltages which are equal in magnitude but
opposite in polarity to each other.
 A number of tapings can be drawn out to obtain different levels of voltages.
The center-tapped transformer with two rectifier diodes is used in the construction of a Center-
tapped full wave rectifier. The circuit diagram of a center tapped full wave rectifier is as shown
below.

Working of a CT- FWR

The working of a center-tapped full wave rectifier can be understood by the above figure. When
the positive half cycle of the input voltage is applied, the point M at the transformer secondary
becomespositive with respect to the point N. This makes the diode D1 forward biased. Hence
currenti1flows through the load resistor from A to B. We now have the positive half cycles in the
output.

When the negative half cycle of the input voltage is applied, the point M at the
transformersecondary becomes negative with respect to the point N. This makes the diode
D2forwardbiased. Hence currenti2flows through the load resistor from A to B. We now have the
positivehalf cycles in the output, even during the negative half cycles of the input.
Waveforms of CT FWR

The input and output waveforms of the center-tapped full wave rectifier are as follows.

From the above figure it is evident that the output is obtained for both the positive and negative
half cycles. It is also observed that the output across the load resistor is in the same direction for
both the half cycles.

Peak Inverse Voltage

As the maximum voltage across half secondary winding is Vm , the whole of the secondaryvoltage
appears across the non-conducting diode. Hence the peak inverse voltage is twice the maximum
voltage across the half-secondary winding, i.e.

Disadvantages

There are few disadvantages for a center-tapped full wave rectifier such as −
 Location of center-tapping is difficult
 The dc output voltage is small
 PIV of the diodes should be high
The next kind of full wave rectifier circuit is the Bridge Full wave rectifier circuit.

Bridge Full-Wave Rectifier

This is such a full wave rectifier circuit which utilizes four diodes connected in bridge form so as
not only to produce the output during the full cycle of input, but also to eliminate the disadvantages
of the center-tapped full wave rectifier circuit.

There is no need of any center-tapping of the transformer in this circuit. Four diodes called D1
D2D3,and D4 are used in constructing a bridge type network so that two of the diodesconduct for
one half cycle and two conduct for the other half cycle of the input supply. The circuit of a bridge
full wave rectifier is as shown in the following figure.

Working of a Bridge Full-Wave Rectifier

The full wave rectifier with four diodes connected in bridge circuit is employed to get a better full
wave output response. When the positive half cycle of the input supply is given, point P
becomespositive with respect to the point Q. This makes the diode D1 and D3 forward biased while
diode D2 and D4 reverse biased. These two diodes will now be in series with the load resistor.

The following figure indicates this along with the conventional current flow in the circuit.

Hence the diodes diode D1and D3 conduct during the positive half cycle of the input supply
toproduce the output along the load resistor. As two diodes work in order to produce the output,
the voltage will be twice the output voltage of the center tapped full wave rectifier.

When the negative half cycle of the input supply is given, point P becomes negative with respect
tothe point Q. This makes the diode D1and D3 reverse biased while D2 and D4 forward biased.
These two diodes will now be in series with the load resistor.

The following figure indicates this along with the conventional current flow in the circuit.

Hence the diodes D2and D4conduct during the negative half cycle of the input supply toproduce
the output along the load resistor. Here also two diodes work to produce the output voltage. The
current flows in the same direction as during the positive half cycle of the input.

Waveforms of Bridge FWR

The input and output waveforms of the center-tapped full wave rectifier are as follows.
From the above figure, it is evident that the output is obtained for both the positive and negative
half cycles. It is also observed that the output across the load resistor is in the same direction for
both the half cycles.

Peak Inverse Voltage

Whenever two of the diodes are being in parallel to the secondary of the transformer, the
maximum secondary voltage across the transformer appears at the non-conducting diodes which
makes the PIV of the rectifier circuit. Hence the peak inverse voltage is the maximum voltage
across the secondary winding, i.e.

Advantages

There are many advantages for a bridge full wave rectifier, such as −
 No need of center-tapping.
 The dc output voltage is twice that of the center-tapper FWR.
 PIV of the diodes is of the half value that of the center-tapped FWR.
 The design of the circuit is easier with better output.
Let us now analyze the characteristics of a full-wave rectifier.

Analysis of Full-Wave Rectifier

Inorder to analyze a full wave rectifier circuit, let us assume the input voltage Vi as,
The current i1 through the load resistor RL is given by

Where

Rf being the diode resistance in ON condition.

Similarly, the current i2 flowing through diode D2 and load resistor RL is given by,

The total current flowing through RL is the sum of the two currents i1 andi2 i.e.
D.C. or Average Current

The average value of output current that a D.C. ammeter will indicate is given by

This is double the value of a half wave rectifier.

D.C. Output Voltage

The dc output voltage across load is given by

Thus the dc output voltage is twice that of a half wave rectifier.

RMS Current

The RMS value of the current is given by

Since current is of the two same form in the two halves

Rectifier Efficiency

The rectifier efficiency is defined as

Now,

And,

Therefore,

The rectifier efficiency can be calculated as follows –

The dc output power,

The ac input power,

Therefore,

Therefore, Percentage Efficiency is

Thus, a full-wave rectifier has efficiency twice that of half wave rectifier.

Ripple Factor

The form factor of rectified output voltage of a full wave rectifier is given by

The ripple factorγis defined asusingaccircuittheory

This is a great improvement over the half wave rectifier’s ripple factor which was 1.21.
Regulation

The dc output voltage is given by

Transformer Utilization Factor

The TUF of a half wave rectifier is 0.287

There are two secondary windings in a center-tapped rectifier and hence the TUF of center-
tapped full wave rectifier is

Half-Wave vs. Full-Wave Rectifier

After having gone through all the values of different parameters of the full wave rectifier, let us just
try to compare and contrast the features of half-wave and full-wave rectifiers.
Filters

The power supply block diagram clearly explains that a filter circuit is needed after the rectifier
circuit. A rectifier helps in converting a pulsating alternating current to direct current, which flows
only in one direction. Till now, we have seen different types of rectifier circuits.

The outputs of all these rectifier circuits contains some ripple factor. We have also observed that
the ripple factor of a half wave rectifier is greater than that of a full wave rectifier.

Why Do We Need Filters?

The ripple in the signal denotes the presence of some AC component. This ac component has to
be completely removed in order to get pure dc output. So, we need a circuit that smoothens the
rectified output into a pure dc signal.

A filter circuit is one which removes the ac component present in the rectified output and allows
the dc component to reach the load.

The following figure shows the functionality of a filter circuit.

A filter circuit is constructed using two main components, inductor and capacitor. We have already
studied in Basic Electronics tutorial that
 An inductor allows dc and blocks ac.
 A capacitor allows ac and blocks dc.
Let us try to construct a few filters, using these two components.

Series Inductor Filter

As an inductor allows dc and blocks ac, a filter called Series Inductor Filter can be constructed
by connecting the inductor in series, between the rectifier and the load. The figure below shows
the circuit of a series inductor filter.

The rectified output when passed through this filter, the inductor blocks the ac components that
are present in the signal, in order to provide a pure dc. This is a simple primary filter.
Shunt Capacitor Filter

As a capacitor allows ac through it and blocks dc, a filter called Shunt Capacitor Filter can be
constructed using a capacitor, connected in shunt, as shown in the following figure.

The rectified output when passed through this filter, the ac components present in the signal are
grounded through the capacitor which allows ac components. The remaining dc components
present in the signal are collected at the output.

The above filter types discussed are constructed using an inductor or a capacitor. Now, let’s try to
use both of them to make a better filter. These are combinational filters.

L-C Filter

A filter circuit can be constructed using both inductor and capacitor in order to obtain a better
output where the efficiencies of both inductor and capacitor can be used. The figure below shows
the circuit diagram of a LC filter.

The rectified output when given to this circuit, the inductor allows dc components to pass through
it, blocking the ac components in the signal. Now, from that signal, few more ac components if any
present are grounded so that we get a pure dc output.

This filter is also called as a Choke Input Filter as the input signal first enters the inductor. The
output of this filter is a better one than the previous ones.

Π- Filter Pifilter

This is another type of filter circuit which is very commonly used. It has capacitor at its input and
hence it is also called as a Capacitor Input Filter. Here, two capacitors and one inductor are
connected in the form of π shaped network. A capacitor in parallel, then an inductor in series,
followed by another capacitor in parallel makes this circuit.

If needed, several identical sections can also be added to this, according to the requirement. The
figure below shows a circuit for π filter (Pi− filter).

Working of a Pi filter

In this circuit, we have a capacitor in parallel, then an inductor in series, followed by another
capacitor in parallel.
 Capacitor C1 −This filter capacitor offers high reactance to dc and low reactance to ac
signal. After grounding the ac components present in the signal, the signal passes to the
inductor for further filtration.
 Inductor L − This inductor offers low reactance to dc components, while blocking the ac
components if any got managed to pass, through the capacitor C1.
 Capacitor C2 − Now the signal is further smoothened using this capacitor so that it allows
any ac component present in the signal, which the inductor has failed to block.
Thus we, get the desired pure dc output at the load.
CAPACITOR FILTER WITH HWR

CAPACITOR FILTER WITH FWR

 1
Ripple Factor 𝑟 =
4√3𝑓CR L

Ripple freqFWR = 2 ripple freqHWR

Nonlinear Wave Shapping

Along with resistors, the non-linear elements like diodes are used in nonlinear wave shaping
circuits to get required altered outputs. Either the shape of the wave is attenuated or the dc level
of the wave is altered in the Non-linear wave shaping.

The process of producing non-sinusoidal output wave forms from sinusoidal input, using non-
linear elements is called as nonlinear wave shaping.

Clipper Circuits

A Clipper circuit is a circuit that rejects the part of the input wave specified while allowing the
remaining portion. The portion of the wave above or below the cut off voltage determined is
clipped off or cut off.

The clipping circuits consist of linear and non-linear elements like resistors and diodes but not
energy storage elements like capacitors. These clipping circuits have many applications as they
are advantageous.
 The main advantage of clipping circuits is to eliminate the unwanted noise present in the
amplitudes.
 These can work as square wave converters, as they can convert sine waves into square
waves by clipping.
 The amplitude of the desired wave can be maintained at a constant level.
Among the Diode Clippers, the two main types are positive and negative clippers. We will
discuss these two types of clippers in the next two chapters.
Positive Clipper Circuits

The Clipper circuit that is intended to attenuate positive portions of the input signal can be termed
as a Positive Clipper. Among the positive diode clipper circuits, we have the following types −
 Positive Series Clipper
 Positive Series Clipper with positive reference voltage Vr
 Positive Series Clipper with negative Vr
 Positive Shunt Clipper
 Positive Shunt Clipper with positive Vr
 Positive Shunt Clipper with negative Vr
Let us discuss each of these types in detail.

Positive Series Clipper

A Clipper circuit in which the diode is connected in series to the input signal and that attenuates
the positive portions of the waveform, is termed as Positive Series Clipper. The following figure
represents the circuit diagram for positive series clipper.

Positive Cycle of the Input − When the input voltage is applied, the positive cycle of the input
makes the point A in the circuit positive with respect to the point B. This makes the diode reverse
biased and hence it behaves like an open switch. Thus the voltage across the load
resistorbecomes zero as no current flows through it and hence Vowill be zero.

Negative Cycle of the Input − The negative cycle of the input makes the point A in the circuit
negative with respect to the point B. This makes the diode forward biased and hence it conducts
like a closed switch. Thus the voltage across the load resistor will be equal to the applied
inputvoltage as it completely appears at the outputVo.

Waveforms

In the above figures, if the waveforms are observed, we can understand that only a portion of the
positive peak was clipped. This is because of the voltage across Vo. But the ideal output was not
meant to be so. Let us have a look at the following figures.
Unlike the ideal output, a bit portion of the positive cycle is present in the practical output due to
the diode conduction voltage which is 0.7v. Hence there will be a difference in the practical and
ideal output waveforms.

Positive Series Clipper with positiveVr

A Clipper circuit in which the diode is connected in series to the input signal and biased
withpositive reference voltageVrand that attenuates the positive portions of the waveform,
istermed asPositive Series Clipper with positiveVr. The following figure represents the
circuitdiagram for positive series clipper when the reference voltage applied is positive.

During the positive cycle of the input the diode gets reverse biased and the reference voltage
appears at the output. During its negative cycle, the diode gets forward biased and conducts like a
closed switch. Hence the output waveform appears as shown in the above figure.

Positive Series Clipper with negativeVr

A Clipper circuit in which the diode is connected in series to the input signal and biased
withnegative reference voltageVrand that attenuates the positive portions of the waveform,
istermed asPositive Series Clipper with negativeVr. The following figure represents the
circuitdiagram for positive series clipper, when the reference voltage applied is negative.
During the positive cycle of the input the diode gets reverse biased and the reference voltage
appears at the output. As the reference voltage is negative, the same voltage with constant
amplitude is shown. During its negative cycle, the diode gets forward biased and conducts like a
closed switch. Hence the input signal that is greater than the reference voltage, appears at the
output.

Positive Shunt Clipper

A Clipper circuit in which the diode is connected in shunt to the input signal and that attenuates
the positive portions of the waveform, is termed as Positive Shunt Clipper. The following figure
represents the circuit diagram for positive shunt clipper.

Positive Cycle of the Input − When the input voltage is applied, the positive cycle of the input
makes the point A in the circuit positive with respect to the point B. This makes the diode forward
biased and hence it conducts like a closed switch. Thus the voltage across the load
resistorbecomes zero as no current flows through it and hence Vowill be zero.

Negative Cycle of the Input − The negative cycle of the input makes the point A in the circuit
negative with respect to the point B. This makes the diode reverse biased and hence it behaves
like an open switch. Thus the voltage across the load resistor will be equal to the applied
inputvoltage as it completely appears at the output Vo.
Waveforms

In the above figures, if the waveforms are observed, we can understand that only a portion of
thepositive peak was clipped. This is because of the voltage acrossVo. But the ideal output was
notmeant to be so. Let us have a look at the following figures.

Unlike the ideal output, a bit portion of the positive cycle is present in the practical output due to
the diode conduction voltage which is 0.7v. Hence there will be a difference in the practical and
ideal output waveforms.

Positive Shunt Clipper with positiveVr

A Clipper circuit in which the diode is connected in shunt to the input signal and biased with
positivereference voltage Vr and that attenuates the positive portions of the waveform, is termed
asPositive Shunt Clipper with positiveVr. The following figure represents the circuit diagram
forpositive shunt clipper when the reference voltage applied is positive.

During the positive cycle of the input the diode gets forward biased and nothing but the reference
voltage appears at the output. During its negative cycle, the diode gets reverse biased and
behaves as an open switch. The whole of the input appears at the output. Hence the output
waveform appears as shown in the above figure.
Positive Shunt Clipper with negative

A Clipper circuit in which the diode is connected in shunt to the input signal and biased
withnegative reference voltageVrand that attenuates the positive portions of the waveform,
istermed asPositive Shunt Clipper with negativeVr.
The following figure represents the circuit diagram for positive shunt clipper, when the reference
voltage applied is negative.

During the positive cycle of the input, the diode gets forward biased and the reference voltage
appears at the output. As the reference voltage is negative, the same voltage with constant
amplitude is shown. During its negative cycle, the diode gets reverse biased and behaves as an
open switch. Hence the input signal that is greater than the reference voltage, appears at the
output.
Negative Clipper Circuits

The Clipper circuit that is intended to attenuate negative portions of the input signal can be termed
as a Negative Clipper. Among the negative diode clipper circuits, we have the following types.
 Negative Series Clipper
 Negative Series Clipper with positiveVr reference voltage
 Negative Series Clipper with negative Vr
 Negative Shunt Clipper
 Negative Shunt Clipper with positive Vr
 Negative Shunt Clipper with negative Vr
Let us discuss each of these types in detail.

Negative Series Clipper

A Clipper circuit in which the diode is connected in series to the input signal and that attenuates
the negative portions of the waveform, is termed as Negative Series Clipper. The following figure
represents the circuit diagram for negative series clipper.

Positive Cycle of the Input − When the input voltage is applied, the positive cycle of the input
makes the point A in the circuit positive with respect to the point B. This makes the diode forward
biased and hence it acts like a closed switch. Thus the input voltage completely appears across
theload resistor to produce the output Vo.

Negative Cycle of the Input − The negative cycle of the input makes the point A in the circuit
negative with respect to the point B. This makes the diode reverse biased and hence it acts like
anopen switch. Thus the voltage across the load resistor will be zero making Vo zero.

Waveforms

In the above figures, if the waveforms are observed, we can understand that only a portion of the
negative peak was clipped. This is because of the voltage acrossVo. But the ideal output was not
meant to be so. Let us have a look at the following figures.
Unlike the ideal output, a bit portion of the negative cycle is present in the practical output due to
the diode conduction voltage which is 0.7v. Hence there will be a difference in the practical and
ideal output waveforms.

Negative Series Clipper with positive Vr

A Clipper circuit in which the diode is connected in series to the input signal and biased with
positive reference voltage Vr and that attenuates the negative portions of the waveform, is termed
as Negative Series Clipper with positiveVr. The following figure represents the circuit diagram
for negative series clipper when the reference voltage applied is positive.

During the positive cycle of the input, the diode starts conducting only when the anode voltage
value exceeds the cathode voltage value of the diode. As the cathode voltage equals the
reference voltage applied, the output will be as shown.

Negative Series Clipper with negativeVr

A Clipper circuit in which the diode is connected in series to the input signal and biased with
negative reference voltage Vr and that attenuates the negative portions of the waveform, is termed
as Negative Series Clipper with negative Vr. The following figure represents the circuit diagram
for negative series clipper, when the reference voltage applied is negative.
During the positive cycle of the input the diode gets forward biased and the input signal appears at
the output. During its negative cycle, the diode gets reverse biased and hence will not conduct.
But the negative reference voltage being applied, appears at the output. Hence the negative cycle
of the output waveform gets clipped after this reference level.

Negative Shunt Clipper

A Clipper circuit in which the diode is connected in shunt to the input signal and that attenuates
the negative portions of the waveform, is termed as Negative Shunt Clipper. The following figure
represents the circuit diagram for negative shunt clipper.

Positive Cycle of the Input − When the input voltage is applied, the positive cycle of the input
makes the point A in the circuit positive with respect to the point B. This makes the diode reverse
biased and hence it behaves like an open switch. Thus the voltage across the load resistor equals
the applied input voltage as it completely appears at the output Vo.

Negative Cycle of the Input − The negative cycle of the input makes the point A in the circuit
negative with respect to the point B. This makes the diode forward biased and hence it conducts
like a closed switch. Thus the voltage across the load resistor becomes zero as no current flows
through it.
Waveforms

In the above figures, if the waveforms are observed, we can understand that just a portion of the
negative peak was clipped. This is because of the voltage across Vo. But the ideal output was not
meant to be so. Let us have a look at the following figures.

Unlike the ideal output, a bit portion of the negative cycle is present in the practical output due to
the diode conduction voltage which is 0.7v. Hence there will be a difference in the practical and
ideal output waveforms.

Negative Shunt Clipper with positive Vr

A Clipper circuit in which the diode is connected in shunt to the input signal and biased with
positive reference voltage Vr and that attenuates the negative portions of the waveform, is termed
as Negative Shunt Clipper with positive Vr. The following figure represents the circuit diagram
for negative shunt clipper when the reference voltage applied is positive.

During the positive cycle of the input the diode gets reverse biased and behaves as an open
switch. So whole of the input voltage, which is greater than the reference voltage applied, appears
at the output. The signal below reference voltage level gets clipped off.

During the negative half cycle, as the diode gets forward biased and the loop gets completed, no
output is present.
Negative Shunt Clipper with negative Vr

A Clipper circuit in which the diode is connected in shunt to the input signal and biased with
negative reference voltage Vr and that attenuates the negative portions of the waveform, is termed
as Negative Shunt Clipper with negative Vr. The following figure represents the circuit diagram
for negative shunt clipper, when the reference voltage applied is negative.

During the positive cycle of the input the diode gets reverse biased and behaves as an
openswitch. So whole of the input voltage, appears at the output Vo. During the negative half
cycle,the diode gets forward biased. The negative voltage up to the reference voltage, gets at the
output and the remaining signal gets clipped off.

Two-way Clipper

This is a positive and negative clipper with a reference voltage Vr. The input voltage is clipped
two-way both positive and negative portions of the input waveform with two reference voltages.
Forthis, two diodes D1 and D2 along with two reference voltages Vr1 and Vr2 are connected in the
circuit.

This circuit is also called as a Combinational Clipper circuit. The figure below shows the circuit
arrangement for a two-way or a combinational clipper circuit along with its output waveform.

During the positive half of the input signal, the diode D1 conducts making the reference voltageVr1
appear at the output. During the negative half of the input signal, the diode D2 conducts making
the reference voltageVr1 appear at the output. Hence both the diodes conduct alternatively to clip
the output during both the cycles. The output is taken across the load resistor.

With this, we are done with the major clipper circuits. Let us go for the clamper circuits in the next
chapter.
Clamper Circuits

A Clamper Circuit is a circuit that adds a DC level to an AC signal. Actually, the positive and
negative peaks of the signals can be placed at desired levels using the clamping circuits. As the
DC level gets shifted, a clamper circuit is called as a Level Shifter.

Clamper circuits consist of energy storage elements like capacitors. A simple clamper circuit
comprises of a capacitor, a diode, a resistor and a dc battery if required.

Clamper Circuit

A Clamper circuit can be defined as the circuit that consists of a diode, a resistor and a capacitor
that shifts the waveform to a desired DC level without changing the actual appearance of the
applied signal.

In order to maintain the time period of the wave form, the tau must be greater than, half the time
period discharging time of the capacitor should be slow.

Where
 R is the resistance of the resistor employed
 C is the capacitance of the capacitor used
The time constant of charge and discharge of the capacitor determines the output of a clamper
circuit.
 In a clamper circuit, a vertical shift of upward or downward takes place in the output
waveform with respect to the input signal.
 The load resistor and the capacitor affect the waveform. So, the discharging time of the
capacitor should be large enough.
The DC component present in the input is rejected when a capacitor coupled network is used as a
capacitor blocks dc. . Hence when dc needs to be restored, clamping circuit is used.

Types of Clampers

There are few types of clamper circuits, such as

 Positive Clamper
 Positive clamper with positiveVr
 Positive clamper with negativeVr
 Negative Clamper
 Negative clamper with positiveVr
 Negative clamper with negativeVr
Let us go through them in detail.

Positive Clamper Circuit

A Clamping circuit restores the DC level. When a negative peak of the signal is raised above to
the zero level, then the signal is said to be positively clamped.
A Positive Clamper circuit is one that consists of a diode, a resistor and a capacitor and that shifts
the output signal to the positive portion of the input signal. The figure below explains the
construction of a positive clamper circuit.

Initially when the input is given, the capacitor is not yet charged and the diode is reverse biased.
The output is not considered at this point of time. During the negative half cycle, at the peak value,
the capacitor gets charged with negative on one plate and positive on the other. The capacitor
isnow charged to its peak value Vm. The diode is forward biased and conducts heavily.

During the next positive half cycle, the capacitor is charged to positive Vm while the diode gets
reverse biased and gets open circuited. The output of the circuit at this moment will be

Hence the signal is positively clamped as shown in the above figure. The output signal changes
according to the changes in the input, but shifts the level according to the charge on the capacitor,
as it adds the input voltage.

Positive Clamper with Positive Vr

A Positive clamper circuit if biased with some positive reference voltage, that voltage will be added
to the output to raise the clamped level. Using this, the circuit of the positive clamper with positive
reference voltage is constructed as below.

During the positive half cycle, the reference voltage is applied through the diode at the output and
as the input voltage increases, the cathode voltage of the diode increase with respect to the
anode voltage and hence it stops conducting. During the negative half cycle, the diode gets
forward biased and starts conducting. The voltage across the capacitor and the reference voltage
together maintain the output voltage level.

Positive Clamper with NegativeVr

A Positive clamper circuit if biased with some negative reference voltage, that voltage will be
added to the output to raise the clamped level. Using this, the circuit of the positive clamper with
positive reference voltage is constructed as below.

During the positive half cycle, the voltage across the capacitor and the reference voltage together
maintain the output voltage level. During the negative half-cycle, the diode conducts when the
cathode voltage gets less than the anode voltage. These changes make the output voltage as
shown in the above figure.

Negative Clamper

A Negative Clamper circuit is one that consists of a diode, a resistor and a capacitor and that
shifts the output signal to the negative portion of the input signal. The figure below explains the
construction of a negative clamper circuit.

During the positive half cycle, the capacitor gets charged to its peak value Vm. The diode isforward
biased and conducts. During the negative half cycle, the diode gets reverse biased and gets open
circuited. The output of the circuit at this moment will be
Hence the signal is negatively clamped as shown in the above figure. The output signal changes
according to the changes in the input, but shifts the level according to the charge on the capacitor,
as it adds the input voltage.

Negative clamper with positive Vr

A Negative clamper circuit if biased with some positive reference voltage, that voltage will be
added to the output to raise the clamped level. Using this, the circuit of the negative clamper with
positive reference voltage is constructed as below.

Though the output voltage is negatively clamped, a portion of the output waveform is raised to the
positive level, as the applied reference voltage is positive. During the positive half-cycle, the diode
conducts, but the output equals the positive reference voltage applied. During the negative half
cycle, the diode acts as open circuited and the voltage across the capacitor forms the output.
Negative Clamper with Negative Vr

A Negative clamper circuit if biased with some negative reference voltage, that voltage will be
added to the output to raise the clamped level. Using this, the circuit of the negative clamper with
negative reference voltage is constructed as below.

The cathode of the diode is connected with a negative reference voltage, which is less than that of
zero and the anode voltage. Hence the diode starts conducting during positive half cycle, before
the zero voltage level. During the negative half cycle, the voltage across the capacitor appears at
the output. Thus the waveform is clamped towards the negative portion.

Applications

There are many applications for both Clippers and Clampers such as

Clippers
 Used for the generation and shaping of waveforms
 Used for the protection of circuits from spikes
 Used for amplitude restorers
 Used as voltage limiters
 Used in television circuits
 Used in FM transmitters
Clampers
 Used as direct current restorers
 Used to remove distortions
 Used as voltage multipliers
 Used for the protection of amplifiers
 Used as test equipment
 Used as base-line stabilizer
 UNIT II
BIPOLAR JUNCTION TRANSISTOR
INTRODUCTION
A bipolar junction transistor (BJT) is a three terminal device in which operation
depends on the interaction of both majority and minority carriers and hence the
name bipolar. The BJT is analogues to vacuum triode and is comparatively
smaller in size. It is used as amplifier and oscillator circuits, and as a switch in
digital circuits. It has wide applications in computers, satellites and other modern
communication systems.

CONSTRUCTION OF BJT AND ITS SYMBOLS

The Bipolar Transistor basic construction consists of two PN-junctions
producing three connecting terminals with each terminal being given a name to
identify it from the other two. These three terminals are known and labelled as the
Emitter ( E ), the Base ( B ) and the Collector ( C ) respectively. There are two
basic types of bipolar transistor construction, PNP and NPN, which basically
describes the physical arrangement of the P-type and N-type semiconductor
materials from which they are made.

Transistors are three terminal active devices made from different semiconductor
materials that can act as either an insulator or a conductor by the application of a
small signal voltage. The transistor's ability to change between these two states
enables it to have two basic functions: "switching" (digital electronics) or
"amplification" (analogue electronics). Then bipolar transistors have the ability to
operate within three different regions:

 1. Active Region - the transistor operates as an amplifier and Ic = β.Ib

 2. Saturation - the transistor is "fully-ON" operating as a switch and Ic =
I(saturation)
 3. Cut-off - the transistor is "fully-OFF" operating as a switch and Ic = 0

Bipolar Transistors are current regulating devices that control the amount of
current flowing through them in proportion to the amount of biasing voltage
applied to their base terminal acting like a current-controlled switch. The
principle of operation of the two transistor types PNP and NPN, is exactly the
same the only difference being in their biasing and the polarity of the power
supply for each type(fig 1).
Bipolar Transistor Construction

Fig 3.1 Bipolar Junction Transistor Symbol

The construction and circuit symbols for both the PNP and NPN bipolar transistor are
given above with the arrow in the circuit symbol always showing the direction of
"conventional current flow" between the base terminal and its emitter terminal. The
direction of the arrow always points from the positive P-type region to the negative N-
type region for both transistor types, exactly the same as for the standard diode
symbol.
TRANSISTOR CURRENT COMPONENTS:

Fig 3.2 Bipolar Junction Transistor Current Components

The above fig 3.2 shows the various current components, which flow across the forward
biased emitter junction and reverse- biased collector junction. The emitter current I E
consists of hole current IPE (holes crossing from emitter into base) and electron current I nE
(electrons crossing from base into emitter).The ratio of hole to electron currents, IpE / InE ,
crossing the emitter junction is proportional to the ratio of the conductivity of the p material
to that of the n material. In a transistor, the doping of that of the emitter is made much
larger than the doping of the base. This feature ensures (in p-n-p transistor) that the emitter
current consists an almost entirely of holes. Such a situation is desired since the current
which results from electrons crossing the emitter junction from base to emitter do not
contribute carriers, which can reach the collector.

Not all the holes crossing the emitter junction J E reach the the collector junction JC
Because some of them combine with the electrons in n-type base. If IpC is hole current at
junction JC there must be a bulk recombination current ( I PE- IpC ) leaving the base.
Actually, electrons enter the base region through the base lead to supply those charges,
which have been lost by recombination with the holes injected in to the base across J E. If
the emitter were open circuited so that IE=0 then IpC would be zero. Under these
circumstances, the base and collector current I C would equal the reverse saturation current
ICO. If IE≠0 then
IC= ICO- IpC
For a p-n-p transistor, ICO consists of holes moving across JC from left to right (base to
collector) and electrons crossing JC in opposite direction. Assumed referenced direction for
ICO i.e. from right to left, then for a p-n-p transistor, ICO is negative. For an n-p-n transistor,
ICO is positive.The basic operation will be described using the pnp transistor. The operation
of the pnp transistor is exactly the same if the roles played by the electron and hole are
interchanged.

One p-n junction of a transistor is reverse-biased, whereas the other is forward-biased.

a. Forward-biased junction of a pnp transistor

3.3 b) Reverse-biased junction of a pnp transistor

 c. Both biasing potentials have been applied to a pnp transistor and resulting
majority and minority carrier flows indicated.

Majority carriers (+) will diffuse across the forward-biased p-n junction into the n-

type material. A very small number of carriers (+) will through n-type material

to the base terminal.

Resulting IB is typically in order of microamperes.

The large number of majority carriers will diffuse across the reverse-biased
junction into the p-type material connected to the collector terminal

Applying KCL to the transistor :

IE = I C + IB

The comprises of two components – the majority and minority carriers

IC = ICmajority + ICOminority

ICO – IC current with emitter terminal open and is called

leakage current Various parameters which relate the

current components is given below Emitter efficiency:

currentofinjectedcar riersatJ E

totalemitt ercurrent

I PE I
  pE
I pE  InE I nE
 Transport Factor:

injectedca
 *
rriercurrentreachin
gJC injectedca
rrierncurrentatJ E
I pC
*
I nE

Large signal current gain:

The ratio of the negative of collector current increment to the emitter current
change from zero (cut- off)to IE the large signal current gain of a common base
transistor.

 (IC  ICO )

IE

Since IC and IE have opposite signs, then α, as defined, is always positive.

Typically numerical valuesof α lies in the range of 0.90 to 0.995

I pC I pC I pE
  *
IE InE I E    *


The transistor alpha is the product of the transport factor and the emitter
efficiency. This statement assumes that the collector multiplication ratio  * is
unity.  * is the ratio of total current crossing JC to hole arriving at the junction.

Bipolar Transistor Configurations

As the Bipolar Transistor is a three terminal device, there are basically three
possible ways to connect it within an electronic circuit with one terminal being
common to both the input and output. Each method of connection responding
differently to its input signal within a circuit as the static characteristics of the
transistor vary with each circuit arrangement.

 1. Common Base Configuration - has Voltage Gain but no Current Gain.

 2 Common Emitter Configuration - has both Current and Voltage Gain.
 3. Common Collector Configuration - has Current Gain but no Voltage Gain.
 COMMON-BASE CONFIGURATION

Common-base terminology is derived from the fact that the : base is common to both input
and output of t configuration. base is usually the terminal closest to or at ground potential.
Majority carriers can cross the reverse-biased junction because the injected majority
carriers will appear as minority carriers in the n-type material. All current directions will
refer to conventional (hole) flow and the arrows in all electronic symbols have a direction
defined by this convention.

Note that the applied biasing (voltage sources) are such as to establish current in the
direction indicated for each branch.

Fig 3.4 CB Configuration

To describe the behavior of common-base amplifiers requires two set of characteristics:

1. Input or driving point characteristics.

2. Output or collector characteristics

The output characteristics has 3 basic regions:

 Active region –defined by the biasing arrangements

 Cutoff region – region where the collector current is 0A
  Saturation region- region of the characteristics to the left of VCB = 0V

Fig 3.5 CB Input-Output Characteristics

The curves (output characteristics) clearly indicate that a first approximation to the
relationship between IE and IC in the active region is given by

IC ≈IE

Once a transistor is in the ‘on’ state, the base-emitter voltage will be assumed to beVBE =
0.7V
In the dc mode the level of IC and IE due to the majority carriers are related by a quantity
called alpha
= αdc

IC = IE + ICBO

It can then be summarize to IC = IE (ignore ICBO due to small value)

For ac situations where the point of operation moves on the characteristics curve,
an ac alpha defined by αac

Alpha a common base current gain factor that shows the efficiency by calculating
the current percent from current flow from emitter to collector. The value of  is
typical from 0.9 ~ 0.998.

Biasing: Proper biasing CB configuration in active region by approximation I C  IE (IB  0

uA)

Fig 3.6 CE Configuration

 TRANSISTOR AS AN AMPLIFIER

Fig 3.7 Basic Transistor Amplifier Circuit

Common-Emitter Configuration

It is called common-emitter configuration since : emitter is common or reference to both

input and output terminals.emitter is usually the terminal closest to or at ground potential.

Almost amplifier design is using connection of CE due to the high gain for current and
voltage.

Two set of characteristics are necessary to describe the behavior for CE ;input (base
terminal) and output (collector terminal) parameters.

Proper Biasing common-emitter configuration in active region

Fig 3.8 CE Configuration

IB is microamperes compared to miliamperes of I C.

IB will flow when VBE > 0.7V for silicon and 0.3V for

germanium Before this value IB is very small and no IB.

Base-emitter junction is forward bias Increasing VCE will reduce IB for different values.

Fig 3.9a Input characteristics for common-emitter npn transistor

Fig 3.9b Output characteristics for common-emitter npn transistor

For small VCE (VCE < VCESAT, IC increase linearly with

increasing of VCE VCE > VCESAT IC not totally depends on VCE

 constant IC

IB(uA) is very small compare to IC (mA). Small increase in IB cause big

increase in IC IB=0 A  ICEO occur.

Noticing the value when IC=0A. There is still some value of current flows.

Beta () or amplification factor

The ratio of dc collector current (IC) to the dc base current (IB) is dc beta (dc ) which is
dc current gain where IC and IB are determined at a particular operating point, Q-point
(quiescent point). It’s define by the following equation:

30 < dc < 300  2N3904

On data sheet, dc=hfe with h is derived from ac hybrid equivalent cct. FE are derived from
forward- current amplification and common-emitter configuration respectively.
For ac conditions, an ac beta has been defined as the changes of collector current (I C)
compared to the changes of base current (I B) where IC and IB are determined at operating
point. On data sheet,
ac = hfe It can defined by the following equation:

From output characteristics of commonemitter configuration, find ac and dc with

an Operating point at IB=25 A and VCE =7.5V

Relationship analysis between α and β

COMMON – COLLECTOR CONFIGURATION

Also called emitter-follower (EF). It is called common-emitter configuration since both the
signal source and the load share the collector terminal as a common connection point.The
output voltage is obtained at emitter terminal. The input characteristic of common-collector
configuration is
 similar with common-emitter. configuration.Common-collector circuit configuration is
provided with the load resistor connected from emitter to ground. It is used primarily for
impedance- matching purpose since it has high input impedance and low output
impedance.

Fig 3.10 CC Configuration

For the common-collector configuration, the output characteristics are a plot of IE vs VCE for a
range

of values of I

B.

Fig 3.11 Output Characteristics of CC Configuration for npn Transistor

Limits of opearation

Many BJT transistor used as an amplifier. Thus it is important to notice the limits of
operations.At least 3 maximum values is mentioned in data sheet.

There are:

a) Maximum power dissipation at collector: PCmax or PD

b) Maximum collector-emitter voltage:

VCEmax sometimes named as VBR (CEO) or VCEO.

c) Maximum collector current: ICmax

There are few rules that need to be followed for BJT transistor used as an amplifier. The
rules are: transistor need to be operate in active region!

IC < ICmax

PC <

PCmax

Note: VCE is at maximum and IC is at minimum (ICMAX=ICEO) in the cutoff region. IC is

at maximum and VCE is at minimum (VCE max = Vcesat = VCEO) in the saturation region.
The transistor
operates in the active region between saturation and cutoff.
Refer to the fig. Example; A derating factor of 2mW/°C indicates the power dissipation is
reduced 2mW each degree centigrade increase of temperature.

Step1:

The maximum collector power dissipation,

PD=ICMAX x VCEmax= 18m x 20 = 360 mW

Step 2:

At any point on the characteristics the product of and must be equal to 360

mW. Ex. 1. If choose ICmax= 5 mA, substitute into the (1), we get

VCEmaxICmax= 360 mW

VCEmax(5

m)=360/5=7.2 V
 Ex.2. If choose VCEmax=18 V, substitute into (1),

we get VCEmaxICmax= 360 mW

(10) ICMAX=360m/18=20 mA

Derating PDmax

PDMAX is usually specified at 25°C.

The higher temperature goes, the less is PDMAX

Example;A derating factor of 2mW/°C indicates the power dissipation is reduced 2mW
each degree centigrade increase of temperature.

BJT HYBRID MODEL

Small signal low frequency transistor Models:

All the transistor amplifiers are two port networks having two voltages and two currents. The
positive directions of voltages and currents are shown in fig. 1.

Fig. 1

A two-port network is represented by four external variables: voltage V 1 and current I1 at the
input port, and voltage V2 and current I2 at the output port, so that the two-port network can be
treated as a black box modeled by the relationships between the four variables,V 1,V2, I1,I2 . Out
of four variables two can be selected as are independent variables and two are dependent
variables.The dependent variables can be expressed interns of independent variables. This
leads to various two port parameters out of which the following three are important:

1. Impedance parameters (z-parameters)

2. Admittance parameters (y-parameters)
3. Hybrid parameters (h-parameters)
z-parameters

A two-port network can be described by z-parameters as

In matrix form, the above equation can be rewritten as

Where

Input impedance with output port open circuited

Reverse transfer impedance with input port open circuited

Forward transfer impedance with output port open circuited

Output impedance with input port open circuited

Y-parameters

A two-port network can be described by Y-parameters as

In matrix form, the above equation can be rewritten as

 Input admittance with output port short circuited

Reverse transfer admittance with input port short circuited

Forward transfer admittance with output port short circuited

Output admittance with input port short circuited

Hybrid parameters (h-parameters)

If the input current I1 and output voltage V2 are taken as independent variables, the
dependent variables V1 and I2 can be written as

Where h11, h12, h21, h22 are called as hybrid parameters.

Input impedence with o/p port short circuited

 Reverse voltage transfer ratio with i/p port open circuited

Forward voltage transfer ratio with o/p port short circuited

output impedence with i/p port open

circuited THE HYBRID MODEL FOR TWO

PORT NETWORK:

Based on the definition of hybrid parameters the mathematical model for two pert networks
known as h-parameter model can be developed. The hybrid equations can be written as:

(The following convenient alternative subscript notation is

recommended by the IEEE Standards:
I =11= input o = 22 = output

f =21 = forward transfer r = 12 = reverse transfer)

We may now use the four h parameters to construct a mathematical model of the device of
Fig.(1). The hybrid circuit for any device indicated in Fig.(2). We can verify that the model of
Fig.(2) satisfies above equations by writing Kirchhoff'svoltage and current laws for input and
output ports.
If these parameters are specified for a particular configuration, then suffixes e,b or c are also
included,
e.g. hfe ,h ib are h parameters of common emitter and common collector amplifiers

Using two equations the generalized model of the amplifier can be drawn as shown in fig. 2.

Fig.
2
TRANSISTOR HYBRID MODEL:
The hybrid model for a transistor amplifier can be derived as follow:

Let us consider CE configuration as show in fig. 3. The variables, iB, iC ,vC, and vB
represent total instantaneous currents and voltages i B and vC can be taken as
independent variables and vB, IC as
dependent variables.
Fig. 3

VB = f1 (iB

,vC ) IC = f2

(iB ,vC).

Using Taylor 's series expression, and neglecting higher order terms we obtain.

The partial derivatives are taken keeping the collector voltage or base current constant. The Δ vB, Δ
vC, Δ iB, Δ iC represent the small signal (incremental) base and collector current and voltage and
can be represented as vB, iC, iB ,vC

The model for CE configuration is shown in fig. 4.

Fig. 4

To determine the four h-parameters of transistor amplifier, input and output characteristic are
used. Input characteristic depicts the relationship between input voltage and input current with
output voltage as parameter. The output characteristic depicts the relationship between output
voltage and output current with input current as parameter. Fig. 5, shows the output
characteristics of CE amplifier.

Fig. 5

The current increments are taken around the quiescent point Q which corresponds to i B = IB
and to the collector voltage VCE = VC

The value of hoe at the quiescent operating point is given by the slope of the output
characteristic at the operating point (i.e. slope of tangent AB).
hie is the slope of the appropriate input on fig. 6, at the operating point (slope of tangent EF at Q).

Fig. 6

A vertical line on the input characteristic represents constant base current. The parameter
hre can be obtained from the ratio (VB2– V B1 ) and (VC2– V C1 ) for at Q.

Typical CE h-parametersof transistor 2N1573 are given below:

hie = 1000 ohm.

hre = 2.5 * 10 –4
hfe = 50
hoe = 25 A / V

ANALYSIS OF A TRANSISTOR AMPLIFIER USING H-PARAMETERS:

To form a transistor amplifier it is only necessary to connect an external load and signal
source as indicated in fig. 1 and to bias the transistor properly.
Fig. 1

Consider the two-port network of CE amplifier. RS is the source resistance and Z L is the load
impedence h-parameters are assumed to be constant over the operating range. The ac
equivalent circuit is shown in fig. 2. (Phasor notations are used assuming sinusoidal voltage
input). The quantities of interest are the current gain, input impedence, voltage gain, and
output impedence.

Current gain:

For the transistor amplifier stage, Ai is defined as the ratio of output to input currents.

Input impedence:

The impedence looking into the amplifier input terminals ( 1,1' ) is the input impedance Z i
Voltage gain:

The ratio of output voltage to input voltage gives the gain of the transistors.

Output Admittance:

It is defined as
Av is the voltage gain for an ideal voltage source (Rv = 0).

Consider input source to be a current source IS in parallel with a resistance RS as shown in fig. 3.

Fig. 3

In this case, overall current gain AIS is defined as

h-parameters
To analyze multistage amplifier the h-parameters of the transistor used are obtained from
manufacture
data sheet. The manufacture data sheet usually provides h-parameter in CE configuration.
These parameters may be converted into CC and CB values. For example fig. 4 hrc in terms
of CE parameter can be obtained as follows.

Fig. 4

For CE transistor

configuaration Vbe = hie Ib +

hre Vce

Ic = h fe Ib + hoe Vce

The circuit can be redrawn like CC transistor configuration as shown

in fig. 5. Vbc = hie Ib + hrc Vec

Ic = hfe Ib + hoe Vec

hybrid model for transistor in three different configurations

Typical h-parameter values for a transistor
Parameter CE CC CB
hi 1100 Ω 1100 Ω 22 Ω
hr 2.5 × 10-4 1 3 × 10-4
hf 50 -51 -0.98
ho 25 µA/V 25 µA/V 0.49 µA/V

Analysis of a Transistor amplifier circuit using h-parameters

A transistor amplifier can be constructed by connecting an external load and signal
source and biasing the transistor properly.
 Fig.1.4 Basic Amplifier Circuit

The two port network of Fig. 1.4 represents a transistor in any one of its configuration.
It is assumed that h-parameters remain constant over the operating range.The input is
sinusoidal and I1,V- 1,I2 and V2 are phase quantities

Fig. 1.5 Transistor replaced by its Hybrid Model

Current Gain or Current Amplification (Ai)

For transistor amplifier the current gain Ai is defined as the ratio of output current to
input current,i.e,
Ai =IL /I1 = -I2 / I1
From the circuit of Fig
I2= hf I1 + hoV2

Substituting V2 = ILZL = -

I2ZL

I2= hf I1- I2ZL ho

 I2 + I2ZL ho = hf

I1 I2( 1+ ZL ho) =

h f I1

Ai = -I2 / I1 = - hf / ( 1+ ZL ho)

Therefore,

Ai = - hf / ( 1+ ZL ho)

Input Impedence (Zi)

In the circuit of Fig , RS is the signal source resistance .The impedence seen when looking
into the amplifier terminals (1,1 ’) is the amplifier input impedence Z i,

Zi = V1 / I1

From the input circuit of Fig V1 = hi I1 +

hrV2 Zi = ( hi I1 + hrV2) / I1

= h i + h r V 2 / I1

Substituting

V2 = -I2 ZL = A1I1ZL

Zi = hi + hr A1I1ZL / I1

= hi + hr A1ZL

Substituting for

Ai

Zi = hi - hf hr ZL / (1+ hoZL)

= hi - hf hr ZL / ZL(1/ZL+ ho)

Taking the Load admittance as YL

=1/ ZL Zi = hi - hf hr / (YL + ho)

Voltage Gain or Voltage Gain Amplification Factor(Av)

The ratio of output voltage V2 to input voltage V1 give the voltage gain of the

transistor i.e, Av = V2 / V1

Substituting

V2 = -I2 ZL = A1I1ZL

Av = A1I1ZL / V1 = AiZL / Zi

Output Admittance (Yo)

Yo is obtained by setting VS to zero, ZL to infinity and by driving the output terminals from a
generator V2. If the current V2 is I2 then Yo= I2/V2 with VS=0 and RL= ∞.

From the circuit of fig

I2= hf I1 + hoV2

Dividing by V2,

I2 / V2 = hf I1/V2 + ho

With V2= 0, by KVL in input circuit,

RSI1 + hi I1 + hrV2 =

0 (RS + hi) I1 + hrV2

=0

Hence, I2 / V2 = -hr / (RS + hi)

= hf (-hr/( RS + hi)+ho

Yo= ho- hf hr/( RS + hi)

The output admittance is a function of source resistance. If the source impedence is resistive
then Yo is real.

Voltage Amplification Factor(Avs) taking into account the resistance (Rs) of the source
 Fig. 5.6 Thevenin’s Equivalent Input Circuit

This overall voltage gain Avs is given by

Avs = V2 / VS = V2V1 / V1VS = Av V1/ VS

From the equivalent input circuit using Thevenin’s equivalent for the source shown in Fig. 5.6

V1 = VS Zi / (Zi + RS)

V1 / VS = Zi / ( Zi + RS)

Then, Avs = Av Zi / ( Zi +

RS) SubstitutingAv = AiZL / Zi

Avs = AiZL / ( Zi + RS)

Avs = AiZL RS / ( Zi + RS) RS

Avs = AisZL / RS

Current Amplification (Ais) taking into account the sourse Resistance(R S)

Fig. 1.7 Norton’s Equivalent Input Circuit

 The modified input circuit using Norton’s equivalent circuit for the calculation of A is is shown
in Fig.
1.7 Overall Current Gain, Ais = -I2 / IS = - I2I1 /I1 IS = Ai I1/IS
From Fig. 1.7 I1= IS RS / (RS
+ Zi) I1 / IS = RS / (RS +
Zi)
and hence, Ais = Ai RS / (RS + Zi)

Operating Power Gain (AP)

The operating power gain AP of the transistor is
defined as AP = P2 / P1 = -V2 I2 / V1 I1 = AvAi = Ai
AiZL/ Zi
2
AP = A
i (LZ /i Z )

Small Signal analysis of a transistor amplifier

Ai = - hf / ( 1+ ZL ho) Av = AiZL / Zi

Zi = hi + hr A1ZL = hi - hf hr / (YL + Avs = Av Zi / ( Zi + RS) = AiZL / ( Zi

ho) + RS)
= AisZL / RS

Yo= ho- hf hr/( RS + hi) = 1/ Zo Ais = Ai RS / (RS + Zi) = Avs = Ais

RS/ ZL
 NEED FOR TRANSISTOR BIASING
If the o/p signal must be a faithful reproduction of the i/p signal, the transistor must
be operated in active region. That means an operating point has to be established in this
region . To establish an operating point (proper values of collector current Ic and collector
to emitter voltage VCE) appropriate supply voltages and resistances must be suitably
chosen in the ckt. This process of selecting proper supply voltages and resistance for
obtaining desired operating point or Q point is called as biasing and the ckt used for
transistor biasing is called as biasing ckt.

There are four conditions to be met by a transistor so that it acts as a faithful ampr:

1) Emitter base junction must be forward biased (V BE=0.7Vfor Si, 0.2V for Ge) and
collector base junction must be reverse biased for all levels of i/p signal.
2) Vce voltage should not fall below VCE (sat) (0.3V for Si, 0.1V for Ge) for any part of the
i/p signal. For VCE less than VCE (sat) the collector base junction is not probably
reverse biased.
3) The value of the signal Ic when no signal is applied should be at least equal to the
max. collector current t due to signal alone.
4) Max. rating of the transistor Ic(max), VCE (max) and PD(max) should not be exceeded at
any value of i/p signal.

Consider the fig shown in fig1. If operating point is selected at A, A represents a

condition when no bias is applied to the transistor i.e, I c=0, VCE =0. It does not satisfy the
above said conditions necessary for faithful amplification.

Point C is too close to PD(max) curve of the transistor. Therefore the o/p voltage swing in the
positive direction is limited.

Point B is located in the middle of active region .It will allow both positive and negative half
cycles in the o/p signal. It also provides linear gain and larger possible o/p voltages and
currents

Hence operating point for a transistor amplifier is selected to be in the middle of active region.
 IC(max)

PD(max)

Vce(sat)

Fig 4.1CE Output Characteristics

DC LOAD LINE
Referring to the biasing circuit of fig 4.2a, the values of V CC and RC are fixed and Ic and
VCE are dependent on RB.

Applying Kirchhoff’s voltage law to the collector circuit in fig. 4.2a, we get

Fig 4.2a CE Amplifier circuit (b) Load line

the end point A are obtained by substituting VCE =0 in the above equation. Then
. Therefore The coordinates of A are VCE =0 and .

The coordinates of B are obtained by substituting Ic=0 in the above equation. Then Vce =
Vcc. Therefore the coordinates of B are VCE =Vcc and Ic=0. Thus the dc load line AB can be
drawn if the values of Rc and Vcc are known.

As shown in the fig4.2b, the optimum POINT IS LOCATED AT THE MID POINT OF THE
MIDWAY BETWEEN a AND b. In order to get faithful amplification, the Q point must be well
within the active region of the transistor.

Even though the Q point is fixed properly, it is very important to ensure that the operating
point remains stable where it is originally fixed. If the Q point shifts nearer to either A or B, the
output voltage and current get clipped, thereby o/p signal is distorted.

In practice, the Q-point tends to shift its position due to any or all of the following three main
factors.

1) Reverse saturation current, Ico, which doubles for every 10oC raise in temperature
2) Base emitter Voltage ,VBE, which decreases by 2.5 mV per oC
3) Transistor current gain, hFE or β which increases with temperature.

If base current IB is kept constant since IB is approximately equal to Vcc/RB. If the transistor
is replaced by another one of the same type, one cannot ensure that the new transistor will
have identical parameters as that of the first one. Parameters such as β vary over a range. This
results in the variation of collector current Ic for a given IB. Hence , in the o/p characteristics, the
spacing between the curves might increase or decrease which leads to the shifting of the Q-
point to a location which might be completely unsatisfactory.

AC LOAD LINE
After drawing the dc load line, the operating point Q is properly located at the center of
the dc load line. This operating point is chosen under zero input signal condition of the circuit.
Hence the ac load line should also pas through the operating point Q. The effective ac load
resistance Rac, is a combination of RC parallel to RL i.e. || . So the slope of the ac load
line CQD will be . To draw the ac load line, two end points, I.e. V CE(max) and IC(max) when
the signal is applied are required.

, which locates point D on the Vce axis.

, which locates the point C on the IC axis.

By joining points c and D, ac load line CD is constructed. As RC > Rac, The dc load line is
less steep than ac load line.

UNIT-III
TRANSISTOR BIASING AND STABILIZATION

STABILITY FACTOR (S):

The rise of temperature results in increase in the value of transistor gain β and the
leakage current Ico. So, IC also increases which results in a shift in operating point. Therefore,
The biasing network should be provided with thermal stability. Maintenance of the operating
point is specified by S, which indicates the degree of change in operating point due to change
in temperature.

The extent to which IC is stabilized with varying IC is measured by a stability factor S

For CE configuration

Differentiate the above equation w.r.t I C , We get

S should be small to have better thermal stability.

Stability factor S’ and S’’:

S’ is defined as the rate of change of IC with VBE, keeping IC and VBE constant.

S’’ is defined as the rate of change of IC with β, keeping ICO and VBE constant.
 METHODS OF TRANSISTOR BIASING

1) Fixed bias (base bias)

Fig 4.3 Fixed Biasing Circuit

This form of biasing is also called base bias. In the fig 4.3 shown, the single power
source (for example, battery) is used for both collector and base of a transistor, although
separate batteries can also be used.

In the given

circuit, Vcc = IBRB

+ Vbe

Therefore, IB = (Vcc - Vbe)/RB

Since the equation is independent of current I CR, dIB//dICR =0 and the stability factor is
given by the equation….. reduces to

S=1+β

Sinceβ isa largequantity,thisis verypoorbiasingcircuit.Therefore inpractice thecircuit is

not used for biasing.

For a given transistor, Vbe does not vary significantly during use. As Vcc is of fixed value,
on selection of R the base current IB is fixed. Therefore this type is called fixed bias type of
circuit.

Also for given circuit, Vcc = ICRC + Vce

 Therefore, Vce = Vcc - ICRC

Merits:

 It is simple to shift the operating point anywhere in the active region by merely
changing the base resistor (RB).
 A very small number of components are required.

Demerits:

 The collector current does not remain constant with variation in temperature or
power supply voltage. Therefore the operating point is unstable.
 Changes in Vbe will change IB and thus cause RE to change. This in turn will
alter the gain of the stage.
 When the transistor is replaced with another one, considerable change in the value of β
can be expected. Due to this change the operating point will shift.

2) EMITTER-FEEDBACK BIAS:

The emitter feedback bias circuit is shown in the fig 4.4. The fixed bias circuit is
modified by attaching an external resistor to the emitter. This resistor introduces negative
feedback that stabilizes the Q-point. From Kirchhoff's voltage law, the voltage across the base
resistor is

VRb = VCC - IeRe - Vbe.

Fig 4.4 Self Biasing Circuit

From Ohm's law, the base current is

 Ib = VRb / Rb.

The way feedback controls the bias point is as follows. If Vbe is held
constant and temperature increases, emitter current increases. However, a
larger Ie increases the emitter voltage Ve = IeRe, which in turn reduces the
voltage VRb across the base resistor. A lower base-resistor voltage drop reduces
the base current, which results in less collector current because Ic = ß IB.
Collector current and emitter current are related by I c = α Ie with α ≈ 1, so
increase in emitter current with temperature is opposed, and operating point is
kept stable.

Similarly, if the transistor is replaced by another, there may be a change

in IC (corresponding to change in β-value, for example). By similar process as
above, the change is negated and operating point kept stable.

For the given circuit,

IB = (VCC - Vbe)/(RB + (β+1)RE).

Merits:

The circuit has the tendency to stabilize operating point against changes in
temperature and β- value.

Demerits:

 In this circuit, to keep IC independent of β the following condition must be met:

 which is approximately the case if ( β + 1 )RE >> RB.

 As β-value is fixed for a given transistor, this relation can be satisfied

either by keeping RE very large, or making RB very low.

 If RE is of large value, high VCC is necessary. This increases cost as

well as precautions necessary while handling.
 If RB is low, a separate low voltage supply should be used in the base
circuit. Using two supplies of different voltages is impractical.

 In addition to the above, RE causes ac feedback which reduces the

voltage gain of the amplifier.

3) COLLECTOR TO BASE BIAS OR COLLECTOR FEED-BACK BIAS:

 Fig 4.5 Collector to Base Biasing Circuit

This configuration shown in fig 4.5 employs negative feedback to prevent

thermal runaway and stabilize the operating point. In this form of biasing, the base
resistor RB is connected to the collector instead of connecting it to the DC source Vcc.
So any thermal runaway will induce a voltage drop across the RC resistor that will
throttle the transistor's base current.

From Kirchhoff's voltage law, the voltage across the base resistor Rb is

By the Ebers–Moll model, Ic = βIb, and so

From Ohm's law, the base current , and so

Hence, the base current Ib is

If Vbe is held constant and temperature increases, then the collector current Ic
increases.
However, a larger Ic causes the voltage drop across resistor Rc to increase, which in turn
reduces the
voltage across the base resistor Rb. A lower base-resistor voltage drop reduces the base
current Ib, which results in less collector current Ic. Because an increase in collector current
with temperature is opposed, the operating point is kept stable.

Merits:

 Circuit stabilizes the operating point against variations in temperature and β (i.e.
replacement of transistor)

Demerits:

 In this circuit, to keep Ic independent of β, the following condition must be met:

which is the case when

 As β-value is fixed (and generally unknown) for a given transistor, this relation
can be satisfied either by keeping Rc fairly large or making Rb very low.

 If Rc is large, a high Vcc is necessary, which increases cost as well as precautions

necessary while handling.

 If Rb is low, the reverse bias of the collector–base region is small, which limits the
range of collector voltage swing that leaves the transistor in active mode.

 The resistor Rb causes an AC feedback, reducing the voltage gain of the

amplifier. This undesirable effect is a trade-off for greater Q-point stability.

Usage: The feedback also decreases the input impedance of the amplifier as seen from
the base, which can be advantageous. Due to the gain reduction from feedback, this biasing
form is used only when the trade-off for stability is warranted.
 4) COLLECTOR –EMITTER FEEDBACK BIAS:

Fig 4.6 Collector-Emitter Biasing Circuit

The above fig4.6 shows the collector –emitter feedback bias circuit that can be obtained
by applying both the collector feedback and emitter feedback. Here the collector feedback is
provided by connecting a resistance RB from the collector to the base and emitter feedback is
provided by connecting an emitter Re from emitter to ground. Both feed backs are used to
control collector current and base current IB in the opposite direction to increase the stability
as compared to the previous biasing circuits.

5) VOLTAGE DIVIDER BIAS OR SELF BIAS OR EMITTER BIAS

The voltage divider as shown in the fig 4.7 is formed using external resistors R 1 and R2.
The voltage across R2 forward biases the emitter junction. By proper selection of resistors R 1
and R2, the operatingpointofthetransistorcanbemade independent of β. Inthiscircuit, thevoltage
divider holds the base voltage fixed independent of base current provided the divider current is
large compared to the base current. However, even with a fixed base voltage, collector current
varies with temperature (for example) so an emitter resistor is added to stabilize the Q-point,
similar to the above circuits with emitter resistor.
 Fig 4.7 Voltage Divider Biasing Circuit

In this circuit the base voltage is given by:

voltage across

provided .

Also

For the given circuit,

Let the current in resistor R1 is I1 and this is divided into two parts – current through
base and resistor R2. Since the base current is very small so for all practical purpose it is
assumed that I1 also flows through R2, so we have

Applying KVL in the circuit, we have

 It is apparent from above expression that the collector current is
independent of ? thus the stability is excellent. In all practical cases the
value of VBE is quite small in comparison to the V2, so it can be ignored in
the above expression so the collector current is almost independent of the
transistor parameters thus this arrangement provides excellent stability.
Again applying KVL in collector circuit, we have

The resistor RE provides stability to the circuit. If the current

through the collector rises, the voltage across the resistor RE also rises.
This will cause VCE to increase as the voltage V2 is independent of
collector current. This decreases the base current, thus collector current
increases to its former value.
Stability factor for such circuit arrangement is given by

If Req/RE is very small compared to 1, it can be ignored in the above

expression thus we have

Which is excellent since it is the smallest possible value for the

stability. In actual practice the value of stability factor is around 8-10,
since Req/RE cannot be ignored as compared to 1.

Merits:

 Unlike above circuits, only one dc supply is necessary.

 Operating point is almost independent of β variation.
 Operating point stabilized against shift in temperature.
 Demerits:

 In this circuit, to keep IC independent of β the following condition must be met:

which is approximately the case if

where R1 || R2 denotes the equivalent resistance of R1 and R2 connected in parallel.

 As β-value is fixed for a given transistor, this relation can be satisfied either by
keeping RE fairly large, or making R1||R2 very low.

 If RE is of large value, high VCC is necessary. This increases cost as well as

precautions necessary while handling.
 If R1 || R2 is low, either R1 is low, or R2 is low, or both are low. A low R 1 raises VB
closer to VC, reducing the available swing in collector voltage, and limiting how large R C can
be made without driving the transistor out of active mode. A low R2 lowers Vbe, reducing the
allowed collector current. Lowering both resistor values draws more current from the power
supply and lowers the input resistance of the amplifier as seen from the base.

 AC as well as DC feedback is caused by RE, which reduces the AC voltage gain

of the amplifier. A method to avoid AC feedback while retaining DC feedback is discussed
below.

Usage: The circuit's stability and merits as above make it widely used for linear circuits.

BIAS COMPENSATION USING DIODE AND TRANSISTOR

The various biasing circuits considered use some type of negative feedback to stabilize
the operation point. Also, diodes, thermistors and sensistors can be used to compensate for
variations in current.

DIODE COMPENSATION:
 The following fig4.8 shows a transistor amplifier with a diode D connected across the
base- emitter junction for compensation of change in collector saturation current I CO. The diode
is of the same material as the transistor and it is reverse biased by e the emitter-base junction
voltage VBE, allowing the diode reverse saturation current I O to flow through diode D. The base
current IB=I-IO.

As long as temperature is constant, diode D operates as a resistor. As the temperature

increases, ICO of the transistor increases. Hence, to compensate for this, the base current I B
should be decreased.

The increase in temperature will also cause the leakage current I O through D to increase
and thereby decrease the base current I B. This is the required action to keep Ic constant.

This type of bias compensation does not need a change in Ic to effect the change in I C,
as both IO and ICO can track almost equally according to the change in temperature.

THERMISTOR COMPENSATION:

The following fig4.9 a thermistor RT, having a negative temperature coefficient is

connected in parallel with R2. The resistance of thermistor decreases exponentially with
increase of temperature. An increase of temperature will decrease the base voltage V BE,
reducing IB and IC.

Fig 4.9 Thermistor Compensation

SENSISTOR COMPENSATION:

In the following fig4.10 shown a sensistor Rs having a positive temperature coefficient is

connected across R1 or RE. Rs increases with temperature. As the temperature increases, the
equivalent resistance of the parallel combination of R1 and Rs also increases and hence V BE
decreases, reducing IB and Ic. This reduced Ic compensates for increased Ic caused by the
increase in VBE, ICO and β due to temperature.

Fig 4.10 Sensistor Compensation

 THERMAL RUNAWAY
The collector current for the CE circuit is given by The three
variables in the equation, β, , and increases with rise in temperature. In particular, the
reverse saturation current or leakage current changes greatly with temperature. Specifically
it doubles for every 10oC rise in temperature. The collector current causes the collector base
junction temperature to rise which in turn, increase , as a result will increase still
further, which will further rise the
temperature at the collector base junction. This process will become cumulative leading at the
collector base junction. This process will become cumulative leading to “thermal runaway”.
Consequently, the ratings of the transistor are exceeded which may destroy the transistor itself.

The collector is made larger in size than the emitter in order to help the heat developed
at the collector junction. However if the circuit is designed such that the base current is
made to decrease automatically with rise in temperature, then the decrease in will
compensate for increase in the
, keeping almost constant.
 UNIT -IV
FIELD EFFECT TRANSISTOR
INTRODUCTION
1. The Field effect transistor is abbreviated as FET , it is an another semiconductor device
like a BJT which can be used as an amplifier or switch.
2. The Field effect transistor is a voltage operated device. Whereas Bipolar junction
transistor is a current controlled device. Unlike BJT a FET requires virtually no input
current.
3. This gives it an extremely high input resistance , which is its most important advantage
over a bipolar transistor.
4. FET is also a three terminal device, labeled as source, drain and gate.
5. The sourcecanbe viewed as BJT’semitter, thedrainascollector, and the gate asthecounter
part of the base.
6. The material that connects the source to drain is referred to as the channel.

7. FET operation depends only on the flow of majority carriers ,therefore they are called
uni polar devices. BJT operation depends on both minority and majority carriers.

8. As FET has conduction through only majority carriers it is less noisy than BJT.

9. FETs are much easier to fabricate and are particularly suitable for ICs because they
occupy less space than BJTs.

10. FET amplifiers have low gain bandwidth product due to the junction capacitive effects
and produce more signal distortion except for small signal operation.

11. The performance of FET is relatively unaffected by ambient temperature changes. As it

has a negative temperature coefficient at high current levels, it prevents the FET from
thermal breakdown. The BJT has a positive temperature coefficient at high current
levels which leads to thermal breakdown.

CLASSIFICATION OF FET:
There are two major categories of field effect transistors:

1. Junction Field Effect Transistors

2. MOSFETs

These are further sub divided in to P- channel and N-channel devices.

MOSFETs are further classified in to two types Depletion MOSFETs and Enhancement .
MOSFETs
 When the channel is of N-type the JFET is referred to as an N-channel JFET ,when the
channel is of P-type the JFET is referred to as P-channel JFET.

The schematic symbols for the P-channel and N-channel JFETs are shown in the figure.

Fig 5.1 schematic symbols for the P-channel and N-channel JFET

CONSTRUCTION AND OPERATION OF N- CHANNEL FET

If the gate is an N-type material, the channel must be a P-type material.

CONSTRUCTION OF N-CHANNEL JFET

Fig 5.2 Construction of N-Channel JFET

A piece of N- type material, referred to as channel has two smaller pieces of P-type
material attached to its sides, forming PN junctions. The channel ends are designated as
the drain and source. And the two pieces of P-type material are connected together and
their terminal is called the gate. Since this channel is in the N-type bar, the FET is known
as N-channel JFET.
OPERATION OF N-CHANNEL JFET:-

The overall operation of the JFET is based on varying the width of the channel to control the
drain current.

A piece of N type material referred to as the channel, has two smaller pieces of
P type material attached to its sites, farming PN –Junctions. The channel’s ends are designated
the drain and the source. And the two pieces of P type material are connected together and
their terminal is called the gate. With the gate terminal not connected and the potential applied
positive at the drain negative at the source a drain current Id flows. When the gate is biased
negative with respective to the source the PN junctions are reverse biased and depletion
regions are formed. The channel is more lightly doped than the P type gate blocks, so the
depletion regions penetrate deeply into the channel. Since depletion region is a region
depleted of charge carriers it behaves as an Insulator. The result is that the channel is
narrowed. Its resistance is increased and Id is reduced. When the negative gate bias voltage is
further increased, the depletion regions meet at the center and Id is cut off completely.

There are two ways to control the channel width

1. By varying the value of Vgs

2. And by Varying the value of Vds holding Vgs constant

1 By varying the value of Vgs :-

We can vary the width of the channel and in turn vary the amount of drain
current. This can be done by varying the value of Vgs. This point is illustrated in the fig
below. Here we are dealing with N channel FET. So channel is of N type and gate is of P
type that constitutes a PN junction. This PN junction is always reverse biased in JFET
operation .The reverse bias is applied by a battery voltage Vgs connected between the
gate and the source terminal i.e positive terminal of the battery is connected to the source
and negative terminal to gate.
1) When a PN junction is reverse biased the electrons and holes diffuse across junction by
leaving immobile ions on the N and P sides , the region containing these immobile ions
is known as depletion regions.
2) If both P and N regions are heavily doped then the depletion region extends
symmetrically on both sides.
3) But in N channel FET P region is heavily doped than N type thus depletion region
extends more in N region than P region.
4) So when no Vds is applied the depletion region is symmetrical and the conductivity
becomes Zero. Since there are no mobile carriers in the junction.
5) As the reverse bias voltage is increases the thickness of the depletion region also
increases. i.e. the effective channel width decreases .
6) By varying the value of Vgs we can vary the width of the channel.

2 Varying the value of Vds holding Vgs constant :-

1) When no voltage is applied to the gate i.e. Vgs=0 , Vds is applied between source and
drain the electrons will flow from source to drain through the channel constituting drain
current Id .
2) With Vgs= 0 for Id= 0 the channel between the gate junctions is entirely open .In
response to a small applied voltage Vds , the entire bar acts as a simple semi conductor
resistor and the current Id increases linearly with Vds .
3) The channel resistances are represented as rd and rs as shown in the fig.

4) This increasing drain current Id produces a voltage drop across rd which reverse biases
the gate to source junction,(rd> rs) .Thus the depletion region is formed which is not
symmetrical .
 5) The depletion region i.e. developed penetrates deeper in to the channel near drain and
less towards source because Vrd >> Vrs. So reverse bias is higher near drain than at
source.
6) As a result growing depletion region reduces the effective width of the channel.
Eventually a voltage Vds is reached at which the channel is pinched off. This is the
voltage where the current Id begins to level off and approach a constant value.

7) So, by varying the value of Vds we can vary the width of the channel holding Vgs
constant.

When both Vgs and Vds is applied:-

It is of course in principle not possible for the channel to close Completely and there by
reduce the current Id to Zero for, if such indeed, could be the case the gate voltage Vgs is
applied in the direction to provide additional reverse bias

1) When voltage is applied between the drain and source with a battery Vdd, the
electrons flow from source to drain through the narrow channel existing between the
depletion regions. This constitutes the drain current Id, its conventional direction is
from drain to source.
2) The value of drain current is maximum when no external voltage is applied between
gate and source and is designated by Idss.
 3) When Vgs is increased beyond Zero the depletion regions are widened. This reduces
the effective width of the channel and therefore controls the flow of drain current
through the channel.
4) When Vgs is further increased a stage is reached at which to depletion regions touch
each other that means the entire channel is closed with depletion region. This reduces
the drain current to Zero.

CHARACTERISTICS OF N-CHANNEL JFET

The family of curves that shows the relation between current and voltage are known
as characteristic curves.

There are two important characteristics of a JFET.

1) Drain or VI Characteristics
2) Transfer characteristics
1. Drain Characteristics:-
Drain characteristics shows the relation between the drain to source voltage Vds and
drain current Id. In order to explain typical drain characteristics let us consider the curve
with Vgs= 0.V.

1) When Vds is applied and it is increasing the drain current ID also increases linearly up
to knee point.
2) This shows that FET behaves like an ordinary resistor.This region is called as ohmic
region.
3) ID increases with increase in drain to source voltage. Here the drain current is
increased slowly as compared to ohmic region.
 4)
5)
6)

4) It is because of the fact that there is an increase in VDS .This in turn increases
the reverse bias voltage across the gate source junction .As a result of this
depletion region grows in size thereby reducing the effective width of the channel.

5) All the drain to source voltage corresponding to point the channel width is
reduced to a minimum value and is known as pinch off.

5) The drain to source voltage at which channel pinch off occurs is called pinch off
voltage(Vp).
PINCH OFF Region:-

1) This is the region shown by the curve as saturation region.

2) It is also called as saturation region or constant current region. Because of the
channel is occupied with depletion region , the depletion region is more
towards the drain and less towards the source, so the channel is limited, with
this only limited number of carriers are only allowed to cross this channel from
source drain causing a current that is constant in this region. To use FET as
an amplifier it is operated in this saturation region.
3) In this drain current remains constant at its maximum value IDSS.

4) The drain current in the pinch off region depends upon the gate to source
voltage and is given by the relation
Id =Idss [1-Vgs/Vp]2

This is known as shokley’s relation.

BREAKDOWN REGION:-

1) The region is shown by the curve .In this region, the drain current increases
rapidly as the drain to source voltage is increased.
2) It is because of the gate to source junction due to avalanche effect.
 3) The avalanche break down occurs at progressively lower value of VDS because the
reverse bias gate voltage adds to the drain voltage thereby increasing effective
voltage across the gate junction
This causes

1. The maximum saturation drain current is smaller

2. The ohmic region portion decreased.
4) It is important to note that the maximum voltage VDS which can be applied to FET is
the lowest voltage which causes available break down.
2. TRANSFER CHARACTERISTICS:-

These curves shows the relationship between drain current ID and gate to source
voltage VGS for different values of VDS.

1) First adjust the drain to source voltage to some suitable value , then increase the
gate to source voltage in small suitable value.
2) Plot the graph between gate to source voltage along the horizontal axis and current
ID on the vertical axis. We shall obtain a curve like this.

3) As we know that if Vgs is more negative curves drain current to reduce . where V gs
is made sufficiently negative, Id is reduced to zero. This is caused by the widening
of the depletion region to a point where it is completely closes the channel. The
value of Vgs at the cutoff point is designed as Vgsoff
 4) The upper end of the curve as shown by the drain current value is equal to I dss that
is when Vgs = 0 the drain current is maximum.

5) While the lower end is indicated by a voltage equal to Vgsoff

6) If Vgs continuously increasing , the channel width is reduced , then I d =0
7) It may be noted that curve is part of the parabola; it may be
2
expressed as Id=Idss[1-Vgs/Vgsoff]

DIFFERENCE BETWEEN Vp AND Vgsoff –

Vp is the value of Vgs that causes the JFET to become constant current component, It
is measured at Vgs =0V and has a constant drain current of Id =Idss .Where Vgsoff is the value of
Vgs that reduces Id to approximately zero.

Why the gate to source junction of a JFET be always reverse biased ?

The gate to source junction of a JFET is never allowed to become forward biased
because the gate material is not designed to handle any significant amount of current. If the
junction is allowed to become forward biased, current is generated through the gate material.
This current may destroy the component.

There is one more important characteristic of JFET reverse biasing i.e. J FET ‘s have
extremely high characteristic gate input impedance. This impedance is typically in the high
mega ohm range. With the advantage of extremely high input impedance it draws no current
from the source. The high input impedance of the JFET has led to its extensive use in
integrated circuits. The low current requirements of the component makes it perfect for use in
ICs. Where thousands of transistors must be etched on to a single piece of silicon. The low
current draw helps the IC to remain relatively cool, thus allowing more components to be
placed in a smaller physical area.

JFET PARAMETERS
The electrical behavior of JFET may be described in terms of certain parameters. Such
parameters are obtained from the characteristic curves.

A C Drain resistance(rd):

It is also called dynamic drain resistance and is the a.c.resistance between the drain and
source terminal,when the JFET is operating in the pinch off or saturation region.It is given by
the ratio of small change in drain to source voltage ∆V ds to the corresponding change in drain
current ∆Id for a constant gate to source voltage Vgs.

Mathematically it is expressed as r d=∆Vds/ ∆Id where Vgs is held

constant. TRANCE CONDUCTANCE (gm):

It is alsocalledforwardtransconductance . It is given bytheratioofsmallchange in draincurrent (∆Id)
to the corresponding change in gate to source voltage (∆Vds)

Mathematically the transconductance can be written as

gm=∆Id/∆Vds

AMPLIFICATION FACTOR (µ)

It is given by the ratio of small change in drain to source voltage (∆Vds) to the corresponding
change in gate to source voltage (∆Vgs)for a constant drain current (Id).

Thus µ=∆Vds/∆Vgs when Id held constant

The amplification factor µ may be expressed as a product of transconductance (g m)and ac

drain resistance (rd)

µ=∆Vds/∆Vgs=gm rd

THE FET SMALL SIGNAL MODEL

The linear small signal equivalent circuit for the FET can be obtained in a manner
similar to that used to derive the corresponding model for a transistor.

We can express the drain current iD as a function f of the gate voltage and drain

voltage Vds. Id =f(Vgs,Vds) (1)

The transconductance gm and drain resistance rd:-

If both gate voltage and drain voltage are varied, the change in the drain
current is approximated by using taylors series considering only the first two terms in
the expansion

∆id= |vds =constant .∆vgs |vgs=constant∆v ds

we can write∆id=id

∆vgs=vgs

∆vds=vds

Id=gm v Vds→(1)

Where gm= |Vds |Vds

 gm = |Vds

Is the mutual conductance or transconductance .It is also called as gfs or yfs common source
forward conductance .

The second parameter rd is the drain resistance or output resistance is

defined as

rd= |Vgs |Vgs=

|Vgs rd= |Vgs

The reciprocal of the rd is the drain conductance gd .

It is also designated by Yos and Gos and
called the common source output conductance . So the small signal equivalent circuit for FET
can be drawn in two different ways.

1. small signal current –source

model 2.small signal voltage-

source model.

A small signal current –source model for FET in common source configuration can be
drawn satisfying Eq→(1) as shown in the figure(a)

This low frequency model for FET has a Norton’s output circuit with a dependent current
generator whose magnitude is proportional to the gate-to –source voltage. The proportionality
factor is the transconductance ‘gm’. The output resistance is ‘rd’. The input resistance between the
gate and source is infinite, since it is assumed that the reverse biased gate draws no current.
For the same reason the resistance between gate and drain is assumed to be infinite.

The small signal voltage-source model is shown in the figure(b).

This can be derived by finding the Thevenin’s equivalent for the output part of fig(a) .

These small signal models for FET can be used for analyzing the three basic FET
amplifier configurations:

1.common source (CS) 2.common drain (CD) or source follower

3. common gate(CG).
(a)Small Signal Current source model for FET (b)Small Signal voltage source model for FET

Here the input circuit is kept open because of having high input impedance and the
output circuit satisfies the equation for ID

MOSFET
We now turn our attention to the insulated gate FET or metal oxide semi conductor FET
which is having the greater commercial importance than the junction FET.

Most MOSFETS however are triodes, with the substrate internally connected to the source.
The circuit symbols used by several manufacturers are indicated in the Fig below.

(a) Depletion type MOSFET (b) Enhancement type MOSFET

Both of them are P- channel

Here are two basic types of MOSFETS

(1) Depletion type (2) Enhancement type MOSFET.

D-MOSFETS can be operated in both the depletion mode and the enhancement mode. E
MOSFETS are restricted to operate in enhancement mode. The primary difference between
them is their physical construction.
The construction difference between the two is shown in the fig given below.

As we can see the D MOSFET have physical channel between the source and
drain terminals(Shaded area)

The E MOSFET on the other hand has no such channel physically. It depends on the
gate voltage to form a channel between the source and the drain terminals.

Both MOSFETS have an insulating layer between the gate and the rest of the
component. This insulating layer is made up of SIO 2 a glass like insulating material. The gate
material is made up of
metal conductor .Thus going from gate to substrate, we can have metal oxide semi conductor
which is where the term MOSFET comes from.

Since the gate is insulated from the rest of the component, the MOSFET is
sometimes referred to as an insulated gate FET or IGFET.

The foundation of the MOSFET is called the substrate. This material is represented in the
schematic symbol by the center line that is connected to the source.

In the symbol for the MOSFET, the arrow is placed on the substrate. As with JFET an arrow
pointing in represents an N-channel device, while an arrow pointing out represents p-channel
device.

CONSTRUCTION OF AN N-CHANNEL MOSFET:-

The N- channel MOSFET consists of a lightly doped p type substance into which two
heavily doped n+ regions are diffused as shown in the Fig. These n+ sections , which will act
as source and drain.
A thin layer of insulation silicon dioxide (SIO2) is grown over the surface of the
structure, and holes are cut into oxide layer, allowing contact with the source and drain. Then
the gate metal area is overlaid on the oxide, covering the entire channel region.Metal contacts
are made to drain and source and the contact to the metal over the channel area is the gate
terminal.The metal area of the gate, in conjunction with the insulating dielectric oxide layer and
the semiconductor channel, forms a parallel plate capacitor. The insulating layer of sio2

Is the reason why this device is called the insulated gate field effect transistor. This layer
results in an extremely high input resistance (10 10 to 10power 15ohms) for MOSFET.

DEPLETION MOSFET

The basic structure of D –MOSFET is shown in the fig. An N-channel is diffused between
source and drain with the device an appreciable drain current IDSS flows foe zero gate to
source voltage, Vgs=0.

Depletion mode operation:-

1) The above fig shows the D-MOSFET operating conditions with gate and source
terminals shorted together(VGS=0V)

2) At this stage ID= IDSS where VGS=0V, with this voltage VDS, an appreciable drain
current IDSS flows.

3) If the gate to source voltage is made negative i.e. VGs is negative .Positive charges are
induced in the channel through the SIO2 of the gate capacitor.

4) Since the current in a FET is due to majority carriers(electrons for an N-type material) ,
the induced positive charges make the channel less conductive and the drain current
drops as Vgsis made more negative.

5) The re distribution of charge in the channel causes an effective depletion of majority

carriers , which accounts for the designation depletion MOSFET.

6) That means biasing voltage Vgs depletes the channel of free carriers This effectively
reduces the width of the channel , increasing its resistance.

7) Note that negative Vgs has the same effect on the MOSFET as it has on the JFET.

8) As shown in the fig above, the depletion layer generated by Vgs (represented by the
white space between the insulating material and the channel) cuts into the channel,
reducing its width. As a result ,Id<Idss.The actual value of ID depends on the value of
Idss,Vgs(off) and Vgs.

Enhancement mode operation of the D-MOSFET:-

1) This operating mode is a result of applying a positive gate to source voltage Vgs to the
device.
2) When Vgs is positive the channel is effectively widened. This reduces the
resistance of the channel allowing ID to exceed the value of IDSS
3) When Vgs is given positive the majority carriers in the p-type are holes. The holes in
the p type substrate are repelled by the +ve gate voltage.
 4) At the same time, the conduction band electrons (minority carriers) in the p type
material are attracted towards the channel by the +gate voltage.
5) With the build up of electrons near the channel , the area to the right of the physical
channel effectively becomes an N type material.
6) The extended n type channel now allows more current, Id> Idss

Characteristics of Depletion MOSFET:-

The fig. shows the drain characteristics for the N channel depletion type MOSFET

1) The curves are plotted for both Vgs positive and Vgs negative voltages
.
2) When Vgs=0 and negative the MOSFET operates in depletion mode when Vgs is
positive ,the MOSFET operates in the enhancement mode.
3) The difference between JFET and D MOSFET is that JFET does not operate for
positive values of Vgs.

4) When Vds=0, there is no conduction takes place between source to drain, if Vgs<0
and Vds>0 then Id increases linearly.

5) But as Vgs,0 induces positive charges holes in the channel, and controls the channel
width. Thus the conduction between source to drain is maintained as constant, i.e. Id is
constant.

6) If Vgs>0 the gate induces more electrons in channel side, it is added with the free
electrons generated by source. again the potential applied to gate determines the
channel width and maintains constant current flow through it as shown in Fig
TRANSFER CHARACTERISTICS:-

The combination of 3 operating states i.e. Vgs=0V, VGs<0V, Vgs>0V is represented by

the D MOSFET transconductance curve shown in Fig.

1) Here in this curve it may be noted that the region AB of the characteristics similar to
that of JFET.

2) This curve extends for the positive values of Vgs

3) Note that Id=Idss for Vgs=0V when Vgs is negative,Id< Idss when Vgs= Vgs(off) ,Id is
reduced to approximately omA.Where Vgs is positive Id>Idss.So obviously Idss is not
the maximum possible value of Id for a MOSFET.

4) The curves are similar to JFET so thet the D MOSFET have the same transconductance
equation.

E-MOSFETS

The E MOSFET is capable of operating only in the enhancement mode.The gate

potential must be positive w.r.t to source.

1) when the value of Vgs=0V, there is no channel connecting the source and drain materials.

2) As aresult , there can be no significant amount of drain current.

3) When Vgs=0, the Vdd supply tries to force free electrons from source to drain but the
presence of p-region does not permit the electrons to pass through it. Thus there is no
drain current at Vgs=0,

4) If Vgs is positive, it induces a negative charge in the p type substrate just adjacent to
the SIO2 layer.

5) As the holes are repelled by the positive gate voltage, the minority carrier electrons
attracted toward this voltage. This forms an effective N type bridge between source and
drain providing a path for drain current.

6) This +ve gate voltage forma a channel between the source and drain.

7) This produces a thin layer of N type channel in the P type substarate.This layer of free
electrons is called N type inversion layer.
8) The minimum Vgs which produces this inversion layer is called threshold voltage
and is designated by Vgs(th).This is the point at which the device turns on is called
the threshold voltage Vgs(th)
9) When the voltage Vgs is <Vgs (th) no current flows from drain to source.

10) How ever when the voltage Vgs > Vgs (th) the inversion layer connects the drain to
source and we get significant values of current.

CHARACTERISTICS OF E MOSFET:-

1. DRAIN CHARACTERISTICS

The volt ampere drain characteristics of an N-channel enhancement mode MOSFET are
given in the

fig.
 2. TRANSFER CHARACTERISTICS:-

1) The current Idss at Vgs≤ 0 is very small beinf of the order of a few nano amps.
2) As Vgs is made +ve , the current Id increases slowly at forst, and then much more
rapidly with an increase in Vgs.
3) The standard transconductance formula will not work for the E MOSFET.
4) To determine the value of ID at a given value of VGs we must use the following
2
relation Id =K[Vgs-Vgs(Th)]

Where K is constant for the MOSFET . found as

K=

From the data specification sheets, the 2N7000 has the following

ratings. Id(on)= 75mA(minimum).

And Vgs(th)=0.8(minimum)

APPLICATION OF MOSFET

One of the primary contributions to electronics made by MOSFETs can be found in the
area of digital (computer electronics). The signals in digital circuits are made up of rapidly
switching dc levels. This signal is called as a rectangular wave ,made up of two dc levels
(or logic levels). These logic levels are 0V and +5V.
 A group of circuits with similar circuitry and operating characteristics is referred to as a
logic family. All the circuits in a given logic family respond to the same logic levels, have
similar speed and power-handling capabilities , and can be directly connected together.
One such logic family is complementary MOS (or CMOS) logic. This logic family is made up
entirely of MOSFETs.

BIASING FET:-

For the proper functioning of a linear FET amplifier, it is necessary to

maintain the operating point Q stable in the central portion of the pinch off region The Q
point should be independent of device parameter variations and ambient temperature
variations

This can be achieved by suitably selecting the gate to source voltage VGS and drain
current ID which is referred to as biasing

JFET biasing circuits are very similar to BJT biasing circuitsThe main difference
between JFET circuits and BJT circuits is the operation of the active components
themselves

There are mainly two types of Biasing circuits

1) Self bias
2) Voltage divider bias.

SELF BIAS
Self bias is a JFET biasing circuit that uses a source resistor to help reverse bias the JFET
gate. A self bias circuit is shown in the fig. Self bias is the most common type of JFET bias.
This JFET must be operated such that gate source junction is always reverse biased. This
condition requires a negative VGS for an N channel JFET and a positive VGS for P channel
JFET. This can be achieved using the self bias arrangement as shown in Fig. The gate resistor RG
doesn’t affect the bias because it has essentially no voltage drop across it, and : the gate remains
at 0V .RG is necessary only to isolate an ac signal from ground in amplifier applications. The
voltage drop across resistor RS makes gate source junction reverse biased.
 For the dc analysis coupling capacitors are open

circuits. For the N channel FET in Fig (a)

IS produces a voltage drop across RS and makes the source positive w.r.t ground. In any
JFET circuit all the source current passes through the device to the drain circuit .This is due to
the fact that there is no significant gate current.

We can define source current as IS = ID

(VG =0 because there is no gate current flowing in RG So VG across

RG is zero) VG =0 then VS= ISRS =ID RS

VGS = VG-VS =0-ID RS=- ID RS

DC analysis of self Bias:-

In the following DC analysis, the N channel J FET shown in the fig. is used for illustration.

For DC analysis we can replace coupling capacitors by open circuits and we can also replace
the resistor RG by a short circuit equivalent.:. IG = 0.The relation between ID and VGS is given
by

Id=Idss[1- ]2
VGS for N channel JFET is =-id Rs

Substuting this value in the above equation

Id=Idss[1- ]2

Id=Idss[1+ ]2

For the N-chanel FET in the above figure

 Is produces a voltage drop across Rs and makes the source positive w.r.t ground in any
JFET circuit all the source current passes through the device to drain circuit this is due to the
fact that there is no significant gate current. Therefore we can define source current as Is=Id
and Vg=0 then

Vs= Is Rs =IdRs

Vgs=Vg-Vs=0-IdRs=-IdRs

Drawing the self bias line:-

Typical transfer characteristics for a self biased JFET are shown in the fig.

The maximum drain current is 5mA and the gate source cut off voltage is -3V. This means
the gate voltage has to be between 0 and -3V.

Now using the equation VGS = -IDRS and assuming RS of any suitable value we can draw
the self bias line.

Let us assume RS = 500Ω

With this Rs , we can plot two points corresponding to ID = 0 and Id

= IDSS for ID = 0

VGS = -ID RS

VGS = 0X (500.Ω) = 0V

So the first point is (0 ,0)

( Id, VGS)
 For ID= IDSS=5mA

VGS = (-5mA) (500 Ω) = -3V

So the 2nd Point will be (5mA,-3V)

By plotting these two points, we can draw the straight line through the points. This line
will intersect the transconductance curve and it is known as self bias line.The intersection point
gives the operating point of the self bias JFET for the circuit.

At Q point , the ID is slightly > than 2mA and VGS is slightly > -1V. The Q point for the
self bias JFET depends on the value of Rs.If Rs is large, Q point far down on the
transconductance curve ,ID is small, when Rs is small Q point is far up on the curve , ID is
large.

VOLTAGE DIVIDER BIAS:-

The fig. shows N channel JFET with voltage divider bias. The voltage at the source of
JFET must be more positive than the voltage at the gate in order to keep the gate to source
junction reverse biased. The source voltage is

VS = IDRS

The gate voltage is set by resistors R1 and R2 as expressed by the following equation
using the voltage divider formula.

Vg= Vdd

For dc analysis
 Applying KVL to the input

circuit VG-VGS-VS =0

:: VGS = VG-Vs=VG-

ISRS VGS = VG-IDRS::

IS = ID

Applying KVL to the input circuit we

get VDS+IDRD+VS-VDD =0

::VDS = VDD-IDRD-

IDRS VDS = VDD-ID

( RD +RS )

The Q point of a JFET amplifier , using the voltage divider

bias is IDQ = IDSS [1-VGS/VP]2

VDSQ = VDD-ID ( RD+RS )

COMPARISON OF MOSFET WITH JFET

a. In enhancement and depletion types of MOSFET, the transverse electric field

induced across an insulating layer deposited on the semiconductor material
controls the conductivity of the channel.

b. In the JFET the transverse electric field across the reverse biased PN junction
controls the conductivity of the channel.
 c. The gate leakage current in a MOSFET is of the order of 10 -12A. Hence the input
resistance of a MOSFET is very high in the order of 1010 to 1015 Ω. The gate leakage
current of a JFET is of the order of 10 -9A., and its input resistance is of the order of
108Ω.

d. The output characteristics of the JFET are flatter than those of the MOSFET, and
hence the drain resistance of a JFET (0.1 to 1MΩ) is much higher than that of a MOSFET
(1 to 50kΩ).

e. JFETs are operated only in the depletion mode. The depletion type
MOSFET may be operated in both depletion and enhancement mode.

f. Comparing to JFET, MOSFETs are easier to fabricate.

g. Special digital CMOS circuits are available which involve near zero power
dissipation and very low voltage and current requirements. This makes them
suitable for portable systems.

UNIT-V
FET AMPLIFIERS
INTRODUCTION
Field Effect Transistor (FET) amplifiers provide an excellent voltage gain and high input
impedence. Because of high input impedence and other characteristics of JFETs they are
preferred over BJTs for certain types of applications.

There are 3 basic FET circuit configurations:

i)Common
Source
ii)Common
Drain
iii)Common
Gain
Similar to BJT CE,CC and CB circuits, only difference is in BJT large output collector
current is controlled by small input base current whereas FET controls output current by
means of small input voltage. In both the cases output current is controlled variable.
FET amplifier circuits use voltage controlled nature of the JFET. In Pinch off region, I D
depends only on VGS.
 c. The gate leakage current in a MOSFET is of the order of 10 -12A. Hence the input
resistance of a MOSFET is very high in the order of 1010 to 1015 Ω. The gate leakage
current of a JFET is of the order of 10 -9A., and its input resistance is of the order of
108Ω.

d. The output characteristics of the JFET are flatter than those of the MOSFET, and
hence the drain resistance of a JFET (0.1 to 1MΩ) is much higher than that of a MOSFET
(1 to 50kΩ).

e. JFETs are operated only in the depletion mode. The depletion type
MOSFET may be operated in both depletion and enhancement mode.

f. Comparing to JFET, MOSFETs are easier to fabricate.

g. Special digital CMOS circuits are available which involve near zero power
dissipation and very low voltage and current requirements. This makes them
suitable for portable systems.

FET AMPLIFIERS
INTRODUCTION
Field Effect Transistor (FET) amplifiers provide an excellent voltage gain and high input
impedence. Because of high input impedence and other characteristics of JFETs they are
preferred over BJTs for certain types of applications.

There are 3 basic FET circuit configurations:

i)Common
Source
ii)Common
Drain
iii)Common
Gain
Similar to BJT CE,CC and CB circuits, only difference is in BJT large output collector
current is controlled by small input base current whereas FET controls output current by
means of small input voltage. In both the cases output current is controlled variable.
FET amplifier circuits use voltage controlled nature of the JFET. In Pinch off region, ID
depends only on VGS.
 Common Source (CS) Amplifier

Fig. 5.1 (a) CS Amplifier (b) Small-signal equivalent circuit

A simple Common Source amplifier is shown in Fig. 5.1(a) and associated small signal
equivalent circuit using voltage-source model of FET is shown in Fig. 5.1(b)

Voltage Gain
Source resistance (RS) is used to set the Q-Point but is bypassed by CS for mid-frequency
operation. From the small signal equivalent circuit ,the output voltage
VO = -RDµVgs(RD + rd)
Where Vgs = Vi , the input
voltage, Hence, the voltage
gain,
AV = VO / Vi = -RDµ(RD + rd)
Input Impedence
From Fig. 5.1(b) Input
Impedence is Zi =

RG
For voltage divider bias as in CE Amplifiers of BJT
RG = R1 ║ R2
Output Impedance
Output impedance is the impedance measured at the output terminals with the input voltage
VI = 0 From the Fig. 5.1(b) when the input voltage V i = 0, Vgs = 0 and hence
µ Vgs = 0
The equivalent circuit for calculating output impedence is given in
Fig. 5.2. Output impedence Zo = rd ║ RD
Normally rd will be far greater than RD . Hence Zo ≈ RD

Common Drain Amplifier

A simple common drain amplifier is shown in Fig. 5.2(a) and associated small signal equivalent
circuit using the voltage source model of FET is shown in Fig. 5.2(b).Since voltage V gd is more
easily determined than Vgs, the voltage source in the output circuit is expressed in terms of V gs
and Thevenin’s theorem.

Fig. 5.2 (a)CD Amplifier (b)Small-signal equivalent circuit

Voltage Gain
The output voltage,
VO = RSµVgd / (µ + 1) RS
+ rd Where Vgd = Vi the input
voltage. Hence, the voltage gain,
Av = VO / Vi = RSµ / (µ + 1) RS + rd
Input Impedence
From Fig. 5.2(b), Input Impedence Z i = RG
Output Impedence
From Fig. 5.2(b), Output impedence measured at the output terminals with input voltage Vi =
0 can be calculated from the following equivalent circuit.
As Vi = 0: Vgd = 0: µvgd / (µ + 1)
= 0 Output Impedence
 ZO = rd / (µ + 1) ║RS
When µ » 1
ZO = ( rd / µ) ║RS = (1/gm) ║RS

BIASING FET
For the proper functioning of a linear FET amplifier, it is necessary to maintain
the operating point Q stable in the central portion of the pinch off region The Q point should
be independent of device parameter variations and ambient temperature variations

This can be achieved by suitably selecting the gate to source voltage VGS and drain current
ID which is referred to as biasing

JFET biasing circuits are very similar to BJT biasing circuitsThe main difference
between JFET circuits and BJT circuits is the operation of the active components
themselves

There are mainly two types of Biasing circuits

1. Self bias
2. Voltage divider bias.

5.13.1. SELF BIAS:-

Self bias is a JFET biasing circuit that uses a source resistor to help reverse bias the JFET
gate.

A self bias circuit is shown in the fig 5.3

 Self bias is the most common type of JFET bias. This JFET must be operated such that
gate source junction is always reverse biased. This condition requires a negative VGS for an N
channel JFET and a positive VGS for P channel JFET. This can be achieved using the self
bias arrangement as shown in Fig 5.3. The gate resistor RG doesn’t affect the bias because it has
essentially no voltage drop across it, and : the gate remains at 0V .RG is necessary only to
isolate an ac signal from ground in amplifier applications. The voltage drop across resistor RS
makes gate source junction reverse biased.

DC analysis of self Bias:-

In the following DC analysis , the N channel J FET shown in the fig5.4. is used for illustration.

For DC analysis we can replace coupling capacitors by open circuits and we

can also replace the resistor RG by a short
circuit equivalent.

:. IG = 0

The relation between ID and VGS is

given by Id=Idss[1- ]2

VGS for N channel JFET is =-id Rs

Substuting this value in the above equation

Id=Idss[1- ]2

Id=Idss[1+ ]2
For the N-chanel FET in the above figure

Is produces a voltage drop across Rs and makes the source positive w.r.t ground

in any JFET circuit all the source current passes through the device to drain circuit this is due
to the fact that there is no significant gate current

therefore we can define source current as Is=Id and

Vg=0 then Vs= Is Rs =IdRs

Vgs=Vg-Vs=0-IdRs=-IdRs

Drawing the self bias line:-

Typical transfer characteristics for a self biased JFET are shown in the fig5.5.

The maximum drain current is 6mA and the gate source cut off voltage is -3V. This means
the gate voltage has to be between 0 and -3V.

Now using the equation VGS = -IDRS and assuming RS of any suitable value we can draw
the self bias line.

Let us assume RS = 500Ω

With this Rs , we can plot two points corresponding to ID = 0 and Id

= IDSS for ID = 0

VGS = -ID RS

VGS = 0X (500.Ω) = 0V
 So the first point is (0 ,0)
( Id, VGS)

For ID= IDSS=6mA

VGS = (-6mA) (500 Ω) = -3V

So the 2nd Point will be (6mA,-3V)

By plotting these two points, we can draw the straight line through the points. This line
will intersect the transconductance curve and it is known as self bias line. The intersection
point gives the operating point of the self bias JFET for the circuit.

At Q point , the ID is slightly > than 2mA and VGS is slightly > -1V. The Q point for the
self bias JFET depends on the value of Rs.If Rs is large, Q point far down on the
transconductance curve ,ID is small, when Rs is small Q point is far up on the curve , ID is
large.

5.13.2 VOLTAGE DIVIDER BIAS:-

The fig5.6 shows N channel JFET with voltage divider bias. The voltage at the source of
JFET must be more positive than the voltage at the gate in order to keep the gate to source
junction reverse biased. The source voltage is

VS = IDRS

The gate voltage is set by resistors R1 and R2 as expressed by the following equation
using the voltage divider formula.

Vg= Vdd
 For dc analysis fig 5.5

Applying KVL to the input

circuit VG-VGS-VS =0

:: VGS = VG-Vs=VG-

ISRS VGS = VG-IDRS::

IS = ID

Applying KVL to the input circuit we

get VDS+IDRD+VS-VDD =0

::VDS = VDD-IDRD-

IDRS VDS = VDD-ID

( RD +RS )

The Q point of a JFET amplifier , using the voltage divider

bias is IDQ = IDSS [1-VGS/VP]2

VDSQ = VDD-ID ( RD+RS )

JFET AS A VVR OR VDR

Let us consider the drain characteristics of FET as shown in the fig.
 In this characteristics we can see that in the region before pinch off voltage, drain
characteristics are linear, i.e. FET operation is linear. In this region the FET is useful as a
voltage controlled resistor,i.e. the drain to source resistance is controlled by the bias voltage
VGS.( In this region only FET behaves like an ordinary resistor This resistances can be varied
by VGS ) .The operation of FET in the region is useful in most linear applications of FET.In
such an application the FET is also referred to as a voltage variable resistor (VVR) or voltage
dependent resistor (VDR).

The drain to source conductance ( rd )

gd= for small values of VDS which may also be

expressed as gd=gd0(1- )1/2)

Where gd0 is the value of drain conductance

When the variation of the rd with VGS can be closely approximated by the expression

rd= ) Where ro = drain resistance at zero gate bias.K = a constant, dependent upon
FET
type.

5.14.1APPLICATION OF VVR

The VVR property of FET can be used to vary the voltage gain of a multistage amplifier
A, as the signal level is increased. This action is called AGC automatic gain control. A typical
arrangement is shown in the fig.
 Here maximum value of signal is taken rectified; filter to produce a DC voltage
proportional to the output signal level. This voltage is applied to the gate of JFET, this causing
the resistance between drain and source to change. As this resistance is connected across
RE, so effective RE also changes according to change in the drain to source resistance. When
output signal level increases, the drain to source resistance rd increases, increasing effective
RE. Increase in RE causes the gain of transistor Q1 to decrease, reducing the output signal.
Exactly reverse process takes place when output signal level decreased.

:: The output signal level is maintained constant. It is to be noted that the DC bias
conditions of Q1 are not affected by JFET since FET is isolated from Q1 by capacitor C2
SPECIAL PURPOSE ELECTRONIC DEVICES

ZENER DIODES

The Zener diode is like a general-purpose signal diode consisting of a silicon PN junction.
When biased in the forward direction it behaves just like a normal signal diode passing the
rated current, but as soon as a reverse voltage applied across the zener diode exceeds the
rated voltage of the device, the diodes breakdown voltage VB is reached at which point a
process called Avalanche Breakdown occurs in the semiconductor depletion layer and a
current starts to flow through the diode to limit this increase in voltage.

The current now flowing through the zener diode increases dramatically to the maximum circuit
value (which is usually limited by a series resistor) and once achieved this reverse saturation
current remains fairly constant over a wide range of applied voltages. This breakdown voltage
point, VB is called the "zener voltage" for zener diodes and can range from less than one volt to
hundreds of volts.
The point at which the zener voltage triggers the current to flow through the diode can be very
accurately controlled (to less than 1% tolerance) in the doping stage of the diodes
semiconductor construction giving the diode a specific zener breakdown voltage, (Vz) for
example, 4.3V or 7.5V. This zener breakdown voltage on the I-V curve is almost a vertical
straight line.

Zener Diode I-V Characteristics

Fig 1.19 : Zener diode characteristics

The Zener Diode is used in its "reverse bias" or reverse breakdown mode, i.e. the diodes
anode connects to the negative supply. From the I-V characteristics curve above, we can see
that the zener diode has a region in its reverse bias characteristics of almost a constant
negative voltage regardless of the value of the current flowing through the diode and remains
nearly constant even with large changes in current as long as the zener diodes current remains
between the breakdown current IZ(min) and the maximum current rating IZ(max).

This ability to control itself can be used to great effect to regulate or stabilize a voltage source
against supply or load variations. The fact that the voltage across the diode in the breakdown
region is almost constant turns out to be an important application of the zener diode as a
voltage regulator. The function of a regulator is to provide a constant output voltage to a load
connected in parallel with it in spite of the ripples in the supply voltage or the variation in the
load current and the zener diode will
continue to regulate the voltage until the diodes current falls below the minimum IZ(min) value in
the reverse breakdown region.

PRINCIPLE OF OPERATION AND CHARACTERISTICS OF TUNNEL DIODE

A tunnel diode or Esaki diode is a type of semiconductor diode which is capable of very fast
operation, well into the microwave frequency region, by using quantum mechanical effects.

It was invented in August 1957 by Leo Esaki when he was with Tokyo Tsushin Kogyo, now
known as Sony. In 1973 he received the Nobel Prize in Physics, jointly with Brian Josephson,
for discovering the electron tunneling effect used in these diodes. Robert Noyce independently
came up with the idea of a tunnel diode while working for William Shockley, but was
discouraged from pursuing it.

Fig 1.19: Tunnel diode schematic symbol

These diodes have a heavily doped p–n junction only some 10 nm (100 Å) wide. The heavy
doping results in a broken bandgap, where conduction band electron states on the n-side are
more or less aligned with valence band hole states on the p-side. Tunnel diodes were
manufactured by Sony for the first time in 1957 followed by General Electric and other
companies from about 1960, and are still made in low volume today. Tunnel diodes are usually
made from germanium, but can also be made in gallium arsenide and silicon materials. They
can be used as oscillators, amplifiers, frequency converters and detectors.Tunnelling
Phenomenon:

In a conventional semiconductor diode, conduction takes place while the p–n junction is
forward biased and blocks current flow when the junction is reverse biased. This occurs up to a
point known as the “reverse breakdown voltage” when conduction begins (often accompanied by
destruction of the device). In the tunnel diode, the dopant concentration in the p and n layers
are increased to the point where the reverse breakdown voltage becomes zero and the
diode conducts in the reverse direction. However, when forward-biased, an odd effect occurs
called “quantum mechanical tunnelling” which gives rise to a region where an increase in
forward voltage is accompanied by a decrease in forward current. This negative resistance
region can be exploited in a solid state version of the dynatron oscillator which normally uses a
tetrode thermionic valve (or tube).

Forward bias operation

Under normal forward bias operation, as voltage begins to increase, electrons at first tunnel
through the very narrow p–n junction barrier because filled electron states in the conduction
band on the n-
side become aligned with empty valence band hole states on the p-side of the p-n junction. As
voltage increases further these states become more misaligned and the current drops – this is
called negative resistance because current decreases with increasing voltage. As voltage
increases yet further, the diode begins to operate as a normal diode, where electrons travel by
conduction across the p–n junction, and no longer by tunneling through the p–n junction
barrier. Thus the most important operating region for a tunnel diode is the negative resistance
region.

Reverse bias operation

When used in the reverse direction they are called back diodes and can act as fast rectifiers
with zero offset voltage and extreme linearity for power signals (they have an accurate square
law characteristic in the reverse direction).

Under reverse bias filled states on the p-side become increasingly aligned with empty states
on the n- side and electrons now tunnel through the pn junction barrier in reverse direction –
this is the Zener effect that also occurs in zener diodes.

Technical comparisons

Fig 1.20a: current-voltage characteristic of tunnel diode

A rough approximation of the VI curve for a tunnel diode, showing the negative differential
resistance region. The Japanese physicist Leo Esaki invented the tunnel diode in 1958.It
consists of a p-n junction with highly doped regions. Because of the thinness of the junction,
the electrons can pass through the potential barrier of the dam layer at a suitable polarization,
reaching the energy states on the other sides of the junction. The current-voltage characteristic
of the diode is represented in Figure 1.20a. In this sketch i p and Up are the peak, and iv and
Uv are the valley values for the current and voltage
respectively. The form of this dependence can be qualitatively explained by considering the
tunneling processes that take place in a thin p-n junction.

Energy band structure of tunnel diode:

Fig 1.20b Energy band structure of tunnel diode

For the degenerated semiconductors, the energy band diagram at thermal equilibrium is
presented in Figure 1.20b.

In Figure 1.20c the tunneling processes in different points of the current voltage characteristic
for the tunnel diode are presented.
 Advantages of tunnel diodes:

 Environmental immunity i.e. peak point is not a function of temperature.

 Low cost.
 Low noise.
 Low power consumption.
 High speed i.e. tunneling takes place very fast at the speed of light in the order of
nanoseconds
 Simplicity i.e. a tunnel diode can be used along with a d.c supply and a few passive
elements to obtain various application circuits.

Applications for tunnel diodes:

 local oscillators for UHF television tuners

 Trigger circuits in oscilloscopes
 High speed counter circuits and very fast-rise time pulse generator circuits
 The tunnel diode can also be used as low-noise microwave amplifier.

VARACTOR DIODE
Varactor diode is a special type of diode which uses transition capacitance property i.e voltage
variable capacitance .These are also called as varicap,VVC(voltage variable capacitance) or
tuning diodes.

The varactor diode symbol is shown below with a diagram representation.

Fig 1.21a:symbol of varactor diode

When a reverse voltage is applied to a PN junction, the holes in the p-region are attracted to
the anode terminal and electrons in the n-region are attracted to the cathode terminal creating
a region where there is little current. This region ,the depletion region, is essentially devoid of
carriers and behaves as the dielectric of a capacitor.

The depletion region increases as reverse voltage across it increases; and since capacitance
varies inversely as dielectric thickness, the junction capacitance will decrease as the voltage
across the PN junction increases. So by varying the reverse voltage across a PN junction the
junction capacitance can be varied .This is shown in the typical varactor voltage-capacitance
curve below.
 Fig 1.21b:voltage- capacitance curve

Notice the nonlinear increase in capacitance as the reverse voltage is decreased. This
nonlinearity allows the varactor to be used also as a harmonic generator.

Major varactor considerations are:

(a) Capacitance value
(b) Voltage
(c) Variation in capacitance with voltage.
(d) Maximum working voltage
(e) Leakage current

Applications:

 Tuned circuits.
 FM modulators
 Automatic frequency control devices
 Adjustable bandpass filters
 Parametric amplifiers
 Television receivers.

PRINCIPLE OF OPERATION OF SCR

A silicon-controlled rectifier (or semiconductor-controlled rectifier) is a four-layer solid
state device that controls current. The name "silicon controlled rectifier" or SCR is General
Electric's trade name for a type of thyristor. The SCR was developed by a team of power
engineers led by Gordon Hall and commercialized by Frank W. "Bill" Gutzwiller in 1957.symbol
of SCR is given below:
Fig 1.22: symbol of SCR

Construction of SCR

An SCR consists of four layers of alternating P and N type semiconductor materials. Silicon is
used as the intrinsic semiconductor, to which the proper dopants are added. The junctions are
either diffused or alloyed. The planar construction is used for low power SCRs (and all the
junctions are diffused). The mesa type construction is used for high power SCRs. In this case,
junction J2 is obtained by the diffusion method and then the outer two layers are alloyed to it,
since the PNPN pellet is required to handle large currents. It is properly braced with tungsten
or molybdenum plates to provide greater mechanical strength. One of these plates is hard
soldered to a copper stud, which is threaded for attachment of heat sink. The doping of PNPN
will depend on the application of SCR, since its characteristics are similar to those of the
thyratron. Today, the term thyristor applies to the larger family of multilayer devices that exhibit
bistable state-change behaviour, that is, switching either ON or OFF.

The operation of a SCR and other thyristors can be understood in terms of a pair of tightly
coupled bipolar junction transistors, arranged to cause the self-latching action.The following
figures are construction of SCR,its two transistor model and symbol respectively

Fig 1.23: Construction, Two transistor model of SCR and symbol of SCR
SCR Working Principle

Fig 1.24: Current flow and voltage bias in an SCR

The SCR is a four-layer, three-junction and a three-terminal device and is shown in fig.1.24.
The end P- region is the anode, the end N-region is the cathode and the inner P-region is the
gate. The anode to cathode is connected in series with the load circuit. Essentially the device
is a switch. Ideally it remains off (voltage blocking state), or appears to have an infinite
impedance until both the anode and gate terminals have suitable positive voltages with respect
to the cathode terminal. The thyristor then switches on and current flows and continues to
conduct without further gate signals. Ideally the thyristor has zero impedance in conduction
state. For switching off or reverting to the blocking state, there must be no gate signal and the
anode current must be reduced to zero. Current can flow only in one direction.

In absence of external bias voltages, the majority carrier in each layer diffuses until there is a
built-in voltage that retards further diffusion. Some majority carriers have enough energy to
cross the barrier caused by the retarding electric field at each junction. These carriers then
become minority carriers and can recombine with majority carriers. Minority carriers in each
layer can be accelerated across each junction by the fixed field, but because of absence of
external circuit in this case the sum of majority and minority carrier currents must be zero.

A voltage bias, as shown in figure, and an external circuit to carry current allow internal
currents which include the following terms:

The current Ix is due to

 Majority carriers (holes) crossing junction J1

 Minority carriers crossing junction J1
 Holes injected at junction J2 diffusing through the N-region and crossing junction J1 and
 Minority carriers from junction J2 diffusing through the N-region and crossing junction J1.
V I characteristics of SCR:

Fig 1.25: V-I characteristics of SCR

As already mentioned, the SCR is a four-layer device with three terminals, namely, the anode,
the cathode and the gate. When the anode is made positive with respect to the cathode,
junctions J1 and J3 are forward biased and junction J2 is reverse-biased and only the leakage
current will flow through the device. The SCR is then said to be in the forward blocking state or
in the forward mode or off state. But when the cathode is made positive with respect to the
anode, junctions J1 and J3 are reverse-biased, a small reverse leakage current will flow
through the SCR and the SGR is said to be in the reverse blocking state or in reverse mode.

When the anode is positive with respect to cathode i.e. when the SCR is in forward mode, the
SCR does not conduct unless the forward voltage exceeds certain value, called the forward
breakover voltage, VFB0. In non-conducting state, the current through the SCR is the leakage
current which is very small and is negligible. If a positive gate current is supplied, the SCR can
become conducting at a voltage much lesser than forward break-over voltage. The larger the
gate current, lower the break-over voltage. With sufficiently large gate current, the SCR
behaves identical to PN rectifier. Once the SCR is switched on, the forward voltage drop
across it is suddenly reduced to very small value, say about 1 volt. In the conducting or on-
state, the current through the SCR is limited by the external impedance.
When the anode is negative with respect to cathode, that is when the SCR is in reverse mode
or in blocking state no current flows through the SCR except very small leakage current of the
order of few micro-amperes. But if the reverse voltage is increased beyond a certain value,
called the reverse break- over voltage, VRB0 avalanche break down takes place. Forward
break-over voltage VFB0 is usually higher than reverse breakover voltage,VRBO.

From the foregoing discussion, it can be seen that the SCR has two stable and reversible
operating states. The change over from off-state to on-state, called turn-on, can be achieved
by increasing the forward voltage beyond VFB0. A more convenient and useful method of turn-
on the device employs the gate drive. If the forward voltage is less than the forward break-over
voltage, VFB0, it can be turned-on by applying a positive voltage between the gate and the
cathode. This method is called the gate control. Another very important feature of the gate is
that once the SCR is triggered to on-state the gate loses its control.

The switching action of gate takes place only when

(i) SCR is forward biased i.e. anode is positive with respect to cathode, and

(ii) Suitable positive voltage is applied between the gate and the cathode.

Once the SCR has been switched on, it has no control on the amount of current flowing
through it. The current through the SCR is entirely controlled by the external impedance
connected in the circuit and the applied voltage. There is, however, a very small, about 1 V,
potential drop across the SCR. The forward current through the SCR can be reduced by
reducing the applied voltage or by increasing the circuit impedance. There is, however, a
minimum forward current that must be maintained to keep the SCR in conducting state. This is
called the holding current rating of SCR. If the current through the SCR is reduced below the
level of holding current, the device returns to off-state or blocking state.

The SCR can be switched off by reducing the forward current below the level of holding current
which may be done either by reducing the applied voltage or by increasing the circuit
impedance.

Note : The gate can only trigger or switch-on the SCR, it cannot switch off.

Alternatively the SCR can be switched off by applying negative voltage to the anode (reverse
mode), the SCR naturally will be switched off.

Here one point is worth mentioning, the SCR takes certain time to switch off. The time, called
the turn- off time, must be allowed before forward voltage may be applied again otherwise the
device will switch-on with forward voltage without any gate pulse. The turn-off time is about 15
micro-seconds, which is immaterial when dealing with power frequency, but this becomes
important in the inverter circuits, which are to operate at high frequency.
Merits of SCR

1.Very small amount of gate drive is required.

2.SCRs with high voltage and current ratings are
available. 3.On state losses of SCR are less.

Demerits of SCR

1.Gate has no control,once SCR is turned

on. 2.External circuits are required for
turning it off. 3.Operationg frequencies are
low.
4.Additional protection circuits are required.

Application of SCRs

SCRs are mainly used in devices where the control of high power, possibly coupled with high
voltage, is demanded. Their operation makes them suitable for use in medium to high-voltage
AC power control applications, such as lamp dimming, regulators and motor control.

SCRs and similar devices are used for rectification of high power AC in high-voltage direct
current power transmission

PHOTO DIODE

The photo diode is a semiconductor p-n junction device whose region of operation is
limited to the reverse biased region.The figure below shows the symbol of photodiode

Fig 1.26:Symbol of photodiode.

Principle of operation:

A photodiode is a type of photo detector capable of converting light into either current or
voltage, depending upon the mode of operation. The common, traditional solar cell used to
generate electric solar power is a large area photodiode. A photodiode is designed to operate
in reverse bias. The deletion region width is large. Under normal conditions it carries small
reverse current due to minority charge carriers. When light is incident through glass window
on the p-n junction, photons in the light bombard the p-n junction and some energy s imparted
to the valence electrons. So valence electrons
break covalent bonds and become free electrons. Thus more electron-hole pairs are
generated. Thus total number of minority charge carriers increases and hence reverse current
increases.This is the basic principle of operation of photo diode.

Fig 1.27: Basic Biasing Arrangement and construction of photodiode and symbols

Characteristics of photodiode:

When the P-N junction is reverse-biased, a reverse saturation current flows due to thermally
generated holes and electrons being swept across the junction as the minority carriers. With
the increase in temperature of the junction more and more hole-electron pairs are created and
so the reverse saturation current I 0 increases. The same effect can be had by illuminating the
junction. When light en- ergy bombards a P-N junction, it dislodges valence electrons. The
more light striking the junction the larger the reverse current in a diode. It is due to generation
of more and more charge carriers with the increase in level of illumination. This is clearly
shown in ‘ figure for different intensity levels. The dark current is the current that exists when
no light is incident. It is to be noted here that current becomes zero only with a positive applied
bias equals to VQ. The almost equal spacing between the curves for the same increment in
luminous flux reveals that the reverse saturation current I0 increases linearly with the luminous
flux as shown in figure. Increase in reverse voltage does not increase the reverse current
significantly, because all available charge carriers are already being swept across the junction.
For reducing the reverse saturation current I0 to zero, it is necessary to forward bias the
junction by an amount equal to barrier potential. Thus the photodiode can be used as a
photoconductive device.
Fig 1.28: characteristics of photodiode

On removal of reverse bias applied across the photodiode, minority charge carriers continue to
be swept across the junction while the diode is illuminated. This has the effect of increasing the
concentration of holes in the P-side and that of electrons in the N-side But the barrier potential
is negative on the P-side and positive on the N-side, and was created by holes flowing from P
to N-side and electrons from N to P-side during fabrication of junction. Thus the flow of minority
carriers tends to reduce the barrier potential.

When an external circuit is connected across the diode terminals, the minority carrier; return to
the original side via the external circuit. The electrons which crossed the junction from P to N-
side now flow out through the N-terminal and into the P-terminal This means that the device is
behaving as a voltage cell with the N-side being the negative terminal and the P-side the
positive terminal. Thus, the photodiode is & photovoltaic device as well as photoconductive
device.

Advantages:
The advantages of photodiode are:
1.It can be used as variable resistance
device. 2.Highly sensitive to the light.
3.The speed of operation is very high.

Disadvantages:
1.Temperature dependent dark
current. 2.poor temperature stability.
3.Current needs amplification for driving other circuits.

Applications:

1.Alarm system.
2.counting
system.
Unijunction Transistor (UJT)
UJT stands for UniJunction Transistor. It is a three terminal semiconductor switching
device. The Unijunction Transistor is a simple device that consists of a bar of n-type
silicon material with a non-rectifying contact at either end (base 1 and base 2), and with
a rectifying contact (emitter) alloyed into the bar part way along its length, to form the
only junction within the device (hence the name ‘Unijunction’).
The Unijunction Transistor is also known as Double Base Diode.

The unique switching characteristics of UJT makes it different from conventional BJT’s
and FET’s by acting as switching transistor instead of amplifying the signals. It exhibits
negative resistance in its characteristics which employs it as relaxation oscillators in
variety of applications.

Symbol and Construction of Unijunction Transistor

(UJT)
In Unijunction Transistor, the PN Junction is formed by lightly doped N type silicon bar
with heavily doped P type material on one side. The ohmic contact on either ends of the
silicon bar is termed as Base 1 (B1) and Base 2 (B2) and P-type terminal is named as
emitter.

Fig. 2 – Basic Construction & Symbol of Unijunction Transistor (UJT)

The emitter junction is placed such that it is more close to terminal Base 2 than Base 1.
The symbols of both UJT and JFET resemble the same except the emitter arrowhead
represents the direction in which conventional current flow, but they operate differently.
The simplified equivalent circuit (at Figure 3 below) shows that N-type channel consists
of two resistors RB2 and RB1 in series with an equivalent diode, D representing the PN
junction. The emitter PN junction is fixed along the ohmic channel during its
manufacturing process.

Fig. 3 – Simplified Equivalent Circuit of Unijunction Transistor (UJT)

The variable resistance RB1 is provided between the terminals Emitter (E) and Base 1
(B1), the RB2 between the terminals Emitter (E) and Base 2 (B2). Since the PN junction
is more close to B2, the value of RB2 will be less than the variable resistance RB1.
A voltage divider network is formed by the series resistances RB2 and RB1. When a
voltage is applied across the semiconductor device, the potential will be in proportion to
the position of base points along the channel.

The Emitter (E) will act as input when employed in a circuit, as the terminal B 1 will be
grounded. The terminal B2 will be positive biased to B1, when a voltage (VBB) applied
across the terminals B1 and B2. When the emitter input is zero, the voltage across
resistance RB1 of the voltage divider circuit is calculated by

The important parameter of Unijunction Transistor is ‘intrinsic stand-off ratio’ (η), which
is resistive ratio of RB1 to RBB. Most UJT’s have η value ranging from 0.5 to 0.8. The PN
junction is reverse biased; when small amount of voltage which is less than voltage
developed across resistance RB1 (ηVBB) is applied across the terminal emitter (E).
 Thus a very high impedance is developed prompting device to move into non-
conducting state i.e., it will be switched off and no current flows through it. The UJT
begins to conduct when the PN junction is forward biased.

The forward biased is achieved when voltage applied across emitter terminal is
increased and becomes more than VRB1. This results in larger flow of emitter current
from emitter region to base region. Increase in emitter current reduces the resistance
between emitter and Base 1, resulting in negative resistance at emitter terminal.

The Unijunction Transistor (UJT) will act as voltage breakdown device, when the input
applied between emitter and base 1 reduces below breakdown value i.e., RB1
increases to a higher value. This shows that RB1 depends on the emitter current and it
is variable.

Characteristics Curve of Unijunction Transistor (UJT)

The characteristics of Unijunction Transistor (UJT) can be explained by three
parameters:

o Cutoff
o Negative Resistance Region
o Saturation
 Fig. 4 – Characteristics of Unijunction Transistor (UJT)
Cutoff
Cutoff region is the area where the Unijunction Transistor (UJT) doesn’t get sufficient
voltage to turn on. The applied voltage hasn’t reached the triggering voltage, thus
making transistor to be in off state.
Negative Resistance Region
When the transistor reaches the triggering voltage, VTRIG, Unijunction Transistor (UJT)
will turn on. After a certain time, if the applied voltage increases to the emitter lead, it
will reach out at VPEAK. The voltage drops from VPEAK to Valley Point even though the
current increases (negative resistance).
Saturation
Saturation region is the area where the current and voltage raises, if the applied voltage
to emitter terminal increases.
Applications of Unijunction Transistor (UJT)
The Unijunction Transistor can be employed in variety of applications such as:

o Switching Device
o Triggering Device for Triacs and SCR’s
o Timing Circuits
o For phase control
o In sawtooth generators
o In simple relaxation oscillators

Application of Unijunction Transistor (UJT) in Relaxation Oscillator

UJT Relaxation Oscillator can be practically viewed by the following circuit.
 Fig. 5 – Use of Unijunction Transistor (UJT) in Relaxation Oscillator
The resistance R3 charges the capacitor C1 until the peak point. The UJT’s emitter
terminal has no effect on C1 until peak point is reached. When the emitter voltage
reaches peak voltage point, the lowered emitter base 1 resistance rapidly discharges
the capacitor.
As the capacitor C1 discharges beneath the valley point, the emitter base 1 resistance
will return back to high resistance, thus making capacitor free to charge again.

Application of Unijunction Transistor (UJT) in Speed Control Circuit

Speed Control Circuit is one of the typical applications of UJT to produce set of pulses
to trigger and control Thyristor. We can adjust the speed of universal motors by using
UJT as triggering circuit in combination with SCR and Triacs.

Advantages of Unijunction Transistor (UJT)

The advantages of Unijunction Transistor include:

o low cost
o negative resistance characteristics
o Requires low value of triggering current.
o A stable triggering voltage
o Low power absorbing device
Disadvantage of Unijunction Transistor (UJT)
The main disadvantage of Unijunction Transistor is its inability to provide appropriate
amplification.