2024-Session 03-IMA Case Study
2024-Session 03-IMA Case Study
Estimated /
Required
High Level Kind of Expected
Functions (High Level Functionality decomposition) DAL Computation
Functionality function Computation
Rates
Time
Before printing, think about the environment
.
VFE VFE
Compute the The VFE function embeds the required functionality for
100Hz Low
flap HMI computing the flap overspeed taking account the aircraft B
(10ms) (0.25ms approx.)
overspeed airspeed and flap position.
indication VFE (Maximum flap extended speed).
UTOW
UTOW
Indicate and
The UTOW function embeds the required functionality for
compute part
computing the proper configuration, at the beginning of the 100Hz Low
of the Unsafe HMI B
take-off roll, of some subsystems pertaining to the Flight (10ms) (0.25ms approx.)
Take Off
Control System which are configurable for the take-off and
Warning
indicating the warning in cockpit.
CBIT
Perform the CBIT
PBIT The CBIT function embeds the required functionality for
100Hz High
procedure at Autotest performing the reduced and continuous automatic shelf-tests at C
(10ms) (1.5ms approx.)
item of item level.
equipment Only In Flight.
level
IBIT IBIT
Perform the The IBIT function embeds the required functionality for
IBIT performing the selectable extensive shelf-tests at item or
procedure at subsystem level. 50 Hz Medium
Autotest D
item of Only On Ground. (20ms) (0.5ms approx.)
equipment or Despite this function is manually launched at any moment On
subsystem Ground, consider that a slot every 20ms shall be booked in
level order to treat such request.
MAINT
The Maintenance function embeds the required functionality
Calibration 50 Hz Medium
Maintenance for performing the successive calibration operations on D
of Sensors (20ms) (0.5ms approx.)
sensors.
Only On Ground.
IO
The Input/Output function allows the acquisition of the 100Hz High
IO Input/Output A
information from sensors and to send the required information (10ms) (1ms approx.)
to other destination computers.
1. To identify the Partitions for a Partitioning Architecture of the new FCC in order to allocate all the
previous identified functions and considering, in addition the following recommendations:
- All the access to the FCC physical interfaces (ARINC429 Inputs/Outputs, Discrete
Inputs/Outputs and Analogue Inputs/Outputs) shall be implemented in one single “I/O
Partition” (all the Software Drivers for accessing such interfaces will be installed in that I/O
Partition) and that it shall be scheduled the first in order to ensure that all the information
from sensors is acquired before the rest of the functionality is executed.
- All the similar functionality (e.g. Trim, Damper, BIT, etc.) shall be integrated inside the same
partition when possible.
- Functionality of different DAL cannot be integrated inside the same partition.
.
2. Considering the Partitions identified and defined (duration and period) within the previous step, to
determine the Partitions Schedule and compute the MAF (Major Frame).
3. Considering the following scenario and data, where 2 Partitions “Pitch Control Partition” and
“Yaw Control Partition” were identified:
Partition Task Description DAL Computation Deadline Computation Time Task Priority (255 →
Rates Highest Priority)
PITCH_CONTROL 1ms
Task A 1ms 0.25ms 255
0.5ms
PITCH_CONTROL PITCH_TRIM Task A 0,5ms 0.25ms 250
PARTITION
2ms
PITCH_DAMPING
A 2ms 0,5ms 240
Task
YAW_CONTROL
B 1,25ms 1,25ms 0,25ms 255
Task
YAW_DAMPING
B 10ms 10ms 0,50ms 240
Task
To determine the execution scheduler for the tasks running inside every of the 2 partitions,
considering a Preemptive priority‐based scheduling approach. Important to consider that all
the tasks are ready to be executed from T=0ms and that the deadline parameter shall be
considered to determine the execution sequence.
4. Finally, the FCS has to allocate a new high frequency task to implement the communication
and exchange with the actuators interfaces to ensure that no data is lost in the Serial link with
them. The current computation core cannot allocate such functionality due to lack of
performance, so another core within the multicore architecture of the computer shall be
activated, where such a new functionality will be allocated.
Define the partitioning architecture and compute the MAF for such second core considering
the following information and parameters:
Functions (High Level Functionality decomposition) DAL Required Computation Rates Computation Time
SERIAL ACTUATOR COMMANDS
Communication with the Actuator to send the Actuation A 1kHz (1ms) 0,5ms
Commands.
SERIAL ACTUATOR STATUS
Communication with the Actuator to receive the Actuator B 200 Hz (5ms) 2,5ms
Status.
Once that the partitioning architecture was defined, ¿is there some capacity in this core to
integrate some additional functionality? If affirmative, ¿what is the period and duration
available for its execution?