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COAL - Week 5 - Chap 2 (William Stallings)

The document discusses performance metrics in computer organization, focusing on clock speed, cycles per instruction (CPI), and execution time. It explains how these metrics affect CPU efficiency and performance, highlighting the differences between RISC and CISC architectures. Additionally, it includes examples and review questions to reinforce understanding of these concepts.

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0% found this document useful (0 votes)
21 views52 pages

COAL - Week 5 - Chap 2 (William Stallings)

The document discusses performance metrics in computer organization, focusing on clock speed, cycles per instruction (CPI), and execution time. It explains how these metrics affect CPU efficiency and performance, highlighting the differences between RISC and CISC architectures. Additionally, it includes examples and review questions to reinforce understanding of these concepts.

Uploaded by

nazirkinzyy
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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+

Computer Organization and Assembly


Language
Spring-2025
Instructor: Engr. Amna Bibi

William Stallings
Computer Organization
and Architecture
10th Edition
© 2016 Pearson Education, Inc., Hoboken,
NJ. All rights reserved.
+ Chapter 2
Performance Issues
© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
+
Clock Speed
◼ A computer's operations (fetching, decoding, arithmetic, etc.)
are controlled by a clock.

◼ The clock speed (or clock rate) is how many times per second
the clock "ticks" — measured in Hertz (Hz).

Example: A 1 GHz processor has 1 billion clock ticks per second.


◼ One clock tick = one clock cycle.

◼ The time between ticks is the cycle time, and it’s the inverse
of the clock speed:

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Why Clock Speed Matters (but
isn't everything)
◼ Faster clock speed usually means faster operations — but not
always.

◼ Instructions like load, store, branch etc., take different amounts


of cycles to execute.

◼ Processors also use techniques like pipelining, where multiple


instructions are in progress at once.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Instruction Execution Metrics
◼ Instruction Count (Ic): Total number of machine instructions
a program runs.

◼ CPI (Cycles Per Instruction): Average number of clock


cycles per instruction.

◼ If a program has a mix of instruction types:

◼ Execution Time (T):

Or in terms of clock speed:

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
CPI
◼ Cycles Per Instruction (CPI) is a crucial metric that provides a
clear picture of a CPU's efficiency and performance.

◼ CPI measures the average number of clock cycles required to


execute an instruction in a program. It is calculated as the
ratio of the total number of CPU cycles to the total number of
instructions executed.

How CPI Reflects CPU Performance

◼ A lower CPI indicates a more efficient CPU, as fewer cycles


are needed to execute each instruction. Conversely, a higher
CPI suggests that more cycles are required, indicating
potential inefficiencies in the CPU or the program being
executed.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
CPI
Understanding CPI Calculation

Basic Formula

The basic formula for calculating CPI is:

CPI = Total CPU Cycles / Total Instructions Executed

Weighted Average Calculation

In real-world applications, different types of instructions may take


different numbers of cycles. The weighted average formula
accounts for this variation:

Where:

I_i is the number of instructions of type i.

CPI_i is the number of cycles for instructions of type i.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
CPI in Different CPU Architectures

◼ RISC vs. CISC

◼ RISC (Reduced Instruction Set Computer): Typically has a


lower CPI due to its simplified instruction set and emphasis
on single-cycle execution.

◼ CISC (Complex Instruction Set Computer): Often has a


higher CPI because of its more complex instructions that may
take multiple cycles to execute.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Interpreting CPI
◼ What High CPI Indicates
◼ Poor instruction-level parallelism.
◼ High memory latency.
◼ Inefficient use of CPU resources.

◼ What Low CPI Indicates


◼ A low CPI typically suggests:
◼ Efficient CPU resource utilization.
◼ High instruction throughput.
◼ Optimal performance for the given workload.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
CPI
Effective CPI (Calculated)

• This is calculated using the instruction mix.

• It shows how many clock cycles each instruction takes on


average, based on how many of each type of instruction
the program uses.

• It’s like saying: “If my program has 50% easy instructions and
50% hard ones, how many clock cycles do I use on average?”

◼ We calculate it like this:

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
CPI
Average CPI (Measured)

• This is usually measured by running the program.

• It shows the real average number of clock cycles per


instruction based on total time and total instructions.

• It’s like checking your watch and counting how long your
program took, then figuring out how many clock cycles each
instruction used on average.

◼ We calculate it like this:

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
CPI

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Clock Speed

◼ If memory is involved, and it's slower than the processor:

Where,

◼ p = processor cycles

◼ m = memory references

◼ k = ratio of memory cycle time to processor cycle time

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Performance Metrics
◼ MIPS (Millions of Instructions Per Second):

Now, the execution time formula is:

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+ Performance Metrics
◼ Now plug this expression for T into the MIPS formula:

◼ This formula tells you the MIPS rate depends directly on the clock speed
(f) and inversely on the CPI.

So, a faster clock and lower CPI mean better performance.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Performance Metrics

◼ MIPS (Millions of Instructions Per Second):

◼ MFLOPS = Millions of floating-point operations per second —


used in scientific or graphics-heavy tasks.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+ Book Example 2.2
◼ A program runs 2 million instructions on a 400 MHz processor.
Given the instruction types and their frequencies:

Formulas Used

1. Average CPI (Cycles Per Instruction):

2. MIPS (Millions of Instructions Per Second):

Where:

f = processor clock speed in Hz

CPI = average cycles per instruction


© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
+
Book Example 2.2
Given

• Clock speed: f=400 MHz=400×10^6

• Total instructions: 2 million (not needed directly for MIPS)

• Instruction breakdown:

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Book Example 2.2
Step-by-Step Solution

1. Calculate Average CPI:

Calculate MIPS:

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Book Review Questions
Question 2.1

◼ A benchmark program is run on a 40 MHz processor. The


executed program consists of 100,000 instruction executions,
with the following instruction mix and clock cycle count:

◼ Determine the effective CPI, MIPS rate, and execution time


for this program.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Book Review Questions
Question 2.1

◼ A benchmark program is run on a 40 MHz processor. The


executed program consists of 100,000 instruction executions,
with the following instruction mix and clock cycle count:

◼ Determine the effective CPI, MIPS rate, and execution time


for this program.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Book Review Questions
Question 2.1

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Book Review Questions
Question 2.1

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Book Review Questions
Question 2.1

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Book Review Questions
Question 2.2

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+ Book Review Questions
Question 2.2

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+ Book Review Questions
Question 2.2

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+ Book Review Questions
Question 2.2

Part B) Comments:

◼ Machine B has better CPI and higher MIPS, meaning it's more efficient on a per-
instruction basis.

◼ However, Machine A is faster overall — completing its task in 0.20s vs 0.23s.This is


because Machine B has more instructions to execute, even if they’re slightly more
efficient.

◼ Key takeaway: Fewer instructions (Machine A) can still mean better


performance, even if CPI is slightly worse.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+ Book Review Questions
Question 2.2
◼ The results show something interesting: Machine B has a higher MIPS (Millions of
Instructions Per Second) rate than Machine A, meaning it seems to process more
instructions each second. However, Machine B actually takes longer to finish the
program.

◼ This happens because MIPS alone doesn’t tell the whole story. Just because a
machine can execute more instructions per second doesn’t mean it will finish a
program faster. The time it takes also depends on:
◼ The number of instructions the machine has to execute (instruction count).
◼ How many cycles each instruction takes to complete (Cycles Per Instruction, or CPI).

◼ In this case, although Machine B has a higher MIPS rate, its overall execution time
is still longer because it has a slightly higher instruction count or a different mix of
instructions.

◼ This shows that execution time (the actual time to finish the program) is a more
reliable measure of performance than just MIPS alone.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Book Review Questions
Question 2.3

◼ Early examples of CISC and RISC design are the VAX 11/780 and
the IBM RS/6000, respectively. Using a typical benchmark program,
the following machine characteristics result:

◼ The final column shows that the VAX required 12 times longer than
the IBM measured in CPU time.

a) What is the relative size of the instruction count of the machine


code for this benchmark program running on the two machines?

b) What are the CPI values for the two machines?

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Book Review Questions
Question 2.3

◼ From the CPU time row:


The VAX takes 12 times longer than the IBM RS/6000.
So, we’ll assume

◼ CPU time of IBM = x,

then

◼ CPU time of VAX = 12x

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Book Review Questions
Question 2.3

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Book Review Questions
Question 2.3

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Book Review Questions
Question 2.3

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Additional Review Questions
Additional Question 1

◼ A program runs on a 3.2 GHz processor and executes


250,000 instructions. The instruction mix is as follows:
◼ 50% arithmetic (1 cycle)
◼ 30% memory access (2 cycles)
◼ 20% control transfer (3 cycles)

◼ Calculate the effective CPI, MIPS, and execution time of the


program.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Additional Review Questions
Additional Question 1
Solution

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Additional Review Questions
Additional Question 1
Solution

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Additional Review Questions
Additional Question 2

Two processors, P1 and P2, have the following specs:

• P1: Clock rate = 2.5 GHz, CPI = 1.8, Instruction count = 1.2
million

• P2: Clock rate = 3.0 GHz, CPI = 2.0, Instruction count = 1.0
million

Which processor has better performance? Justify with CPU


time and MIPS comparison.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Additional Review Questions
Additional Question 2
Solution

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Additional Review Questions
Additional Question 2
Solution

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Additional Review Questions
Additional Question 2
Solution

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Additional Review Questions
Additional Question 2
Solution

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Additional Review Questions
Additional Question 3

◼ Processor A has a MIPS rating of 120 and completes a


benchmark program in 20 seconds. Processor B has a MIPS
rating of 150 but completes the same program in 25 seconds.
◼ Which processor is faster?
◼ Does a higher MIPS always mean better performance? Explain
your reasoning.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Additional Review Questions
Additional Question 3
Solution

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Additional Review Questions
Additional Question 3

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Additional Review Questions
Additional Question 3

◼ Use the formula:

Instruction count = MIPS × execution time × 10⁶

◼ A: 120 × 20 = 2.4 × 10⁹ instructions

◼ B: 150 × 25 = 3.75 × 10⁹ instructions

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Additional Review Questions
Additional Question 3

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Additional Review Questions
Additional Question 4

◼ A new compiler optimization reduces the instruction count of


a program by 20%, but increases the average CPI by 10%.

◼ If the original instruction count was 2 million and CPI was 2.5,
what is the percentage change in CPU execution time?

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Additional Review Questions
Additional Question 4

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Additional Review Questions
Additional Question 5

◼ Given two machines (M1 and M2) with the same instruction
set:

◼ M1: Clock cycle time = 0.5 ns, CPI = 1.6

◼ M2: Clock cycle time = 0.8 ns, CPI = 1.1

◼ For a program with 500,000 instructions, determine which


machine is faster.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Additional Review Questions
Additional Question 5

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Additional Review Questions
Additional Question 5

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

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