Rev. No.

01
Nadar Saraswathi College of Engineering and Technology, Date 12-11-2015
Vadapudupatti, Theni - 625 531 Total Pages

TWO MARKS
For the Academic Year 2017 - 18 (Odd/Even Semester)

Staff Name Mr.R.Karthik Kumar Dept. / Designation ECE/AP Strength 41

Course/Branch B.E/CSE Year / Semester II/IV Credit 03

Subject Code/Choice EC6504/ Core / Elective Subject Name Microprocessor& Microcontroller

TWO MARKS

UNIT-I
THE 8086 MICROPROCESSOR

1. What is microprocessor?

A microprocessor is a multipurpose, programmable, clock-driven, register-based

electronic device that reads binary information from a storage device called memory, accepts
binary data as input and processes data according to those instructions, and provides result as
output.

2. What is Accumulator?

The Accumulator is an 8-bit register that is part of the arithmetic/logic unit (ALU). This
register is used to store 8-bit data and to perform arithmetic and logical operations. The result of
an operation is stored in the accumulator. The accumulator is also identified as register A.

3. What is stack? [EE2354April/May2013]

The stack is a group of memory locations in the R/W memory that is used for temporary
storage of binary information during the execution of a program

4. What is a subroutine program?

A subroutine is a group of instructions written separately from the main program to

perform a function that occurs repeatedly in the main program. Thus subroutines avoid the
repetition of same set of instructions in the main program.

5. Write a program to add a data byte located at offset 0500H in 2000H segment to another
data byte available at 0600H in the same segment and store the result at 0700H in the same
segment.

MOV AX, 2000H; initialize DS with value

MOVDS, AX; 2000H

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MOV AX, [500H]; Get first data byte from 0500H offset

ADD AX, [600H]; Add this to the second byte from 0600H

MOV [700H], AX; store AX in 0700H

HLT; Stop.

6. What are the different types of addressing modes of 8086 instruction set? [Nov/Dec2013]
[Apr/May 2015]
The different addressing modes are

i. Immediate

ii. Direct

iii. Register

iv. Register indirect

v. Indexed

vi. Register relative

vii. Based indexed

viii. Relative based indexed.

7. What are the different types of instructions in 8086 microprocessor? [May/Jun2011]

The different types of instructions in 8086 microprocessor are:

i. Data copy / transfer instructions

ii. Arithmetic and logical instructions

iii. Branch instructions

iv. Loop instruction

v. Machine control instruction

vi. Flag manipulation instruction

vii. Shift and rotate instruction

viii. String instruction

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8. What is assembly level programming?

A program called assembler is used to convert the mnemonics of instruction and data into
their equivalent object code modules. The object code modules are further converted into
executable code using linker and loader programs. This type of programming is calledassembly
level programming.

9. What is assembler? [NOV/DEC2014]

The assembler translates the assembly language program text which is given as input to
the assembler to their binary equivalents known as object code. The time required to translate the
assembly code to object code is called access time. The assembler checks for syntax errors &
displays them before giving the object code.

10. Explain ALIGN & ASSUME. [Nov/Dec 2010, April/may2011]

The ALIGN directive forces the assembler to align the next segment at an address
divisible by specified divisor. The format is ALIGN number where number can be 2,4, 8 or 16.
Example ALIGN 8. The ASSUME directive assigns a logical segment to a physical segment at
any given time. It tells the assembler what address will be in the segment registers at execution
time. Example ASSUME CS: code, DS: data, SS: stack

11. Compare Procedure & Macro. [April/May2011]

Procedure Macro

Accessed by CALL & RET instruction Accessed during assembly with name to
during program execution macro when defined

Machine code for instruction is put only Machine code is generated for instruction

Once in the memory each time when macro is called

With procedures less memory is required With macro more memory is required

Parameters can be passed in registers, Parameters passed as part of statement

memory locations or stack Which calls macro

12. What is the maximum memory size that can be addressed by 8086? [April/May 2014]
[Nov/Dec 2014]

In 8086, a memory location is addressed by 20 bit address and the address bus is 20 bit
address and the address bus is 20 bits. So it can address up to one megabyte (220) of memory
space.

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13. What are the 8086 interrupt types? [Apr/May 2015]

Dedicated interrupts

• Type 0: Divide by zero interrupt

• Type 1: Single step interrupt

• Type 2:Nonmaskable interrupt

• Type 3: Breakpoint

• Type 4: Overflow interrupt

Software interrupts: Type 0-255

14. What is interrupt service routine? [NOV/DEC 2011]

Interrupt means to break the sequence of operation. While the CPU is executing a
program an interrupt breaks the normal sequence of execution of instructions & diverts its
execution to some other program. This program to which the control is transferred is called the
interrupt service routine.

15. List the flags of 8086 [MAY/JUNE 2016]

 OF - Overflow Flag. Set if signed number exceeds capacity of result.

 DF - Direction Flag. Set by user to indicate a direction (0=forward, 1=backward)
 IF - Interrupt Flag. Set by user to disable hardware interrupts temporarily
 TF - Trap Flag. Used by debuggers
 SF - Sign Flag
 ZF - Zero Flag
 AF – Aux
 PF - Parity Flag.

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 UNIT II

8086 SYSTEM BUS STRUCTURE

1. Differentiate between minimum and maximum mode [April/May2010]

2. Give any four pin definitions for the minimum mode. [Nov/Dec2008]

3. What are the pins that are used to indicate the type of transfer in minimum mode?

The M/IO, RD, WR lines specify the type of transfer. It is indicated in the following table:

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4. What are the functional parts of 8086 CPU?

The two independent functional parts of the 8086 CPU are:

i. Bus Interface Unit (BIU): BIU sends out addresses, fetches instruction from memory, reads
data from ports and memory and writes data to ports and memory.

ii. Execution Unit (EU):EU tells the BIU where to fetch instructions or data, decodes instructions
and executes instructions.

5. Give the register classification of 8086. [Nov/Dec2012]

The 8086 contains:

i. General purpose registers: They are used for holding data, variables and intermediate
results temporarily.

ii. Special purpose registers: They are used as segment registers, pointers, index register or as
offset storage registers for particular addressing modes.

6. What is the operation of S0, S1 and S2 pins in maximum mode?

S2, S1, S0 indicates the type of transfer to take place during the current bus cycle.

7. Give any four pin definitions for maximum mode.

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8. Give the different segment registers. [April/May2012]

The four segment registers are:

i. Code segment register: It is used for addressing a memory location in the code segment of the
memory, where the executable program is stored.

ii. Data segment register: It points to the data segment of the memory, where data is resided.

iii. Extra segment register: It also contains data.

iv. Stack segment register: It is used for addressing stock segment of memory. It is used to store
stack data.

9. Draw the format of 8086 flag register. [April/May2011]

8086 flag register:

10. What are the three groups of signals in 8086? (Nov/Dec2009)

The 8086 signals are categorized in three groups.

i. The signals having common functions in minimum and maximum mode.

ii. The signals having special functions for minimum mode.

11. What is NMI (Non-Maskable Interrupt)?

NMI is an edge-triggered input, which causes a type 2 interrupt. It is not maskable internally by
software and transition from low to high initiate the interrupt response at the end of the current
instruction. This input is internally synchronized.

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12. What is the function of pin? [April/May2011]

The logic level at pin decides whether processor operates in minimum or maximum
mode.

=0 Maximum Mode

=1 Minimum Mode

13. What is multiprogramming? [Nov/Dec 2015]

If more than one process is carried out at the same time, then it is known as
multiprogramming. Another definition is the interleaving of CPU and I/O operations among
several programs is called multiprogramming. To improve the utilization of CPU and I/O
devices, we are designing to process a set of independent programs concurrently by a single
CPU. This technique is known as multiprogramming.

14. Write the advantages of loosely coupled system over tightly coupled systems?

 More number of CPUs can be added in a loosely coupled system to improve the system
performance
 The system structure is modular and hence easy to maintain and troubleshoot.
 A fault in a single module does not lead to a complete system breakdown.

15. What are the two modes of operations present in 8086? [May/June2007]

i. Minimum mode (or) Uniprocessor system

ii. Maximum mode (or) Multiprocessor system

16. What are the three classifications of 8086 interrupts? [MAY/JUNE-2006]

(1) Predefined interrupts,

(2) User defined Hardware interrupts,

(3) User defined software interrupts.

17. What are the differences between maximum mode and minimum mode [NOV/DEC 2003]

Minimum mode

 A processor is in minimum mode when MN /MX pin is strapped to 5v

 All control signals are given out by microprocessor chip itself

 There is a single micro processor

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Maximum mode

 A processor is in maximum mode when MN /MX is grounded

 The processor drive the status signals S2, Sl and So. Another chip called bus controller
derives control signals using this status information.

 There may be more than one microprocessor

18. What is Coprocessor? [NOV/DEC 2007] [APR/MAY2011]

The coprocessor is a processor which specially designed for processor to work under the
control of the processor and support special processing capabilities. Example : 8087 which has
numeric processing capability and works under 8086.

19. Compare closely coupled and loosely coupled configurations. [NOV/DEC 2011]
[May/June 2016]
Closely coupled Loosely coupled
Single CPU is used
Multiple CPU modules are used
It has local bus only It has local as well system bus

No system memory or IO It has system memory and IO, shared

Bus arbitration logic required among the CPU

No bus arbitration logic required
modes

UNIT III

I/O INTERFACING
1. What is memory mapped I/O? [Nov/Dec 2014]

This is one of the techniques for interfacing I/O devices with μp. In memory mapped I/O, the
I/O devices assigned and identified by 16-bit addresses. To transfer the data between MPU and
I/O devices memory related instructions (such as LDA, STA etc.) and memory control signals
(MEMR, MEMW) are used.

2. What is I/O mapped I/O? [April/May 2013]

This is one of the techniques for interfacing I/O devices with μp. In I/O mapped I/O, the
I/O devices assigned and identified by 8-bit addresses. To transfer the data between MPU and
I/O devices I/O related instructions (IN and OUT ) and I/O control signals (IOR, IOW) are used.

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3. What is USART?

It is a programmable device. Its function and specification for serial I/O can be
determined by writing instructions in its internal registers. The Intel 8251A USART is a device
widely used in serial I/O.

4. Write the features of 8255A. [Nov/Dec 2013]

The 8255A has 24 I/O pins that can be primarily grouped primarily in two 8-bit Parallel
ports: A and B, with eight bits as port C. The 8-bits of port C can be used as two 4-bit ports: C
UPPER CU and CLOWER CL.

5. What is BSR mode?

All functions of 8255 are classified according to 2 modes. In the control word, if D7 = 0,
then it represents bit set reset mode operation. The BSR mode is used to set or reset the bits in
port C.

6. What is mode 0 operation of 8255 [Nov/Dec2011]

In this mode, ports A and B are used as two simple 8-bit I/O ports and port C as two 4-bit
ports. Each port can be programmed to function as an input port or an output port. The input/
output features in mode 0 as follows:
 Outputs are latched
 Inputs are not latched
 Ports do not have handshake or interrupt capability
 Bit set reset mode (BSR)
 I/O mode

7. What are the modes of operation supported by 8255?

 Mode 0
 Mode1
 Mode2

8. Write the control word format for BSR mode.

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9. Write the different types of ADC.

i. Single slope ADC

ii. Dual slope ADC

iii. Successive approximation ADC

iv. Parallel comparator type ADC

v. Counter type ADC

10. List the functions performed by 8279. (April/May2009]

i. It has built-in hardware to provide key debounce.

ii. It provides a scanned interface to a 64 contact key matrix.

iii. It provides multiplexed display interface with blanking and inhibit options.

iv. It provides three input modes for keyboard interface.

11. What is key debounce? [Nov/Dec2014)

The push button keys when pressed, bounces a few times, closing and opening the
contacts before providing a steady reading. So reading taken during bouncing may be faulty.
Therefore the microprocessor must wait until the key reach to steady state. This is known as key
debounce.

12. What are the operating modes in 8279? [Nov/Dec2013]

i. Scanned keyboard mode

ii. Scanned sensor matrix

13. What is N-key rollover? [Nov/Dec2013 & April/May2012]

In N-key rollover each key depression is treated independently from all others. When a
key is depressed, the denounce logic is set and 8279 checks for key depress during next two
scans.
14. List the operating modes of 8255A and 8237A. [NOV/DEC 2015]

8255 has 2 modes.

1. I/O mode-Multiprocessor
 Mode 0
 Mode 1
 Mode 2

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 2. Bit Set-Reset mode (BSR) 8237 has several modes. They are,
 Single mode
 Burst mode
 Block mode
 Demand mode
 Cascade mode

15. What is keydebouncing? [May/June 2016]

When the key is depressed and released, the contact is not broken permanently. In fact, the key
makes and breaks the contacts several times for a few milliseconds before the contact is broken
permanently.

UNIT-IV

MICROCONTROLLER

1. What are the special function register? [EE2354 April/May2012]

The special function register are stack pointer, index pointer (DPL and DPH), I/O port
addresses, status (PSW) and accumulator.

2. What is PSW? [EE2354 Nov/Dec2011]

Program status word (PSW) is the set of flags that contains the status information and is
considered as one of the special function register.

3. What is stack pointer (sp)? [EE2354 April/May2011]

Stack pointer (SP) is a 8 bit wide register and is incremented before the data is stored into
the stack using PUSH or CALL instructions. It contains 8-bit stack top address. It is defined
anywhere in the on-chip 128-byte RAM. After reset, the SP register is initialized to 07. After
each write to stack operation, the 8-bit contents of the operand are stored onto the stack, after
incrementing the SP register by one. It is not a top-down data structure. It is allotted an address
in the special function register bank.

4. What is data pointer (DTPR)? [Nov/Dec2010]

It is a 16-bit register that contains a higher byte (DPH) and lower byte (DPL) of a 16-bit
external data RAM address. It is accessed as a 16-bit register or two 8-bit registers. It has been
allotted two addresses in the special function register bank, for its two bytes DPH and DPL.

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5. Explain the two power saving mode of operation. [April/May2011]
The two power saving modes of operation are:

 Idle mode: In this mode, the oscillator continues to run and the interrupt, serial port and
timer blocks are active, but the clock to the CPU is disabled. The CPU status is
preserved. This mode can be terminated with a hardware interrupt or hardware reset
signal. After this, the CPU resumes program execution from where it left off.

 Power down mode: In this mode, the on-chip oscillator is stopped. All the functions of
the controller are held maintaining the contents of RAM. The only way to terminate this
mode is hardware reset. The reset redefines all the SFRs but the RAM contents are left
unchanged.

6. Give the addressing modes of 8051? [April/May 2011]

There are six addressing modes in 8051.They are

 Direct addressing
 Indirect addressing
 Register instruction
 Register specific (register implicit)
 Immediate mode
 Indexed addressing

7. List the five addressing modes of 8051 microcontroller. [Nov/Dec2010]

Thefive addressing modes are,


 Immediate addressing
 Register addressing

 Direct addressing
 Register indirect addressing
 Indexed addressing.

8. List out some compare instructions. [EE2354May/June2014]

The compare instructions are:

a. CJNE
b. CLR
c. CPL

9. List the features of 8051 microcontroller? [May/June2013]

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 The features are

 Single supply +5 volt operation using HMOS technology.

 4096 bytes program memory on chip(not on 8031)
 128 data memory on chip.
 Four register banks.
 Two multiple mode, 16-bit timer/counter.
 Extensive Boolean processing capabilities.
 64 KB external RAM size
 32 bidirectional individually addressable I/O lines.
 8 bit CPU optimized for control applications.

10. Compare Microprocessor and Microcontroller. [Nov/Dec 2006,2011]

11. Name the five interrupt sources of 8051? [MAY/JUNE2007 & APRIL/MAY2008]

The interrupts are:

 External interrupt 0: IE0: 0003H

 Timer interrupt 0: TF0: 000BH

 External interrupt 1: IE1: 0013H

 Timer Interrupt 1: TF1: 001BH

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  Serial Interrupt

 Receive interrupt: RI: 0023H

 Transmit interrupt: TI: 0023H

12. List the 8051 instructions that affect the overflow flag.

ADD, ADDC, DIV, MUL, SUBB

13. List the 8051 instructions that always clear the carry flag.

CLR C, DIV, MUL

14. List the 8051 instructions that affect all the flags. [NOV/DEC 2007]

ADD, ADDC and SUBB

15. What are the different types of ADC? [APR/MAY2008 NOV/DEC 2011]

The different types of ADC are successive approximation ADC, counter type ADC
flash type ADC, integrator converters and voltage to- frequency converters.

16. Mention the number of register banks and their addresses in 8051? [Nov/Dec2015]

There are 4 register banks. They are Bank0, Bank1, Bank2& Bank3.
o RAM locations from 00 to 07H for bank 0
o RAM locations from 08 to 0FH for bank 1
o RAM locations from 10 to 17H for bank 2
o RAM locations from 18 to 1FH for bank 3

17. What is the Jump range? [Nov/Dec2015]

 AJMP addr11 (Absolute Jump) – Within 2K bytes of program memory.

 LJMP addr16 (Long Jump) -Within 64K bytes of program memory.
 SJMP Rel.addr (Short Jump) –128 to +127 of program memory

18. What are the different ways of operand addressing in 8051? [May/June 2016]

The five addressing modes are,

1. Immediate addressing
2. Register addressing
3. Direct addressing
4. Register indirect addressing
5. Indexed addressing.

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 UNIT-V

INTERFACING MICROCONTROLLERS

1. Explain the mode (0 and1) operation of the timer. [April/May2012]

The operations are as follows:

Timer mode 0 and 1 operations are similar for the 13 bit (mode) or 16 bit (mode 1) counter.
When the timer reaches the limits of the count, the overflow flag is set and the counter is reset
back to zero. The modes 0 and 1 can be used to time external events.

2. What is the use of a watch dog timer?

A watching timer is used to protect an application in case the controlling microcontroller

begins to run amok and execute randomly rather than the preprogrammed instructions written for
the application.

3. Define interrupt.

Interrupt is defined as request that can be refused. If not refused and when an interrupt request is
acknowledged, a special set of routine or events are followed to handle the interrupt.

4. How can 8051 be interrupted?

There are five different ways to interrupt 8051. Two of these are from external electrical
signals. The other three are caused by internal 8051 I/O hardware operations.

5. Give the format of the interrupt enable register. [April/ May2013]

The format of the interrupt enable register is,

EA--ES ET1 EX1 ET0 EX0

The register is used to enable or disable all 8051 interrupts and to selectively enable or
disable each of the five different interrupts.
 EA: Disables all interrupts
 Es: Enables or disable the serial port interrupt.
 ET1: Enable or disable the timer 1 overflow interrupt.
 EX1: Enable or disable external interrupt 1.
 ET0: Enable or disable the timer 0 overflow interrupt.
 EX0: Enable or disable external interrupt 0.

6. How is the 8051 serial port different from other micro controllers? [Nov/Dec2013]

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 The 8051 serial port is a very complex peripheral and able to send data synchronously
and asynchronously in a variety of different transmission modes.

7. Give the priority level of the interrupt sources. [Nov/Dec2010]

Interrupt source Priority within a level

 IE0 (External INT0)

 TF0 (Timer 0)
 IE 1 (External INT 1)
 TF 1 (Timer 1)
 RI = TI (Serial port) Highest

8. What is the use of stepper motor?

A stepper motor is a device used to obtain an accurate position control of rotating shafts.
A stepper motor employs rotation of its shaft in terms of steps, rather than continuous rotation as
in case of AC or DC motor.

9. Explain the operating mode0 of 8051 serial ports?

In this mode serial enters &exits through RXD, TXD outputs the shift clock.8 bits are
transmitted/received:8 data bits(LSB first).The baud rate is fixed at 1/12 the oscillator frequency.

10. Define baud rate. [May/June 2016]

Baud rate is used to indicate the rate at which data is being transferred.

Baud rate = 1/Time for a bit cell.

11. Explain the operating mode2 of 8051 serial ports? [April/May 2009&Nov/Dec2008]

In this mode 11 bits are transmitted(through TXD)or received(through RXD):a start

bit(0), 8 data bits(LSB first),a programmable 9th data bit ,& a stop bit(1).ON transmit the 9th
data bit (TB* in SCON)can be assigned the value of 0 or 1.Or for eg:, the parity bit(P, in the
PSW)could be moved into TB8.On receive the 9thdatabit go in to the RB8 in Special Function
Register SCON, while the stop bit is ignored. The baud rate is programmable to either
1/32or1/64 the oscillator frequency.

12. How is A/D convertor interfaced with 8051? [Nov/Dec2015]

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13. Compare polling and interrupt. [May/June 2016]

The 8051 microcontroller can do only one task at a time. In polling, the microcontroller
continuously checks each port one by one according to the priority assigned to the ports, and if
any device requires service, then it provides it. In interrupt, when the device requires service, it
sends the request to microcontroller and the controller then provides service to it.

So essentially, the difference is that in polling, microcontroller has to check continuously

whether any device is asking for request, while in interrupt the device itself sends the request and
the controller satisfies it. And because microcontroller is freed from the task of checking each
port, it can do other work.

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