PESD1V0C1BSF

Extremely low capacitance bidirectional ESD protection

diode
12 March 2025 Short data sheet

1. General description
Extremely low capacitance bidirectional ElectroStatic Discharge (ESD) protection diode, part of the
TrEOS protection family. This device is housed in a DSN0603-2 (SOD962-2) leadless ultra small
Surface-Mounted Device (SMD) package, designed to protect one signal line from the damage
caused by ESD and other transients.

2. Features and benefits

• Bidirectional ESD protection of one line
• VRWM = 1 V device
• IEC 61000-4-5 (8/20 surge): IPP = 8 A peak pulse (average measured)
• Extremely low diode capacitance Cd = 0.18 pF typical
• Extremely low clamping voltage to protect sensitive I/Os
• Very low peak clamping for sensitive IC with low-inductance traces between protection and
protected IC
• Extremely low-inductance protection path to ground
• ESD protection IEC 61000-4-2: ±18 kV (average measured)
• Very low TLP trigger voltage Vt1 = 3.2 V
• Ultra small SMD package

3. Applications
• Cellular handsets and accessories
• Portable electronics
• Communication systems
• Computers and peripherals
• Low voltage super speed data lines, to be placed between AC coupling C and protected IC

4. Quick reference data

Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
VRWM reverse standoff -1 - 1 V
voltage
Cd diode capacitance f = 1 MHz; VR = 0 V; Tamb = 25 °C - 0.18 - pF
Nexperia PESD1V0C1BSF
Extremely low capacitance bidirectional ESD protection diode

5. Pinning information
Table 2. Pinning information
Pin Symbol Description Simplified outline Graphic symbol
1 K1 cathode (diode 1)
1 2
2 K2 cathode (diode 2)
K1 K2
Transparent
sym045
top view
DSN0603-2 (SOD962-2)

6. Ordering information
Table 3. Ordering information
Type number Package
Name Description Version
PESD1V0C1BSF DSN0603-2 silicon, leadless ultra small package; 2 terminals; 0.4 mm SOD962-2
pitch; 0.6 mm x 0.3 mm x 0.3 mm body

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Nexperia PESD1V0C1BSF
Extremely low capacitance bidirectional ESD protection diode

7. Application information
The device is designed for the protection of one data or signal line from surge pulses and ESD
damage. The device is suitable on lines where the signal polarities are both, positive and negative
with respect to ground.
The device uses an advanced clamping structure showing a negative dynamic resistance.
This snap-back behavior strongly reduces the clamping voltage to the system behind the ESD
protection during an ESD event. Do not connect unlimited DC current sources to the data lines to
avoid keeping the ESD protection device in snap-back state after exceeding breakdown voltage
(due to an ESD pulse for instance).
Due to the very low trigger voltage Vt1, it needs to be ensured that VRWM is not exceeded under
normal application conditions. If the device is used in an USB4 or USB 3.2 environment, place the
device between the AC coupling capacitor and the protected IC. Refer to the USB specifications for
maximum working voltages.

line to be protected

ESD protection diode

GND

aaa-002737

Fig. 1. Application diagram

Circuit board layout and protection device placement

Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT) and surge
transients. The following guidelines are recommended:
1. Place the device as close to the input terminal or connector as possible.
2. Minimize the path length between the device and the protected line.
3. Keep parallel signal paths to a minimum.
4. Avoid running protected conductors in parallel with unprotected conductors.
5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and ground loops.
6. Minimize the length of the transient return path to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Use ground planes whenever possible. For multilayer PCBs, use ground vias.

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Short data sheet 12 March 2025 3/8

Nexperia PESD1V0C1BSF
Extremely low capacitance bidirectional ESD protection diode

8. Package outline
Leadless ultra small package; 2 terminals; body 0.6 x 0.3 x 0.3 mm SOD962-2

1 2
b

e1

A1

(1)

0 0.5 mm
scale
Dimensions (mm are the original dimensions)

Unit A A1 b D E e1 L

max 0.32 0.03 0.25 0.325 0.625 0.15

mm nom 0.4
min 0.28 0.23 0.275 0.575 0.13
Note
1. The marking bar indicates the cathode. sod962-2_po

Outline References European

Issue date
version IEC JEDEC JEITA projection
13-07-12
SOD962-2
13-07-17

Fig. 2. Package outline DSN0603-2 (SOD962-2)

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Nexperia PESD1V0C1BSF
Extremely low capacitance bidirectional ESD protection diode

9. Soldering
Footprint information for reflow soldering of leadless ultra small package; 2 terminals SOD962-2

0.85

0.6
0.2 0.2 0.2

0.4

0.4 0.28

0.256 0.16 0.256

recommended stencil thickness: 0.1 mm

occupied area solder paste

solder lands

Dimensions in mm

16-02-01
Issue date sod962-2_fr
20-09-15

Fig. 3. Reflow soldering footprint for DSN0603-2 (SOD962-2)

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Short data sheet 12 March 2025 5/8

Nexperia PESD1V0C1BSF
Extremely low capacitance bidirectional ESD protection diode

10. Revision history

Table 4. Revision history
Data sheet ID Release date Data sheet status Change notice Supersedes
PESD1V0C1BSF_SDS 20250312 Short data sheet - -
v.1

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Nexperia PESD1V0C1BSF
Extremely low capacitance bidirectional ESD protection diode
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Nexperia PESD1V0C1BSF
Extremely low capacitance bidirectional ESD protection diode

Contents
1. General description...................................................... 1
2. Features and benefits.................................................. 1
3. Applications.................................................................. 1
4. Quick reference data....................................................1
5. Pinning information......................................................2
6. Ordering information....................................................2
7. Application information............................................... 3
8. Package outline............................................................ 4
9. Soldering....................................................................... 5
10. Revision history..........................................................6
11. Legal information........................................................7

© Nexperia B.V. 2025. All rights reserved

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Date of release: 12 March 2025

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