$R2ZJ5BQ
$R2ZJ5BQ
Co1.Draw the functional block diagram of a single bus architecture of a computer and describe the function of
the instruction execution cycle, RTL interpretation of instructions, addressing modes, instruction set.
Co2.Write assembly language program for specified microprocessor for computing 16-bit multiplication,
division and I/O device interface (ADC, Control circuit, serial port communication).
Co3.Write a flowchart for Concurrent access to memory and cache coherency in Parallel Processors and
describe the process.
Co4.Given a CPU organization and instruction, design a memory module and analyze its operation by
interfacing with the CPU.
Co5.Given a CPU organization, assess its performance, and apply design techniques to enhance performance
using pipelining, parallelism and RISC methodology