Title Date Page No. “INTRODUCTION: - og tal Cirauk Simulation ke a Procesg fn which a model af an elechonic Crwaik FS Giealed and analysed Uaing Vosious alfosithens [tie digital logic Frarnes used to the tab Poclides a numrbe of features to Suppost the clesigr of logic Ciyaule fo the tab They age used %9 Vosious domaine Such os TMi AOPIONIO vs , town emul ca =bior cyteers nd embedded Cuslems . ff o [LOGIC GATES: ~ Heyic gates ase Clechonic Ciraile wluck perform logical functions tn one ox moxe inpulk to produce one toput These axe even logic pater tolen all the snp Combinations of a logic qe oe wrilten In Genie, and ten tor espondhing outpule wrillen along lige aa 5 truth table - iq foput| out put Combination & Called HAND Gare; - i > he ¢ The Any gale produces a liigh ae Be re, pabcaislion Gor ng AS «Te Cpevation ig “eaoleg by a dot (-)- Wlen any Mout of, to oukpuls oe loo, +e iR Lowea Date ee ea _ fe Page No. Title Pin diagaam :- | yu0® TC Moy (Y pire th he ip at provide 4 vange of appli cakiong Such py enabliag logic gater roukoalg and tnpule- Te ia oxential to | handevrdand 4#40@ p input eR Wates- ie OR gale Prodacws, a bugle output — when aay ov all of the jiguls i Ligh: The abbreviation f tug ple ig oR. tolen both iapule a0 low, te oukpuk ‘2 [ow The carded Symbol dor an 0g gol ig Clown a a long with the axocated touth Mable. The operation dJunctien 4or a OF gle 8 @- Ph Diagoam (Kay 32) he 4yoo Tc hos WY pas thok poovide avange of qunckions Such P Crabbing Logit gales inpulS and oukpuks + Contains foul Independent 9 -inpur oR gales MW CONDIQopATIONS- vec :Pi ei GND i PPo t”Date Page No. Title 3-NOT GATEN- vod fk gale produces the Complement sf ike output» Thig gele 2 alto Called & Toveale tte oa rouk ty Ugh when the input jg (0 And Vice Vesa. he opeation han of the Wor gale: Gib: v a pal CONFIAURATION: - Containg Six independent Nor gates Cioves leas) DVveco rin ty CAYO). =) GND 1 Pho + ytior CATEL- the NOR gate producer a high output when all a the outpule tse low The abbreviation +os this gale ig NOR. Pin diagyam:- Cic #402) + alan y tndecendent 2MtmeuiaNo rma i ) GNI Pfo + Pin Congequcation eV CCR ONY SB NAND gate :- Te MAND gale produces a low input when all tthe inpule axe high « Tha abbbaeviakion 40% thin gale ta Nawp + The operation 12 AN with MoT. Mot ccoeu maori ace (cla inpat WAND gales > VECt PR ty (4400 ) Pua: pao a:Date Page No. Title g. YOR Gale ¢ me exdlucive OR gale ik a modified oR gale that produ 4 wigh ghputs when numbes of Uh at i inpule ig odd , othawite put ig low out pin CONE IAURATIONS- Cty eb) fontaine 4 independent 9 input xr gales - Voc: Pte ty GND! Pint 4-XNOR gale 5g The exdurive KNOR gale i® A modified OR gale that producer i i Ong Oud thor wl Se a lagh oukput ; olen no ef te ak i topule 91 otha dia oukput ig tow - DIN CONIFL Gq UBATION- (+4966) Gntains 4, independent 2 - input x NOR Ae Veet Pin ly OND: peas « Meet CoP yd: Conner to positive voltage Supply Cog Cv ow TH logic > Copa ay; Comat +o ground:Date Page No, Title |JAmi- To Pesign basic gales and Vestigy theis uth tables HiarpwARe [APPARATUS Reaviren:- S Trainer KRE , patch Coxde¢ || THEORY <- Tn digital Craik , a gak ic a logic Cisait with one aalput and pre os mose inpUlS* The action of logic Cisawt in Cummari ged the fosm vf ‘twuth tableg. The digital (ogic fraines used ia includes a numbers r} extwes to Suppoot dorign of logic ciaeuil in the lob: Tare Oe F Logic gate namely OR, AND, NAND, NOR, YOR, XNOR, NOT, The touth tables oe vepscrented in the table - PRoceDoRE:- [rconnece the =patch Code Jos Gack 2} the ipqic gale to Verity by giving the inputs C10) Moke tte Goaneck onc ar Shown ithe tigue and Verity thew Mes ponding fourth tables ° STebulale the veadings* UReoncbuck and verity with sibbuent logic sets| “tome tote TRUTH f {sio] Fumeron| SYN BOL TABLE | A ea | | Jnor | | T 3 eae - ' |oare m4 Y= Jano | 4 Camere | y omro, |mora | 2|Gere |, | CMa Y=h+B | i) oO °o I I t [uawn | A fey 3] Y ai Yo AB Gare | g oe an i ee | jy 4] oR, ba wi Dev ; : Y= At Gare | 8 olin 1 \ | Not Zo. 20 | wate | xoR 6 a | Qarte aces \ 14 )XNOR ig Y= a@8 GATEDate Page No. PRECAUTIONS! - Eocure the feainea Kit % Cupplied with the Corsegponding operating voltage. Avoid over Voltage Cory und vollage Conditions > Ingest genky into the Cocke with beading ox baenking Ane pink 3-Doubw Check all dhe coonectiors to encue +e ae no act dental choot Gaui - APPU CATIONS :~ ( Digital Cimcuit dex ign 2 -experirnankal Combinational Caudle Caddus, oqcodie , maltip lexees) 3. Simulation vf logic System io RGD projec RESOLT:- lence P &signed basic gates and verified theis truth tabler