Grand Asian University Sialkot

Lab Manual
For

CS4-504-Digital Logic Design-LAB

Course Code CS4-504

Instructor Muhammad Sohaib Qureshi
Office CS Department, Office No. 02.
Cr. Hrs. 1
Class BSCS, SE, ADP ALL
Semester II
Contact mohammad.sohaib@gaus.edu.pk

Department Of Computer Science

 Knowledge Solving

Life-long Learning
Problem Analysis

Development of

Professionalism
Communication
for Computing

Individual and
Modern Tool

and Society
Computing
Teamwork
Education
Academic

Problems

Solutions
Design/

Usage

Ethics
PLOs
No.

10
1

9
Learning Outcomes

At the end of the course the students will be Domain BT Level* PLO
able to:

• Knowledge Student will be able learn C 1 2

Acquire knowledge related to the
concepts, tools and techniques for the
design of digital electronic circuits

• Understand Demonstrate the skills to C 2 3

design and analyze both combinational
and sequential circuits using a variety of
techniques.
• Understand the relationship between
abstract logic characterizations and
practical electrical implementations.

• Apply apply the acquired knowledge to C 3 5

simulate and implement small-scale
digital circuits

* BT= Bloom’s Taxonomy, C=Cognitive domain, P=Psychomotor domain, A= Affective

domain

Classroom • Be prepared for class.

Policy • Always treat others with respect.
• Strictly follow the deadlines of the assessments.

Grading Policy • Lab tasks: 20%

• Lab Project 20%
• Assignment 10%
• Quizzes 10%
• Final Exam: 40%
 List of labs
Labs Week Topic BT level
Lab 01 01 Introduction Examine
Lab 02 02 Basic Gates Examine
Lab 03 03 Universal Gates Apply
Lab 04 04 Exclusive Gates Apply
Lab 05 05 Code Converters Apply
Lab 06 06 Half Adder & Half Subtractor Apply
Lab 07 07 Full Adder & Full Subtractor Apply
Lab 08 08 Decoders Apply
Lab 09 09 BCD to 7-Segment Decoder Apply
Lab 10 10 Encoders Apply
Lab 11 11 Multiplexers Apply
Lab 12 12 Latches Apply
Lab 13 13 Flip- Flops Apply
Lab 14 14 Counter Apply
Lab 15 15 Registers Apply
Lab 16 16 Project Apply
 Table Of Context
1. Laboratory No:1 Introduction ----------------------------------------------------------- 4
1.1 Experiment No. 1: Introduction To Logic Design And Switching Theory Lab -------------- 5
2. Laboratory No: 2 Basic Gates ---------------------------------------------------------- 14
2.1 Experiment No. 1: And Gate 15
2.2 Experiment No. 2: Or Gate 19
2.3 Experiment No. 3: Not Gate 23
3. Laboratory No: 3 Universal Gates ---------------------------------------------------- 27
3.1 Experiment No. 1: Nand Gate 28
3.2 Experiment No. 2: NOR Gate 32
3.3 Experiment No. 3: NAND Gate As Universal Gate --------------------------------------------- 36
3.4 Experiment No. 4: NOR Gate As Universal Gate----------------------------------------------- 41
4. Laboratory No: 4 Exclusive Gates -----------------------------------------------------47
4.1 Experiment No. 1: Exclusive Gate 48
4.2 Experiment No. 2: Exclusive - NOR Gate 52
5. Laboratory No 5 Code Converters ---------------------------------------------------- 57
5.1 Experiment No. 1: 4-Bit Binary To Gray Code Conversion ---------------------------------- 58
5.2 Experiment No. 2: 4-Bit Gray To Binary Code Conversion----------------------------------- 63
5.3 Experiment No. 3: Bcd (8421) To Excess-3 Code Conversion --------------------------------68
5.4 Experiment No. 4: Excess 3 Code To BCD (8421) Conversion ------------------------------ 72
6. Laboratory No: 6 Half Adder & Half Subtractor ----------------------------------- 77
6.1 Experiment No. 1: Half Adder 78
6.2 Experiment No. 2: Half Subtractor 82
7. Laboratory No: 7 Full Adder & Full Subtractor ----------------------------------- 87
7.1 Experiment No. 1: Full Adder-88 Experiment No. 2: Full Subtractor---------------------- 88
8. Laboratory No: 8 Decoders ------------------------------------------------------------ 96
8.1 Experiment No. 1: 2-Line-To- 4-Line Decoder-------------------------------------------------- 97
8.2 Experiment No. 2: 3-Line-To- 8-Line Decoder------------------------------------------------ 101
9. Laboratory No: 9 BCD to 7-Segment Decoder ----------------------------------- 108
9.1 Experiment No. 1: Bcd To Seven Segment Decoder ---------------------------------------- 109
10 . Laboratory No: 10 Encoders---------------------------------------------------------107
10.1 Experiment No. 1: 4-Line-To- 2-Line Encoder ----------------------------------------------- 118
10.2 Experiment No. 2: 8-Line-To- 3-Line Encoder-----------------------------------------------123
11. Laboratory No: 11 Multiplexers ---------------------------------------------------- 130
11.1 Experiment No. 1: 4-Line-To- 1-Line Multiplexer ------------------------------------------ 131
11.2 Experiment No. 2: 8-Line-To- 1-Line Multiplexer ------------------------------------------ 136
12. Laboratory No: 12 Latches ----------------------------------------------------------- 143
12.1 Experiment No. 1: Rs Latch Using Nor Gates ----------------------------------------------- 144
12.2 Experiment No. 2: Sr Latch With Control Input Using Nand Gates ------------------- 148
12.3 Experiment No. 3: D Latch Wuth Control Input Using Nand Gates ------------------- 152
13. Laboratory No: 13 Flip- Flops ------------------------------------------------------- 157
13.1 Experiment No. 1: Jk Flip Flop With Control Input Using Nor Gates ------------------- 158
13.2 Experiment No. 2: T Flip Flop 162
14. Laboratory No: 14 Counter ---------------------------------------------------------- 167
14.1 Experiment No. 1: Three Bit Asynchronous Counter-------------------------------------- 168
14.2 Experiment No. 2: Four Bit Asynchrnous Counter ---------------------------------------- 173
15. Laboratory No: 15 Registers --------------------------------------------------------- 179
15.1 Experiment No. 1: 4-Bit Serial-In-Serial-Out Register ------------------------------------ 180
16. Laboratory No: 16 Project ----------------------------------------------------------- 185
Laboratory No: 1
Introduction
EXPERIMENT NO. 1:
INTRODUCTION TO LOGIC
DESIGN AND SWITCHING
THEORY LAB
Objectives

1. To understand the rules of Logic Design & Switching Theory Lab.

2. To understand and learn the use and functions of a digital trainer and other lab
equipment’s.
3. To determine the logic connections, power supply and identify different ICs, pin
configuration using the data book of any IC.
4. To verify the truth tables of logic gates using TTL ICs.

Equipment Required

Item Quantity
DM-2000 1
7404 hex inverter 1
7408 Quad 2-input AND gate 1
7432 Quad 2-input OR gate 1
7400 Quad 2-input NAND gate 1
7402 Quad 2-input NOR gate 1

Introduction
• There are 3 hours per week allocated to a laboratory session in Logic Design & Switching
Theory Lab. It is a necessary part of the course at which attendance is compulsory. Each
laboratory experiment is marked and the average of these marks will
contribute to 20% of your Overall marks for the EE 2711 Logic Design & Switching
Theory Lab.
Lab Rules
• Students must attend all scheduled laboratory sessions.
• Students are required to be punctual – late comers may be refused entry.
• Students should come prepared. Read the background information and discuss the
experiment with their colleagues.
• Students must bring the Lab manual on every time they come to the laboratory.
• Do not make walking around, chatting or noise during lab period.
• In the lab perform all steps carefully and show it to instructor for verification.
• Pre-lab questions must be answered prior to the next laboratory session.
• Answer all questions and all sections of the laboratory.
• Here are some guidelines to help you perform the experiments and to submit the
reports:
 o Read all instructions carefully and carry them all out.
o Ask a demonstrator if you are unsure of anything.
o Record actual results (comment on them if they are unexpected!)
o Write up full and suitable conclusions for each experiment.
o If you have any doubt about the safety of any procedure, contact the
demonstrator beforehand.
o THINK about what you are doing!
o After finishing the experiment, disconnect the connection wires that you have
connected during the experiment, and put them in the wire kit, take out all IC
chips from the board and put them back in the IC Cabinet, be sure to return
all materials you have used and clean your table, and inform the Lab
instructor and when you depart.

Most experiments involve the use of the Digital Logic Design Trainer which contains almost
all the things that are required to perform the experiment. In some experiments you may in
need of oscilloscope (external) or a signal generator (external) or the multi-meter.

IC Pin Configuration

For Pin Configuration and pin Diagrams refer to the IC Data Handbooks available in the Lab. It is
the responsibility of student to get the IC data sheet well in advance before coming to the Lab.
The best solution is that get the data sheet for the particular IC with the pre-lab sheet. In almost
all labs it is required that student will draw the pin diagram and function table of the IC to be
used in the Lab by himself. IC data sheet handbooks are also available in the Lab.
Sometimes the chip manufacturer may denote the first pin by a small indented circle above
the first pin of the chip. Place your chips in the same direction, to save confusion at a later
stage. Remember that you must connect power to the chips to get them to work.

The 5V supply MUST NOT BE EXCEEDED since this will damage the ICs (Integrated circuits)
used during the experiments. Incorrect connection of power to the ICs could result in them
exploding or becoming very hot - with the possible serious injury occurring to the people
working on the experiment!
Various types of logic, representing different technologies, are available to any logic
designer. The choice of a particular family is determined by factors such as speed, cost,
availability, noise immunity and so forth. The experiments in this lab book use primarily
transistor-transistor logic or TTL. The detailed performance characteristics of TTL depend on
particular sub family. However, all TTL is designed to operate from a 5V power supply, and
the logic levels are the same for all TTL integrated circuits. For any integrated circuit (IC) to
function properly, power and ground must be connected. The connection diagram for the IC
shows these connections. Figure 1-1-1. Shows the connection diagram for a 7404 hex
inverter, which will be used in this experiment.

Figure.1-1-1 Pin diagram of a 7404 HEX inverter

Digital Logic Design 7

Pins are numbered counter clock wise from the top, starting with a notch or circle at the top
or next to pin 1; see figure1-1-2

Circle Notch

Pin 1 Pin 14

Pin 7 Pin 8
Figure 1-1-2: Pin numbers of IC & Cut-away View

Logic Trainer

Figure 1-1-3: Logic trainer

The main parts of the logic trainer are as follows.

Regulated Power Supply: Power supply with short circuit protection that provides +5V. State
Monitors (led): State monitors are simply light emitting diodes, which are used to indicate
the state of a logical output. Lighted diode represents a logic-1 and unlighted diode means
logic-0. They are total 16 in quantity.
2-input AND: This function is carried out binary circuit (PORT) with two inputs and one only
output.
2-input OR: This function OR is carried out binary circuit (PORT) with two inputs and one
only output.
Digital Logic Design 8

2-input NAND: This function NAND is carried out binary circuit (PORT) with two inputs and
one only output.
2-input NOR: This function NOR is carried out binary circuit (PORT) with two inputs and one
only output.
Inverter: This function Inverter is carried out binary circuit (PORT) with one input and one
only output.
2-input XOR: This function XOR is carried out binary circuit (PORT) with two inputs and one
only output.
3-input OR: This function is carried out binary circuit (PORT) with three inputs and one only
output.
3-input NAND: This function NAND is carried out binary circuit (PORT) with three inputs and
one only output.
3-input AND: This function is carried out binary circuit (PORT) with three inputs and one only
output.
Tri-State Buffer: A tristate buffer has two inputs: a data input x and a control input c. The
control input acts like a valve. When the control input is active, the output is the input. That
is, it behaves just like a normal buffer. The "valve" is open.
J-K Flip flop: Dual JK flip-flop IC, which contains two individual JK type bistable’s within a single
chip enabling single or master-slave toggle flip-flops to be made. Other JK flip flop IC’s include
the IC7476 Dual JK flip-flop with clear, the 74LS109 Dual positive-edge triggered JK flip flop and
the IC7476 Dual negative-edge triggered flip-flop with both preset and clear inputs.
BI Stable Latch: A main memory circuit can be carried out with the cross coupling of two
NAND ports; this kind of connection is called RS flip flop or latch.
Sync BCD Counter: A BCD counter is a special type of a digital counter which can count to
ten on the application of a clock signal. Integrated circuit is basically a MOD-10-decade
counter that produces a BCD output code. The 74160 consists of four master-slave JK flip-
flops internally connected to provide a MOD-2 (count-to-2) counter and a MOD-5 (count-to-
5) counter.
Up/Down Counter: The up/down counter can be carried out by inserting the flip flop
network, and the clock is connected to the last output, this is the up counting while if the
clock is connected to the output Q of the present flip flop, there is the down counting.
The IC-SN74LS192, has an up/down BCD counter. The output of the four flip flop JK changes
when one of the two clock pulses changes from high to low.
Binary Counter: A digital circuit which has a clock input and a number of count outputs
which give the number of clock cycles. The output may change either on rising or falling
clock edges. The circuit may also have a reset input which sets all outputs to zero when
asserted. The counter may be either a synchronous counter or a ripple counter
BCD to 7 segment decoder: This particular logical network enables the display by means of
seven segment display, of the numbers expressed in BCD coding, which range from A to G. It
includes four inputs, which correspond with the four bits of BCD coding, each of which
controls the segment of the display.
Shift Register: if a register has a possibility to transmit information from a cell to another of
the same register, in sequence, so the register is called shift-register.
The IC-74LS95 contains four-bit shift register with series as well as parallel input and output,
it permits the shift to the right as well as left.
Comparator: A comparator compares two binary numbers and signals if the two numbers
are equal, or if one is higher than the other.
The IC-SN74LS85 contains two four bit binary numbers. The inputs A<B, A>B are used to
connect the comparator in cascade to other equal circuits, to obtain N-four bit comparator.
Digital Logic Design 9

BCD to Decimal Decoder: The BCD-to-decimal decoder converts each BCD code to its
decimal equivalent. The technique employed is very similar to the one used in developing
the 3-line-to-8-line decoder
Encoder: An encoder is a device that converts information from one format or code to
another, for the purposes of standardization, speed or compressions.
The IC-SN74LS147 contains four inputs and 10 outputs to carry out encoding function.
State Indicator:
In general, a sequence detector is a sequential logic circuit used to check an input stream of
bits and detect a specific sequence.
Multiplexer: A multiplexer is basically a n-bit binary decoder with an extra input line added
to each product term, and whose outputs are ORed together. Each product term may be
enabled or disabled, by setting their respective extra input line to either logic 1 or logic 0 ,
thus generating the desired sum of min-terms. One may improve on the previous procedure
by using the following artifice:
o Assume n = m +1;
o Use a 2m to 1 multiplexer and connect m input variables to the m select lines;
o The remaining input variable, which for simplicity is labeled as A, is used to
excite the data inputs of the multiplexer. Now these inputs can be excited
with the following.
The IC-SN74LS153 has four input multiplexer, it has two selection inputs which act on both
selectors, two enabling inputs which must be low, four inputs for each channel and last two
outputs.
DE-multiplexer: It is a logic device used for a binary data transmission of serial type, i.e. data
coming from a single line, on one of the N output lines of the circuit and among these, in
particular the one selected with the address.
The SN74LS155 is four output DE-multiplexer, it has two decoding circuits from one to four
lines, with individual strobe commands and common inputs of the binary addresses. The
individual strobes enable the activation of the each of the two four-bit section.
LED display: It is an alpha numeric display of the peripherals of the processor in digital
communication, etc. There are three kind of LED display.
1. Dot matrix (e.g. 5to 7)
2. 14 -16-18 segments
3. 7 segments
Switches: A switch is a device that channels incoming data from any of multiple input ports
to the specific output port that will take the data toward its intended destination. DM-2000
has 16 switches.

Wiring a circuit should be completed in the order described below:

• Turn the power of Digital Logic Design Trainer off before you build anything!
• Make sure the power is off before you build anything!
• The +5V and GND pins may be found on the right side of the Digital Logic Design
Trainer.
• Mark each connection on your schematic as you go, so as not to try to make the
same connection again at a later stage.
• Get one of your group members to check the connections, before you turn the
power on.
• If an error is made and is not spotted before you turn the power on. Turn the power
off immediately before you begin to rewire the circuit.
• At the end of the laboratory session, collect your hook-up wires, chips and all
equipment and return them to the demonstrator.
Digital Logic Design 10

• Tidy the area that you were working in and leave it in the same condition as it was
before you started.

Using IC of Different types

Using IC 74LS00 NAND gate:

Bring the data sheet of IC 74LS00

Read it carefully

How many NAND gates are there?

Draw figure here using logic symbol Develop the truth table for the IC 74LS00
Develop the truth table for the IC 74LS00

Using IC 74LS02 NOR gate:

Bring the data sheet of IC 74LS02

Read it carefully

How many NOR gates are there?

Draw figure here using logic symbol Develop the truth table for the IC 74LS02
Digital Logic Design 11

Using IC 74LS08 AND gate:

Bring the data sheet of IC

74LS08 Read it carefully

How many AND gates are there?

Draw figure here using logic symbol Develop the truth table for the IC 74LS08

Using IC 74LS32 OR gate:

Bring the data sheet of IC

74LS32 Read it carefully

How many OR gates are there?

Draw figure here using logic symbol Develop the truth table for the IC 74LS32
Digital Logic Design 12

Some common Gates Pin Configurations:

Learning outcomes:
In this lab we have learned

1. The rules of Logic Design & Switching Theory Lab.

2. The use and functions of a digital trainer, breadboard and other lab equipment’s.
3. To determine the logic connections, power supply and identify different ICs, pin
configuration using the data book of any IC.
4. To verify the truth tables of logic gates using TTL ICs.
Digital Logic Design 13

Each student is required to perform the lab and submit the following Performa along with the
lab report.
1 = Unsatisfactory 2 = Fair 3= Satisfactory 4 = Very good 5= Excellent
Rating
Questions Remarks
(1 to 5)

1. To what extent did you learn on the material in

the lab?

2. Are you able to apply knowledge gained in the

lab to similar problems?

3. Are you able to analyze and interpret data

recorded in the lab?

4. Are you able to identify, formulate and solve

electrical engineering problems based on the
knowledge acquired in the lab.?

5. Can you design a system, component or process

to fulfill certain specifications based on the
knowledge acquired in the lab?

6. Were you able to function as a group in the lab?

7. Were you able to interpret effectively the

procedures and questions asked in the lab?

8. Comment whether your work in the lab has an

impact on the society.

Additional Comments (if any):

Digital Logic Design 14

Laboratory No: 2
Basic Gates
Digital Logic Design 15

EXPERIMENT NO. 1: AND GATE

Objectives
The Objectives of this experiment:

1. To Study the behavior of AND gate by making truth table

2. To study the pin diagram of 74LS08.
3. To verify the truth table of AND gate.

Equipment Required

• Digital Logic Trainer AM-2000

• Wires

Theory

Binary logic consists of binary variables and logical operators. The variables are designated
by the letters of alphabet such as A, B, X, Y etc., with each variable having two and only two
distinct possible values: 1 and 0. AND is one of the three basic logical operations.
⚫
For a 2-input AND gate, output X is HIGH only when inputs A and B are HIGH.
⚫
X is LOW when either A or B is LOW, or when both A and B are LOW.
⚫
ALL-OR-NOTHING Gate.
⚫
For any AND gate regardless of the number of inputs, the output is HIGH, only when
all inputs are HIGH & LOW when all or any input(s) is LOW.
It should be kept in mind that A, B and X are binary variables and can be equal either to 1 or
0 and nothing else.

Diagram

Name Distinctive shape Rectangular Boolean Expression Truth Table

shape

AND

Figure 0-1Figure 0-2

Figure 2-1-1: Description for AND gate

Digital Logic Design 16

Pin Configurations:

Figure 2-1-2: Pin Diagram of 74LS08-Two Input AND Gate

Procedure

1. Connect the Digital Logic Trainer AM-2000 to 220V AC supply

2. Connect A input of AND Gate to the Logic Switch 1 of the trainer using wire.
3. Connect B input of AND Gate to the Logic Switch 2 of the trainer using wire.
4. Connect F output of AND Gate to the LED 1 of trainer using wire.
5. Now change the positions of switch 1 and switch 2 in order to note down the output
of the AND gate according to the truth table.

Observations and Results:

Table 2-1-1: Truth table for AND gate.

A B F
OFF OFF
OFF ON
ON OFF
ON ON

Learning outcomes:
In this lab we have learned

1. The behavior of AND gate by making truth table

2. The pin diagram of 74LS08.
3. How to verify the truth table of AND gate.
Digital Logic Design 17

PRE LAB - EXPERIMENT NO. 1: AND GATE

Questions

1. State the behavior of AND Gate in words.

2. What will be output of the AND gate if one input is at logic-0?

3. What will be the output of AND gate if it’s all input are at logic-1?

4. Draw the pin diagram of the 74LS08 IC and mention the inputs and outputs clearly.

5. Write the Boolean expression for 2-input AND-gate.

6. Draw the Logic symbol of two input AND gate.

Digital Logic Design 18

7. Develop the truth table for an AND gate having 3-inputs. Also write Boolean
expression.

8. How many inputs should be kept at logic-0 to maintain the output of 3-input
AND gate at logic-0?
Digital Logic Design 19

EXPERIMENT NO. 2: OR GATE

Objective
The Objectives of this experiment:

1. To investigate the behavior of OR gate.

2. To study the pin diagram of 74LS32.
3. To verify the truth table of OR gate.

Equipment Required

• Digital Logic Trainer AM-2000

• Wires

Theory

Binary Logic consists of binary variables and logical operators. The variables are designated
by the letters of alphabet such as A, B, X, Y etc., with each variable having two and only two
distinct possible values: 1 and 0. Or is one of the three basic logical operations.
⚫
X is HIGH when either A or B is HIGH, or when both A and B are HIGH.
⚫
For a 2-input OR gate, output X is LOW only when inputs A and B are LOW.
⚫
ANY-OR-ALL Gate.
⚫
For any AND gate regardless of the number of inputs, the output is HIGH, only when any
input(s) is HIGH & LOW when all inputs are LOW.

Diagram

Name Distinctive shape Rectangular Boolean Expression Truth Table

shape

OR

Figure 2-2-1: Description for OR gate

Pin Configurations

Figure 2-2-2: Pin Diagram of 74LS32-Two Input OR Gate

Digital Logic Design 20

Procedure

1. Connect the Digital Logic Trainer AM-2000 to 220V AC power supply

2. Connect A input of OR Gate to the Logic Switch 1 of the trainer using wire.
3. Connect B input of OR Gate to the Logic Switch 2 of the trainer using wire.
4. Connect F output of OR Gate to the LED1 of trainer using wire.
5. Now change the positions of switch 1 and switch 2 in order to note down the
behavior of the OR gate according to the truth table.

Observations and Results:

Table 2-2-1: Truth table for OR gate.

A B F
OFF OFF
OFF ON
ON OFF
ON ON

Learning outcomes:
In this lab we have learned

1. How to investigate the behavior of OR gate?

2. The pin diagram of 74LS32.
3. How to verify the truth table of OR gate?
Digital Logic Design 21

PRE LAB - EXPERIMENT NO. 2: OR GATE

Questions

1. State the behavior of OR Gate in words.

2. What will be output of the OR gate if one input is at logic-0?

3. What will be the output of OR gate if it’s all input are at logic-1?

4. Draw the pin diagram of the 74LS32 IC and mention the inputs and outputs clearly.

5. Write the Boolean expression for 2-input OR-gate.

6. Draw the Logic symbol of two input OR gate.

Digital Logic Design 22

6. Develop the truth table for an OR gate having 3-inputs. Also write Boolean expression.

7. How many inputs of OR gate should be at logic-1 to keep the output of gate
at Logic-1?
Digital Logic Design 23

EXPERIMENT NO. 3: NOT GATE

Objective
The Objectives of this experiment:

1. To Study the behavior of NOT gate by making truth table

2. To study the pin diagram of 74LS04.
3. To verify the truth table of NOT gate.

Equipment required

• Digital Logic Trainer AM-2000

• Wires

Theory

Binary Logic consists of binary variables and logical operators. The variables are designated
by the letters of alphabet such as A, B, X, Y etc., with each variable having two and only two
distinct possible values: 1 and 0. Or is one of the three basic logical operations.
⚫
The output of an inverter is always complement (opposite) of the input
⚫
When a HIGH level input is applied a LOW level input will appear and vice versa.
⚫
This operation is represented by a prime (sometimes by an over bar) sign , logic symbol for
inversion
A or A’
⚫
When input A is run through two invertors, we end up with same input i.e. ‘A’.
A’’ = A
Diagram

Name Distinctive shape Rectangular Boolean Expression Truth Table

shape

NOT

Figure 2-3-1: Description for NOT gate

Pin Configurations

Figure 2-3-2: Pin Diagram of 74LS04 NOT Gate

Digital Logic Design 24

Procedure

1. Connect the Digital Logic Trainer AM-2000 to 220V AC supply

2. Connect A input of NOT Gate to the Logic Switch 1 of the trainer using wire.
3. Connect F output of NOT Gate to the LED 1 of trainer using wire.
4. Note down the output of the NOT gate according to the truth table.

Observations and Results:

Table 2-3-1: Truth table for NOT gate.

A F = A’
OFF
ON

Learning outcomes:
In this lab we have learned
1. How to investigate the behavior of NOT gate?
2. The pin diagram of 74LS04.
3. How to verify the truth table of NOT gate?
Digital Logic Design 25

PRE LAB - EXPERIMENT NO. 3: NOT GATE

Questions

1. State the behavior of NOT Gate in words.

2. What will be output of the NOT gate if input is at logic-0?

3. What will be the output of NOT gate if its input is at logic-1?

4. Draw the pin diagram of the 74LS04 IC and mention the inputs and outputs clearly.

5. Write the Boolean expression for NOT-gate.

6. Develop the truth table for an NOT gate.

7. Develop a circuit that produces 1’s complement of 4-bit input.

8. What will happen if we complement the variable twice?

Digital Logic Design 26

Each student is required to perform the lab and submit the following Performa along with the
lab report.
1 = Unsatisfactory 2 = Fair 3= Satisfactory 4 = Very good 5= Excellent
Rating
Questions Remarks
(1 to 5)

1. To what extent did you learn on the material in the

lab?

2. Are you able to apply knowledge gained in the lab to

similar problems?

3. Are you able to analyze and interpret data recorded

in the lab?

4. Are you able to identify, formulate and solve

electrical engineering problems based on the
knowledge acquired in the lab.?

5. Can you design a system, component or process to

fulfill certain specifications based on the knowledge
acquired in the lab?

6. Were you able to function as a group in the lab?

7. Were you able to interpret effectively the

procedures and questions asked in the lab?

8. Comment whether your work in the lab has an

impact on the society.

Additional Comments (if any):

Digital Logic Design 27

Laboratory No: 3
Universal Gates
Digital Logic Design 28

EXPERIMENT NO. 1: NAND

GATE
Objective
The Objectives of this experiment:

1. To Study the behavior of NAND gate by making truth table

2. To study the pin diagram of 74LS00.
3. To verify the truth table of NAND gate.

Equipment Required

• Digital Logic Trainer AM-2000

• Wires

Theory

The NAND gate is a popular logic element because it can be used as a universal gate; that is,
NAND gates can be used in combination to perform the AND, NOR, OR and NOT operations.
The universal property will be examined thoroughly in the coming experiments but here we
will just say that the term NAND is the contraction of NOT-AND and implies an AND function
with a complemented (inverted) output.
⚫
This operation is opposite that of the AND in terms of the output level i.e. complement of
AND gate function.
⚫
When any input is LOW, the output will be HIGH
⚫
When all input are HIGH, LOW output will appear

Diagram

Name Distinctive shape Rectangular Boolean Expression Truth Table

shape

NAND

Figure 3-1-1: Logic Symbol for NAND Gate

Digital Logic Design 29

Pin Configurations

Figure 2-1-2: Pin diagram of 74LS00-Two Input NAND Gate

Procedure

1. Connect the Digital Logic Trainer AM-2000 to 220V AC supply

2. Connect A input of NAND Gate to the Logic Switch 1 of the trainer using wire.
3. Connect B input of NAND to the Logic Switch 2 of the trainer using wire.
4. Connect F output of NAND Gate to the LED 1 of trainer using wire.
5. Now change the positions of switch 1 and switch 2 in order to note down the output
of the NAND gate according to the truth table.

Observations and Results:

Table 3-2-1: Truth table for NAND gate.
A B F
OFF OFF
OFF ON
ON OFF
ON ON

Timing wave diagram of the NAND gate is

TIME

Learning outcomes:
In this lab we have learned

1. The behavior of NAND gate by making truth table

2. The pin diagram of 74LS00.
3. How to verify the truth table of NAND gate?
Digital Logic Design 30

PRE LAB - EXPERIMENT NO. 1: NAND GATE

Questions

1. State the behavior of NAND Gate in words.

2. What will be output of the NAND gate if one input is at logic-0?

3. What will be the output of NAND gate if it’s all input are at logic-1?

4. Draw the pin diagram of the 74LS00 IC and mention the inputs and outputs clearly.

5. Write the Boolean expression for 2-input NAND-gate.

6. Draw the Logic symbol of two input NAND gate.

Digital Logic Design 31

7. Develop the truth table for NAND gate having 3-inputs. Also write Boolean expression.

8. Draw the timing wave diagram for NAND gate with 3-inputs.
Digital Logic Design 32

EXPERIMENT NO. 2: NOR GATE

Objective
The Objectives of this experiment:

1. To Study the behavior of NOR gate by making truth table

2. To study the pin diagram of 74LS02.
3. To verify the truth table of NOR gate.

Equipment Required

• Digital Logic Trainer AM-2000

• Wires

Theory

The NOR gate is a popular logic element because it can be used as a universal gate; that is,
NOR gates can be used in combination to perform the AND, NAND, OR and NOT operations.
The universal property will be examined thoroughly in the coming experiments but here we
will just say that the term NOR is the contraction of NOT-OR and implies an OR function with
a complemented (inverted) output.
⚫
This operation is opposite that of the OR in terms of the output level i.e. complement of OR
gate function.
⚫
When all input are LOW, the output will be HIGH.
⚫
When any input is HIGH, LOW output will appear.

Diagram

Name Distinctive shape Rectangular Boolean Expression Truth Table

shape

NOR

Figure 3-2-1: Description for NOR Gate

Digital Logic Design 33

Pin Configurations

Figure 3-2-2: Pin diagram of 74LS02-Two Input NOR Gate

Procedure

1. Connect the Digital Logic Trainer AM-2000 to 220V AC supply

2. Connect A input of NOR Gate to the Logic Switch 1 of the trainer using wire.
3. Connect B input of NOR to the Logic Switch 2 of the trainer using wire.
4. Connect F output of NOR Gate to the LED 1 of trainer using wire.
5. Now change the positions of switch 1 and switch 2 in order to note down the output
of the NOR gate according to the truth table.

Observations and Results:

Table 3-2-1: Truth table for NOR gate.

A B F
OFF OFF
OFF ON
ON OFF
ON ON
Timing wave diagram of the NOR gate is

TIME
Learning outcomes:
In this lab we have learned

1. The behavior of NOR gate by making truth table

2. The pin diagram of 74LS02.
3. How to verify the truth table of NOR gate?
Digital Logic Design 34

PRE LAB - EXPERIMENT NO. 2: NOR GATE

Questions

1. State the behavior of NOR Gate in words.

2. What will be output of the NOR gate if one input is at logic-0?

3. What will be the output of NOR gate if it’s all input are at logic-1?

4. Draw the pin diagram of the 74LS02 IC and mention the inputs and outputs clearly.

5. Write the Boolean expression for 2-input NOR-gate.

6. Draw the Logic symbol of two input NOR gate.

Digital Logic Design 35

7. Develop the truth table for NOR gate having 3-inputs. Also write Boolean expression.

8. Draw the timing wave diagram for NOR gate with 3-inputs.

9. Draw equivalent symbol for two input NOR gate using OR-invert symbol.

10. Draw equivalent symbol for two input NOR gate using Invert-AND symbol.
Digital Logic Design 36

EXPERIMENT NO. 3: NAND

GATE AS UNIVERSAL GATE
Objective

The Objectives of this experiment:

1. To Study the behavior of NAND gate as universal gate.

2. To verify the truth table of different gate.

Equipment Required

• Digital Logic Trainer AM-2000

• Wires

Theory

The NAND gate is a popular logic element because it can be used as a universal gate; that is,
NAND gates can be used in combination to perform the AND, OR, NOT, NOR, XOR and XNOR
operations.

• A NOT gate can be implemented using a NAND gate by connecting both the inputs of
the NAND gate together as shown in Figure 3-3-1 (a).
• A NAND Gate performs the AND-NOT function. Removing the NOT gate at the output
of the NAND gate results in an AND gate as shown in Figure 3-3-1 (b).
• An OR Gate can be implemented using a combination of three NAND gates as shown
in Figure 3-3-1 (c).
• The OR gate implementation using three AND gates is shown in previous figure. A
NOR gate implementation requires addition of an inverter (NOT) gate at the output
as shown in Figure 3-3-1 (d).
• An XOR gate is constructed similarly to an OR gate, except with an additional NAND
gate inserted such that if both inputs are high, the inputs to the final NAND gate will
also be high, and the output will be low. This effectively represents the formula: "(A
NAND N) NAND (B NAND N) where N = A NAND B", or in terms of the similar OR gate:
"(A OR B) AND (A NAND B)" as shown in Figure 3-3-1 (e).
• An XNOR gate is simply an XOR gate with an inverted output as shown in Figure 3-3-1
(f).
Digital Logic Design 37

Diagram

(a) NOT Gate using NAND Gate (b) AND Gate using NAND Gate

(c) OR Gate using NAND Gate

(d) NOR Gate using NAND Gate

(e) XOR Gate using NAND Gate

(e) XNOR Gate using NAND Gate

Figure 3-3-1: Description of NAND Gate working as Universal Gate

Digital Logic Design 38

Pin Configurations

Figure 3-3-2: Pin diagram of 74LS00-Two Input NAND Gate

Procedure

1. Connect the Digital Logic Trainer AM-2000 to 220V AC supply

2. Connect A input of NAND Gate to the Logic Switch 1 of the trainer using wire.
3. Connect B input of NAND to the Logic Switch 2 of the trainer using wire.
4. Connect F output of NAND Gate to the LED 1 of trainer using wire.
5. Now change the positions of switch 1 and switch 2 in order to note down the output
of the NAND gate according to the truth table.

Learning outcomes:
In this lab we have learned

1. The behavior of NAND gate as universal gate.

2. How to verify the truth table of different gate by using NAND gate?
Digital Logic Design 39

PRE LAB - EXPERIMENT NO. 3: NAND GATE AS UNIVERSAL GATE

Questions

1. Label all figure given in 3-3-1 also write the Boolean expression.

2. Verify all the Boolean expression written by you in Q1 for their respective gate.
Digital Logic Design 40

3. What is the output of following figure? Briefly explain.

4. Draw an alternative circuit diagram of XOR Gate & XNOR Gate using NAND gate only.
Digital Logic Design 41

EXPERIMENT NO. 4: NOR GATE

AS UNIVERSAL GATE
Objective
The Objectives of this experiment:

1. To Study the behavior of NOR gate as universal gate.

2. To verify the truth table of different gate.

Equipment Required

• Digital Logic Trainer AM-2000

• Wires

Theory

The NOR gate is a popular logic element because it can be used as a universal gate; that is,
NOR gates can be used in combination to perform the AND, OR, NOT, NAND, XOR and XNOR
operations.

• A NOT gate can be implemented using a NOR gate by connecting both the inputs of
the NOR gate together as shown in Figure 3-4-1 (a).
• A NOR Gate performs the OR-NOT function. Removing the NOT gate at the output of
the NOR gate results in an OR gate as shown in Figure 3-4-1 (b).
• An AND Gate can be implemented using a combination of three NOR gates as shown
in Figure 3-4-1 (c).
• The AND gate implementation using three NOR gates is shown in previous figure. A
NAND gate implementation requires addition of an inverter (NOT) gate at the output
as shown in Figure 3-4-1 (d).
• An XOR gate is constructed similarly to an AND gate, except with an additional NOR
gate inserted such that if any inputs are low, the inputs to the final NOR gate will also
be low, and the output will be low plus the inverter or gate circuit at the end as
shown in Figure 3-4-1 (e).
• An XNOR gate can be constructed from four NOR gates implementing the expression
"(A NOR N) NOR (B NOR N) where N = A NOR B" as shown in Figure 3-4-1 (f).
Diagram

(a) NOT Gate using NOR Gate (b) OR Gate using NOR Gate
Digital Logic Design 42

(c) AND Gate using NOR Gate

(d) NAND Gate using NOR Gate

(e) XOR Gate using NOR Gate

(e) XNOR Gate using NOR Gate

Figure 3-4-1: NOR Gate working as Universal Gate

Pin Configurations

Figure 3-4-2: Pin diagram of 74LS02-Two Input NOR Gate

Digital Logic Design 43

Procedure

1. Connect the Digital Logic Trainer AM-2000 to 220V AC supply

2. Connect A input of NOR Gate to the Logic Switch 1 of the trainer using wire.
3. Connect B input of NOR to the Logic Switch 2 of the trainer using wire.
4. Connect F output of NOR Gate to the LED 1 of trainer using wire.
5. Now change the positions of switch 1 and switch 2 in order to note down the output
of the NOR gate according to the truth table.

Learning outcomes:
In this lab we have learned

1. The behavior of NOR gate as universal gate.

2. How to verify the truth table of different gate by using NOR gate?
Digital Logic Design 44

PRE LAB - EXPERIMENT NO. 4: NOR GATE AS UNIVERSAL GATE

Questions

1. Label all figure given in 3-4-1 also write the Boolean expression.

2. Verify all the Boolean expression written by you in Q1 for their respective gate.

3. Draw an alternative circuit diagram of XOR Gate & XNOR Gate using NAND gate only.
Digital Logic Design 45

4. What is the output of following figure? Briefly explain.

Digital Logic Design 46

Each student is required to perform the lab and submit the following Performa along with the
lab report.
1 = Unsatisfactory 2 = Fair 3= Satisfactory 4 = Very good 5= Excellent
Rating
Questions Remarks
(1 to 5)

1. To what extent did you learn on the material in

the lab?

2. Are you able to apply knowledge gained in the

lab to similar problems?

3. Are you able to analyze and interpret data

recorded in the lab?

4. Are you able to identify, formulate and solve

electrical engineering problems based on the
knowledge acquired in the lab.?

5. Can you design a system, component or process

to fulfill certain specifications based on the
knowledge acquired in the lab?

6. Were you able to function as a group in the lab?

7. Were you able to interpret effectively the

procedures and questions asked in the lab?

8. Comment whether your work in the lab has an

impact on the society.

Additional Comments (if any):

Digital Logic Design 47

Laboratory No: 4
Exclusive Gates
Digital Logic Design 48

EXPERIMENT NO. 1: EXCLUSIVE

- OR GATE
Objective
The Objectives of this experiment:

1. To Study the behavior of XOR gate by making truth table

2. To study the pin diagram of 74LS86.
3. To verify the truth table of XOR gate.

Equipment Required

• Digital Logic Trainer AM-2000

• Wires

Theory

The Exclusive OR gate has a graphic symbol similar to that of OR gate, except for the additional
curve on the input side. The Exclusive-OR is actually formed by a combination of other gates.
However, because of its fundamental importance in many applications, this gates is treated as
basic logical element with its own unique symbol. In a 2-input Exclusive -OR operation
⚫
The output will be HIGH when both inputs are at opposite level (i.e. different).
⚫
The output will be LOW when both inputs are at same level.
⚫
The gate circuit is often known as in-equality comparator or odd detector.

Diagram

Name Distinctive shape Rectangular Boolean Expression Truth Table

shape

XOR

Figure 4-1-1: Description for XOR

Digital Logic Design 49

Pin Configurations:

Figure 4-1-2: Pin Diagram of 74LS86-Two Input XOR Gate

Procedure

1. Connect the Digital Logic Trainer AM-2000 to 220V AC supply

2. Connect A input of XOR Gate to the Logic Switch 1 of the trainer using wire.
3. Connect B input of XOR to the Logic Switch 2 of the trainer using wire.
4. Connect F output of XOR Gate to the LED 1 of trainer using wire.
5. Now change the positions of switch 1 and switch 2 in order to note down the output
of the XOR gate according to the truth table
Observations and Results:
Table 4-1-1: Truth table for XOR gate.

A B F
OFF OFF
OFF ON
ON OFF
ON ON

Learning outcomes:
In this lab we have learned

1. The behavior of XOR gate by making truth table

2. The pin diagram of 74LS86.
3. How to verify the truth table of XOR gate?
Digital Logic Design 50

PRE LAB - EXPERIMENT NO. 1: EXCLUSIVE - OR GATE

Questions

1. State the behavior of XOR Gate in words.

2. What will be output of the XOR gate if inputs are not equal?

3. What will be the output of XOR gate if it’s all input are at logic-0 or at logic-1?

4. Draw the pin diagram of the 74LS86 IC and mention the inputs and outputs clearly.

5. Write the Boolean expression for 2-input XOR-gate also draw Circuit diagram.

6. Draw the Logic symbol of two input XOR gate.

Digital Logic Design 51

7. Develop the truth table for an XOR gate having 3-inputs. Also write Boolean
expression.

8. Design a circuit that generates an odd parity bit for 2-bit input.

9. Design a circuit that generates an even parity bit for 2-bit input.
Digital Logic Design 52

EXPERIMENT NO. 2: EXCLUSIVE

- NOR GATE
Objective
The Objectives of this experiment:

1. To Study the behavior of XNOR gate by making truth table

2. To verify the truth table of XNOR gate.

Equipment Required

• Digital Logic Trainer AM-2000

• Wires

Theory

The Exclusive NOR gate has a graphic symbol similar to that of OR gate, except for the
additional curve on the input side and an additional circle on output side. The Exclusive-NOR
is actually formed by a combination of other gates. However, because of its fundamental
importance in many applications, this gates is treated as basic logical element with its own
unique symbol. In a 2-input Exclusive -NOR operation
⚫
Complement of XOR Gate.
⚫
The output will be HIGH when both inputs are at same level.
⚫
The output will be LOW when both inputs are at different level.
⚫
The gate circuit is often known as equality comparator or even detector.

Diagram

Name Distinctive shape Rectangular Boolean Expression Truth Table

shape

XNOR

Figure 4-2-1: Description for XNOR gate

Digital Logic Design 53

Pin Configurations

Figure 4-2-2: Pin Diagram 74LS86-Two Figure 4-2-3: Pin Diagram 74LS04 NOT Gate
Input XOR Gate

Procedure

1. Connect the Digital Logic Trainer AM-2000 to 220V AC supply

2. Connect A input of XOR Gate to the Logic Switch 1 of the trainer using wire.
3. Connect B input of XOR to the Logic Switch 2 of the trainer using wire.
4. Connect output of XOR Gate to the input of NOT gate and connect F the output of
NOT gate to the LED 1 of trainer using wire.
5. Now change the positions of switch 1 and switch 2 in order to note down the output
of the XOR gate according to the truth table.

Observations and Results:

Table 4-2-1: Truth table for XNOR gate.

A B F
OFF OFF
OFF ON
ON OFF
ON ON

Learning outcomes:

1. The behavior of XNOR gate by making truth table

2. How to verify the truth table of XNOR gate?
Digital Logic Design 54

PRE LAB - EXPERIMENT NO. 2: EXCLUSIVE - NOR GATE

Questions
.
1. State the behavior of XNOR gate in words

2. What will be output of the XNOR gate if inputs are not equal?

3. What will be output of the XNOR-gate if all its input is at logic-0 or at logic-1?

4. What will be the output of XNOR-gate if its inputs are at different logics?

5. Write the Boolean expression for two input XNOR-gate.

6. Develop the truth table for 3-input XNOR-gate. Also write the Boolean expression.
Digital Logic Design 55

7. Draw the logic diagram of XNOR gates using basic gates.

8. Draw the timing wave diagram of the 2-input XNOR gate.

Digital Logic Design 56

Each student is required to perform the lab and submit the following Performa along with the
lab report.
1 = Unsatisfactory 2 = Fair 3= Satisfactory 4 = Very good 5= Excellent
Rating
Questions Remarks
(1 to 5)

1. To what extent did you learn on the material in

the lab?

2. Are you able to apply knowledge gained in the

lab to similar problems?

3. Are you able to analyze and interpret data

recorded in the lab?

4. Are you able to identify, formulate and solve

electrical engineering problems based on the
knowledge acquired in the lab.?

5. Can you design a system, component or process

to fulfill certain specifications based on the
knowledge acquired in the lab?

6. Were you able to function as a group in the lab?

7. Were you able to interpret effectively the

procedures and questions asked in the lab?

8. Comment whether your work in the lab has an

impact on the society.

Additional Comments (if any):

Digital Logic Design 57

Laboratory No: 5
Code Converters
Digital Logic Design 58

EXPERIMENT NO. 1: 4-BIT

BINARY TO GRAY CODE
CONVERSION
Objectives
The Objectives of this experiment:

1. To convert Binary code into Gray Code

2. To develop the logic diagram using Exclusive-OR gates.

Equipment Required
• Digital Logic Trainer AM-2000
• Wires

Theory

There is a class of codes, referred to as unit distance codes that are particularly important
when an analog quantity must be converted into digital representation. The basic property
of the unit distance code is that only one-bit change between two successive integers which
are being coded.

Here in this experiment we will make use of the following rule to convert from binary to gray
code.
Consider an n-bit Binary number (Input) = B n-1 B n-2 B n -3 ---------- B 2 B1 B 0
And assume an n-bit Gray Code number (Output) = G n-1 G n-2 G n -3 ------- G 2 G1 G 0

G n - 1 = B n -1

G n - 2 = B n -1 XOR B n - 2

G n - 3 = B n -2 XOR B n – 3

G 2 = B 3 XOR B 2

G 1 = B 2 XOR B 1

G 0 = B 1 XOR B 0
Digital Logic Design 59

Diagram

Figure 5-1-1: The logic diagram Binary code to Gray Code Conversion.

Procedure

1. Connect the Digital Logic Trainer AM-2000 to 220V AC supply

2. Select the logic switches for the Binary Input and mark them carefully.
3. In this case, make a proper combination using four available XOR gates on the trainer.
4. Select the LED’s for the output as Gray code and marks them carefully.
5. Now select the Binary inputs one by one and complete the circuit slowly.
6. Change the inputs starting 0 to 15 and complete the truth table given below.
Digital Logic Design 60

Observations and Results:

Complete the table given below carefully by examining and carrying out the operations
mentioned in the theory.

Table 5-1-1: Code Conversion table from Binary to Gray Code.

Binary Code Gray Code

Inputs Outputs
B4 B3 B2 B1 G4 G3 G2 G1
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1

Learning outcomes:
In this lab we have learned

1. To convert Binary code into Gray Code

2. To develop the logic diagram using Exclusive-OR gates.
Digital Logic Design 61

PRE LAB - EXPERIMENT NO. 1: 4-BIT BINARY TO GRAY CODE

CONVERSION

Questions

1. What do you mean by unit distance codes?

2. How can we use Exclusive-OR to convert the binary number of into gray code?

3. Write the rule that converts the binary number into gray code in your own words in
the form of algorithm.

4. Draw the Karnaugh Map for output G4 (B4, B3, B2, B1) and write its simplified
Boolean equation.

G4 (B4, B3, B2, B1) =

Digital Logic Design 62

5. Draw the Karnaugh Map for output G3 (B4, B3, B2, B1) and write its simplified
Boolean equation.

G3 (B4, B3, B2, B1) =

6. Draw the Karnaugh Map for output G2 (B4, B3, B2, B1) and write its simplified
Boolean equation.

G2 (B4, B3, B2, B1) =

7. Draw the Karnaugh Map for output G1 (B4, B3, B2, B1) and write its simplified
Boolean equation.

G1 (B4, B3, B2, B1) =

Digital Logic Design 63

EXPERIMENT NO. 2: 4-BIT GRAY

TO BINARY CODE CONVERSION
Objective
The Objectives of this experiment:

1. To convert Gray code into Binary Code

2. To develop the logic diagram using Exclusive-OR gates.

Equipment Required

• Digital Logic Trainer AM-2000

• Wires

Theory

There is a class of codes, referred to as unit distance codes that are particularly important
when an analog quantity must be converted into digital representation. The basic property
of the unit distance code is that only one-bit change between two successive integers which
are being coded.

Here in this experiment we will make use of the following rule to convert from binary to gray
code.
Consider an n-bit Gray Code number (Input) = G n-1 G n-2 G n -3 ------- G 2 G1 G 0 and assume
an n-bit Binary number (output) = B n-1 B n-2 B n -3 ---------- B 2 B1 B 0

B n - 1 = G n -1

B n - 2 = B n -1 XOR G n - 2

B n - 3 = B n -2 XOR G n – 3

B 2 = B 3 XOR G 2

B 1 = B 2 XOR G 1

B 0 = B 1 XOR G 0
Digital Logic Design 64

Figure 5-2-1: The logic diagram Binary code to Gray Code Conversion.

Procedure

1. Connect the Digital Logic Trainer AM-2000 to 220V AC supply

2. Select the logic switches for the Binary Input and mark them carefully.
3. In this case, make a proper combination using four available XOR gates on the trainer.
4. Select the LED’s for the output as Gray code and marks them carefully.
5. Now select the Binary inputs one by one and complete the circuit slowly.
6. Change the inputs starting 0 to 15 and complete the truth table given below.

Observations and Results:

Digital Logic Design 65

Complete the table given below carefully by examining and carrying out the
operations mentioned in the theory.

Table 5-2-1: Code Conversion table from Binary to Gray Code.

Gray Code Binary Code

Inputs Outputs
G4 G3 G2 G1 B4 B3 B2 B1
0 0 0 0
0 0 0 1
0 0 1 1
0 0 1 0
0 1 1 0
0 1 1 1
0 1 0 1
0 1 0 0
1 1 0 0
1 1 0 1
1 1 1 1
1 1 1 0
1 0 1 0
1 0 1 1
1 0 0 1
1 0 0 0

Learning outcomes:
In this lab we have learned

1. To convert Gray code into Binary Code

2. To develop the logic diagram using Exclusive-OR gates.
Digital Logic Design 66

PRE LAB - EXPERIMENT NO. 2: 4-BIT GRAY TO BINARY CODE

CONVERSION
Questions

1. What do you mean by unit distance codes?

2. How can we use Exclusive-OR to convert the Gray code number of into Binary code
number?

3. Write the rule that converts the Gray code number into Binary code in your own
words in the form of algorithm.

4. Draw the Karnaugh Map for output B4 (G4, G3, G2, G1) and write its simplified
Boolean equation.

B4 (G4, G3, G2, G1) =

Digital Logic Design 67

5. Draw the Karnaugh Map for output B3 (G4, G3, G2, G1) and write its simplified
Boolean equation.

B3 (G4, G3, G2, G1) =

6. Draw the Karnaugh Map for output B2 (G4, G3, G2, G1) and write its simplified
Boolean equation.

B2 (G4, G3, G2, G1) =

7. Draw the Karnaugh Map for output B1 (G4, G3, G2, G1) and write its simplified
Boolean equation.

B1 (G4, G3, G2, G1) =

Digital Logic Design 68

EXPERIMENT NO. 3: BCD (8421)

TO EXCESS-3 CODE
CONVERSION
Objectives
The Objectives of this experiment:

1. To convert Binary Coded Decimal (8421) Excess-3 Code

2. To develop the Code Converter using basic gates.
3. To develop the Code Converter using IC 74LS85 4-bit Adder.

Equipment Required

• Digital Logic Trainer AM-2000

• Wires

Theory

Electronic digital systems use signals that have two distinct values and circuit elements have
two stable states. There is a direct analogy among binary signals, binary circuit elements,
and binary digits. A binary number of n-digits, for example, may be represented by n circuit
elements, each having an output signal equivalent to 0 or a 1.
Binary codes for decimal digits require a minimum of four bits. Numerous different codes
can be obtained by arranging four or more bits in ten distinct possible combinations. The
BCD (binary coded decimal) is a straight assignment of the binary equivalent. It is possible to
assign weights to binary bits according to their positions. The weights in the BCD code are 8,
4, 2, and 1. The bit assignment 0110, for example, can be interpreted by the weights to
represent the decimal digit 6 because
08+14+12+01=6
Here in this experiment we will convert the BCD 8421 to Excess-3 Code.
Consider an 4-bit BCD 8421 number (Inputs) = B4 B3 B2 B 1 and assume an 4-bit Excess-3
Code number (Outputs) = E4 E3 E2 E1

Diagram

BCD 8421
to
Inputs Excess-3 Code Converter Outputs

Figure 5-3-1: The Block diagram BCD 8421 to Excess-3 Code Converter.
Digital Logic Design 69

Procedure

1. Use the pre- lab for Boolean expression and make the connections.
2. Connect the Digital Logic Trainer AM-2000 to 220V Ac power supply
3. Select the logic switches for the Binary Coded Decimal Input and mark them carefully.
4. Select the LED’s for output as Excess-3 code and marks them carefully.
5. Now select the Binary inputs one by one and complete the circuit slowly.
6. Change the inputs starting 0 to 15 and complete the truth table given below.

Observations and Results:

Complete the table given below carefully by examining and carrying out the operations
mentioned in the theory.

Table 5-3-1: Code Conversion table from Binary to Gray Code.

Binary Coded Decimal 8421 Excess-3 Code

Inputs Outputs
B4 B3 B2 B1 E4 E3 E2 E1
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1

Learning outcomes:
In this lab we have learned

1. How to convert Binary Coded Decimal (8421) Excess-3 Code

2. How to develop the Code Converter using basic gates?
3. How to develop the Code Converter using IC 74LS85 4-bit Adder?
Digital Logic Design 70

PRE LAB - EXPERIMENT NO. 3: BCD (8421) TO EXCESS-3 CODE

CONVERSION
NOTE
Obtain data sheet of all the IC’s required in the Lab from Lab Staff.

Questions

1. How can you develop the circuit using IC 74LS83 (4-bit full adder) to obtain the
Excess-3 Code from outputs of the IC 74LS83?

2. Perform the whole experiment to get the same results using 4-bit full adder.

3. Draw the Karnaugh Map for output E4 (B4, B3, B2, B1) and write its simplified
Boolean equation.

E4 (B4, B3, B2, B1) =

Digital Logic Design 71

4. Draw the Karnaugh Map for output E3 (B4, B3, B2, B1) and write its simplified
Boolean equation.

E3 (B4, B3, B2, B1) =

5. Draw the Karnaugh Map for output E2 (B4, B3, B2, B1) and write its simplified
Boolean equation.

E2 (B4, B3, B2, B1) =

6. Draw the Karnaugh Map for output E1 (B4, B3, B2, B1) and write its simplified
Boolean equation.

E1 (B4, B3, B2, B1) =

Digital Logic Design 72

EXPERIMENT NO. 4: EXCESS-

3 CODE TO BCD (8421)
CONVERSION
Objectives
The Objectives of this experiment:

1. To convert Excess-3 Code to Binary Coded Decimal (8421)

2. To develop the Code Converter using basic gates.
3. To develop the Code Converter using IC 74LS85 4-bit Adder.

Equipment Required

• Digital Logic Trainer AM-2000

• Wires
Theory

Electronic digital systems use signals that have two distinct values and circuit elements have
two stable states. There is a direct analogy among binary signals, binary circuit elements,
and binary digits. A binary number of n-digits, for example, may be represented by n circuit
elements, each having an output signal equivalent to 0 or a 1.
Binary codes for decimal digits require a minimum of four bits. Numerous different codes
can be obtained by arranging four or more bits in ten distinct possible combinations. The
BCD (binary coded decimal) is a straight assignment of the binary equivalent. It is possible to
assign weights to binary bits according to their positions. The weights in the BCD code are 8,
4, 2, and 1. The bit assignment 0110, for example, can be interpreted by the weights to
represent the decimal digit 6 because
08+14+12+01=6
Here in this experiment we will convert the BCD 8421 to Excess-3
Code. Consider 4-bit Excess-3 Code number (Inputs) = E4 E3 E2 E1
Assume 4-bit BCD 8421 number (Outputs) = B4 B3 B2 B 1

Diagram
Excess-3 Code
to
Inputs BCD 8421 Converter Outputs

Figure 5-4-1: The Block Diagram Excess-3 Code to BCD 8421 Converter.
Digital Logic Design 73

Procedure

1. Use the pre- lab for Boolean expression and make the connections.
2. Connect the Digital Logic Trainer AM-2000 to 220V Ac power supply
3. Select the logic switches for the Excess-3 Code Input and mark them carefully.
4. Select the LED’s for output as Binary Coded Decimal and marks them carefully.
5. Now select the Binary inputs one by one and complete the circuit slowly.
6. Change the inputs starting 0 to 15 and complete the truth table given below.
Observations and Results:

Complete the table given below carefully by examining and carrying out the operations
mentioned in the theory.

Table 5-4-1: Code Conversion table from Binary to Gray Code.

Excess-3 Code Binary Coded Decimal 8421

Inputs Outputs
E4 E3 E2 E1 B4 B3 B2 B1
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1

Learning outcomes:
In this lab we have learned

1. How to convert Excess-3 Code to Binary Coded Decimal (8421)

2. How to develop the Code Converter using basic gates?
3. How to develop the Code Converter using IC 74LS83 4-bit Adder?
Digital Logic Design 74

PRE LAB - EXPERIMENT NO. 4: EXCESS-3 CODE TO BCD (8421)

CONVERSION
NOTE
Obtain data sheet of all the IC’s required in the Lab from Lab Staff.

Questions

1. How can you develop the circuit using IC 74LS83 (4-bit full adder) to obtain the BCD
8421 Code from outputs of the IC 74LS83?

2. Perform the whole experiment to get the same results using 4-bit full adder.

3. Draw the Karnaugh Map for output B4 (E4, E3, E2, E1) and write its simplified
Boolean equation.

B4 (E4, E3, E2, E1) =

Digital Logic Design 75

4. Draw the Karnaugh Map for output B3 (E4, E3, E2, E1) and write its simplified
Boolean equation.

E3 (E4, E3, E2, E1) =

5. Draw the Karnaugh Map for output B2 (E4, E3, E2, E1) and write its simplified
Boolean equation.

B2 (E4, E3, E2, E1) =

6. Draw the Karnaugh Map for output B1 (E4, E3, E2, E1) and write its simplified
Boolean equation.

B1 (E4, E3, E2, E1) =

Digital Logic Design 76

Each student is required to perform the lab and submit the following Performa along with the
lab report.
1 = Unsatisfactory 2 = Fair 3= Satisfactory 4 = Very good 5= Excellent
Rating
Questions Remarks
(1 to 5)

1. To what extent did you learn on the material in

the lab?

2. Are you able to apply knowledge gained in the

lab to similar problems?

3. Are you able to analyze and interpret data

recorded in the lab?

4. Are you able to identify, formulate and solve

electrical engineering problems based on the
knowledge acquired in the lab.?

5. Can you design a system, component or process

to fulfill certain specifications based on the
knowledge acquired in the lab?

6. Were you able to function as a group in the lab?

7. Were you able to interpret effectively the

procedures and questions asked in the lab?

8. Comment whether your work in the lab has an

impact on the society.

Additional Comments (if any):

Digital Logic Design 77

Laboratory No: 6
Half Adder
&
Half Subtractor
Digital Logic Design 78

EXPERIMENT NO. 1: HALF

ADDER
Objective
The Objectives of this experiment:

1. To Study the behavior of Half Adder circuit by making truth table

2. To verify the truth table of Half Adder.

Equipment Required

• Digital Logic Trainer AM-2000

• Wires

Theory

Adders are important not only in the computers, but in many types of digital systems in
which numerical data are processed. An understanding of the basic adder operation is
fundamental to the study of digital system. In this lab half adder is introduced.
Half Adder accepts two binary digits on its inputs and produces two binary digits on its
outputs, one output is called sum bit and the other is called carry bit.

Diagram

Figure 6-1-1: Two logic diagrams for Half Adder.

Procedure
1. Connect the Digital Logic Trainer AM-2000 to 220V AC supply.
2. Carry out the circuit of figure 6-1-1 using an AND and XOR gates on AM-2000 trainer.
3. Connects the inputs X and Y to two switches.
4. Connects the outputs S (sum) and C (carry over) to two LED.
5. Note down the outputs and compare it to the truth table of HALF-ADDER.
Digital Logic Design 79

Observations and Results:

Table 6-1-1: Truth table for Half Adder circuit.

Inputs Outputs
X Y C S
0 0
0 1
1 0
1 1

Learning outcomes:
In this lab we have learned

1. The behavior of Half Adder circuit by making truth table

2. How to verify the truth table of Half Adder?
Digital Logic Design 80

PRE LAB - EXPERIMENT NO. 1: HALF ADDER

Questions

1. State the behavior of Half Adder circuit in words.

2. What will be output of the Sum if inputs are not equal?

3. What will be the output of Sum if it’s all inputs are at logic-0 or at logic-1?

4. Write the Boolean expression for Half Adder circuit? Also Draw the logic and block
diagram.

5. Implement the half adder circuit using minimum number of NAND Gates only.
Digital Logic Design 81

6. Implement the half adder circuit using minimum number of NOR Gates only.
Digital Logic Design 82

EXPERIMENT NO. 2: HALF

SUBTRACTOR
Objective

The Objectives of this experiment:

1. To Study the behavior of Half Subtractor circuit by making truth table

2. To verify the truth table of Half Subtractor.

Equipment Required

• Digital Logic Trainer AM-2000

• Wires

Theory

Adders and Subtractor are important not only in the computers, but in many types of digital
systems in which numerical data are processed. An understanding of the basic adder
operation is fundamental to the study of digital system. In this lab Half Subtractor is
introduced.
Half Subtractor accepts two binary digits on its inputs and produces two binary digits on its
outputs, one output is called difference bit and the other is called barrow bit.
Diagram

Figure 6-2-1: Logic diagram for Half Subtractor.

Figure 6-2-2: Block diagram for Half Subtractor.

Digital Logic Design 83

Procedure

1. Connect the Digital Logic Trainer AM-2000 to 220V AC supply.

2. Carry out the circuit of figure 6-2-1 using an AND, NOT and XOR gates on AM-2000
trainer.
3. Connects the inputs a and b to two switches.
4. Connects the outputs B (Subtractor) and D (carry over) to two LED.
5. Note down the outputs and compare it to the truth table of Half Subtractor.

Observations and Results:

Table 6-2-1: Truth table for Half Subtractor circuit.

Inputs Outputs
a b B D
0 0
0 1
1 0
1 1

Learning outcomes:
In this lab we have learned

1. The behavior of Half Subtractor circuit by making truth table

2. How to verify the truth table of Half Subtractor?
Digital Logic Design 84

PRE LAB - EXPERIMENT NO. 2: HALF SUBTRACTOR

Questions

1. State the behavior of Half Subtractor circuit in words.

2. What will be output of the Difference if inputs are not equal?

3. What will be the output of Borrow if it’s all inputs are at logic-0 or at logic-1?

4. Write the Boolean expression for Half Adder circuit. Also draw the logic diagram of
Half Subtractor?

5. Implement the circuit in NAND Gates only.

6. Implement the circuit in NOR Gates only.

Digital Logic Design 85
Digital Logic Design 86

Each student is required to perform the lab and submit the following Performa along with the
lab report.
1 = Unsatisfactory 2 = Fair 3= Satisfactory 4 = Very good 5= Excellent
Rating
Questions Remarks
(1 to 5)

1. To what extent did you learn on the material in

the lab?

2. Are you able to apply knowledge gained in the

lab to similar problems?

3. Are you able to analyze and interpret data

recorded in the lab?

4. Are you able to identify, formulate and solve

electrical engineering problems based on the
knowledge acquired in the lab.?

5. Can you design a system, component or process

to fulfill certain specifications based on the
knowledge acquired in the lab?

6. Were you able to function as a group in the lab?

7. Were you able to interpret effectively the

procedures and questions asked in the lab?

8. Comment whether your work in the lab has an

impact on the society.

Additional Comments (if any):

Digital Logic Design 87

Laboratory No: 7
Full Adder
&
Full Subtractor
Digital Logic Design 88

EXPERIMENT NO. 1: FULL

ADDER
EXPERIMENT NO. 2: FULL
SUBTRACTOR
Objective
The Objectives of this experiment:

1. To Study the behavior of Full Adder & Full Subtractor circuit by making truth table.
2. To verify the truth table of Full Adder.
3. To verify the truth table of Full Subtractor.

Equipment Required

• Digital Logic Trainer AM-2000

• Wires

Theory

Adders are important not only in the computers, but in many types of digital systems in
which numerical data are processed. An understanding of the basic adder operation is
fundamental to the study of digital system. In this lab Full adder & Subtractor is introduced.
Full Adder accepts three binary digits on its inputs and produces two binary digits on its
outputs, one output is called sum bit and the other is called carry bit.
Diagram

Figure 7-1-1: Two logic diagrams for Half Adder.

Digital Logic Design 89

Figure 7-1-2: Full Adder using two Half Adders.

Procedure

1. Connect the Digital Logic Trainer AM-2000 to 220V AC supply.

2. Keep the circuit of the half adders and carry out also the circuit of Figure 7-1-1.
3. Connect the two circuits so that the carry-out output of the first circuit goes to the
input Rn-1 of the second.
4. Set the 4 switches of the inputs so that x of the first stage(x0) and xn of the second
stage (x1) are near, and so also for the inputs y.
5. Connect the output S of the simpler circuit, the output Sn of the other and the carry-
over Cn to three consecutive LED
6. Carry out all the combinations with the switches and analyze the state of the outputs
each time.
Observations and Results:
Table 7-1-1: Truth table for Full Adder circuit.

Inputs Outputs
x y z C S
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1

Learning outcomes:
In this lab we have learned

1. The behavior of Full Adder & Full Subtractor circuit by making truth table.
2. How to verify the truth table of Full Adder?
3. How to verify the truth table of Full Subtractor?
Digital Logic Design 90

PRE LAB - EXPERIMENT NO. 1: FULL ADDER

Questions

1. Draw the block diagram of Full Adder

2. Draw the block diagram of Full Adder using Half Adders as building blocks.

3. Develop the Functional Table (Truth Table)

Inputs Outputs
x y z C S
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
4. Write the Boolean expression output S(x, y)? Also draw the logic diagram.
Digital Logic Design 91

5. Write the Boolean expression for output C(x, y)? Also draw the logic diagram.

6. Implement the circuit in NAND Gates only.

7. Implement the circuit in NOR Gates only.

8. Design a 2-bit parallel (ripple) binary adder.

Digital Logic Design 92

9. Design a full Subtractor by following the same procedure as for Full Adder.
Digital Logic Design 93

PRE LAB - EXPERIMENT NO. 2: FULL SUBTRACTOR

Questions

1. Draw the block diagram of Full Subtractor

2. Draw the block diagram of Full Subtractor using Half Subtractor as building blocks.

3. Develop the Functional Table (Truth Table)

Inputs Outputs
x y z B D
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1

4. Write the Boolean expression output D(x, y)? Also draw the logic diagram.
Digital Logic Design 94

5. Write the Boolean expression for output B(x, y)? Also draw the logic diagram.

6. Implement the circuit in NAND Gates only.

7. Implement the circuit in NOR Gates only.

8. Design a 2-bit parallel (ripple) binary Subtractor.

Digital Logic Design 95

Each student is required to perform the lab and submit the following Performa along with the
lab report.
1 = Unsatisfactory 2 = Fair 3= Satisfactory 4 = Very good 5= Excellent
Rating
Questions Remarks
(1 to 5)

1. To what extent did you learn on the material in

the lab?

2. Are you able to apply knowledge gained in the

lab to similar problems?

3. Are you able to analyze and interpret data

recorded in the lab?

4. Are you able to identify, formulate and solve

electrical engineering problems based on the
knowledge acquired in the lab.?

5. Can you design a system, component or process

to fulfill certain specifications based on the
knowledge acquired in the lab?

6. Were you able to function as a group in the lab?

7. Were you able to interpret effectively the

procedures and questions asked in the lab?

8. Comment whether your work in the lab has an

impact on the society.

Additional Comments (if any):

Digital Logic Design 96

Laboratory No: 8
Decoders
Digital Logic Design 97

EXPERIMENT NO. 1: 2-LINE-TO-

4-LINE DECODER
Objectives
The Objectives of this experiment:

1. To design a 2 × 4 decoder using basic gates.

2. To understand the operation of 2 × 4 decoder.
3. To implement the Boolean function using 2 × 4 Decoder.

Equipment Required

• Digital Logic Trainer AM-2000

• Wires

Theory
Decoders are used to translate information from one form to another form. A decoder is a
combinational circuit that converts binary information from n-input lines to a maximum of
2n unique output line. If the n-bit coded information has unused combinations, the decoder
may have fewer than 2n outputs. The decoder presented here are called n-to-m-line
decoders, where m < = 2n, their purpose is to generate the 2n (or fewer) min-terms of n
input variables. The name decoder is also used in conjunction with other code converters
such as BCD-to-seven-segment decoder.
2  4 line decoder has two input lines, four output lines and may or may not have enable
lines. For each possible input combination, there are three outputs that are equal to 0 and
only one that is equal to 1. The output whose value is 1 represents the minterm equivalent
of the binary number presently available in the input lines. Hence decoders are also called
min-term generators. As decoder can implement more than one function easily.
Diagram

2 inputs 2  4 Decoder 4 Outputs

Figure 8-1-1: The Block diagram of 2  4 Decoder

Logic Diagram

Draw the logic diagram of 2  4 Decoder

Digital Logic Design 98

Pin Diagram of SN74LS42

Figure 8-1-2: The Block diagram of 2  4 Decoder

Procedure

1. Use the pre- lab for Boolean expression and make the connections.
2. Connect the Digital Connect the Digital Logic Trainer AM-2000 to 220V AC supply.
3. Connect I1 input of Decoder Gate to the Logic Switch 1 of the trainer using wire.
4. Connect I0 input of Decoder Gate to the Logic Switch 2 of the trainer using wire.
5. Connect D0, D1, D2, D3 output of Decoder Gate to the LEDs of trainer using wire.
6. Now change the positions of switch 1 and switch 2 in order to note down the output
of the Decoder Gate according to the truth table.

Observations and Results:

Complete the table given below carefully by examining and carrying out the operations
mentioned in the theory.
Figure 8-1-1: Function table for 2  4 Decoder.

Inputs Outputs
I1 I0 D0 D1 D2 D3
0 0
0 1
1 0
1 1

Learning outcomes:
In this lab we have learned

1. To design a 2 × 4 decoder using basic gates

2. To understand the operation of 2 × 4 decoder.
3. To implement the Boolean function using 2 × 4 Decoder.
Digital Logic Design 99

PRE LAB - EXPERIMENT NO. 1: 2-LINE-TO-4-LINE DECODER

NOTE
Obtain data sheet of all the IC’s required in the Lab from Lab Staff.

Questions
1. Add an enable line for 2  4 decoder. Write the name of enable line.

2. Draw the block diagram of 2  4 decoder. Mention all inputs, outputs and enable line
clearly.

3. Develop the Functional Table (Truth Table)

Enable Inputs Outputs

E I1 I0 D0 D1 D2 D3
0 x x 0 0 0 0
1 0 0
1 0 1
1 1 0
1 1 1

4. Write the Boolean expression for the

output. D0 =

D1 =

D2 =

D3 =
Digital Logic Design 100

5. Draw the logic diagram of 2  4 Decoder.

6. Implement the Half Adder circuit using 2  4 Decoder

Digital Logic Design 101

EXPERIMENT NO. 2: 3-LINE-TO-

8-LINE DECODER
Objectives
The Objectives of this experiment:

7. To design a 3 × 8 decoder using basic gates

8. To understand the operation of 3 × 8 decoder.
9. To implement the Boolean function using 3 × 8 Decoder.

Equipment Required

• Digital Logic Trainer AM-2000

• Wires

Theory

Decoders are used to translate information from one form to another form. A decoder is a
combinational circuit that converts binary information from n-input lines to a maximum of
2n unique output line. If the n-bit coded information has unused combinations, the decoder
may have fewer than 2n outputs. The decoder presented here are called n-to-m-line
decoders, where m < = 2n, their purpose is to generate the 2n (or fewer) min-terms of n
input variables. The name decoder is also used in conjunction with other code converters
such as BCD-to-seven-segment decoder.
3  8 line decoder has three input lines, eight output lines and may or may not have enable
lines. For each possible input combination, there are seven outputs that are equal to 0 and
only one that is equal to 1. The output whose value is 1 represents the minterm equivalent
of the binary number presently available in the input lines. Hence decoders are also called
min-term generators. As decoder can implement more than one function easily.

Diagram

8 Outputs
3 inputs 3  8 Decoder

Figure 8-2-1: The Block diagram of 3  8 Decoder

Digital Logic Design 102

Logic Diagram

Draw the logic diagram of 3  8 Decoder

Pin Diagram of SN74LS42

Figure 8-1-2: The Block diagram of 2  4 Decoder

Procedure

1. Use the pre- lab for Boolean expression and make the connections.
2. Connect the Digital Connect the Digital Logic Trainer AM-2000 to 220V AC supply.
3. Connect I0 input of Decoder Gate to the Logic Switch 1 of the trainer using wire.
4. Connect I1 input of Decoder Gate to the Logic Switch 2 of the trainer using wire.
5. Connect I2 input of Decoder Gate to the Logic Switch 3 of the trainer using wire
6. Connect D0, D1, D2, D3, D4, D5, D6, D7 output of Decoder Gate to the LEDs of
trainer using wire.
7. Now change the positions of switches, in order to note down the output of the
Decoder Gate according to the truth table.
Digital Logic Design 103

Observations and Results:

Complete the table given below carefully by examining and carrying out the operations
mentioned in the theory.
Table 8-2-1: Function table for 3  8 Decoder.

Enable Inputs Outputs

E I2 I1 I0 D0 D1 D2 D3 D4 D5 D6 D7

0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
1 1 1

Learning outcomes:
In this lab we have learned

1. The operation of IC SN74LS42 (3 × 8 Decoder)

2. How to implement the Boolean function using IC SN74LS42 (3 × 8 Decoder)?
Digital Logic Design 104

PRE LAB - EXPERIMENT NO. 2: 3-LINE-TO-8-LINE DECODER

NOTE
Obtain data sheet of all the IC’s required in the Lab from Lab Staff
Questions

1. Draw the pin diagram of 3  8 decoder. Mention all inputs, outputs and enable line
clearly.

2. Develop the Functional Table (Truth Table)

Enable Inputs Outputs

G1 G2A G2B I2 I1 I0 D0 D1 D2 D3 D4 D5 D6 D7

0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
1 1 1

3. Write the Boolean expression for the outputs.

D0 =

D1 =

D2 =

D3 =
Digital Logic Design 105

D4 =

D5 =

D6 =

D7 =

4. Draw the logic diagram of 3  8 Decoder.

5. Implement 4 line to 16-line decoder using 2 line to 4-line decoder.

Digital Logic Design 106

6. Design and Implement the Full Subtractor circuit using 3  8 Decoder

Digital Logic Design 107

Each student is required to perform the lab and submit the following Performa along with the
lab report.
1 = Unsatisfactory 2 = Fair 3= Satisfactory 4 = Very good 5= Excellent

Rating
Questions Remarks
(1 to 5)

1. To what extent did you learn on the material in

the lab?

2. Are you able to apply knowledge gained in the

lab to similar problems?

3. Are you able to analyze and interpret data

recorded in the lab?

4. Are you able to identify, formulate and solve

electrical engineering problems based on the
knowledge acquired in the lab.?

5. Can you design a system, component or process

to fulfill certain specifications based on the
knowledge acquired in the lab?

6. Were you able to function as a group in the lab?

7. Were you able to interpret effectively the

procedures and questions asked in the lab?

8. Comment whether your work in the lab has an

impact on the society.

Additional Comments (if any):

Digital Logic Design 108

Laboratory No: 9
BCD
to
7-Segment Decoder
Digital Logic Design 109

EXPERIMENT NO. 1: BCD TO

SEVEN SEGMENT DECODER
Objectives
The Objectives of this experiment:

1. To understand the operation of IC SN74LS247.

2. To understand the operation of Seven Segment display.
3. To develop a BCD to Seven Segment circuit.

Equipment Required

• Digital Logic Trainer AM-2000

• Wires

Theory

A seven-segment is used for displaying any one of the decimal digits 0 through 9. Usually the
decimal digit is available in BCD. A BCD to seven segment decoder accepts a decimal digit in
BCD and generate the corresponding seven-segment code.

The IC 7447 is a BCD to seven segment decoder/driver. It has four inputs for the BCD digit.
The 4-bit BCD digit is converted to a seven segment code with outputs a through g. The
outputs of the 7447 is applied to the inputs of seven segment display.

The seven segment display IC contains the seven LED (light emitting diode) segments on top
of the package. A 47-ohm resistor to Vcc is needed in order to supply the proper current to
the selected LED’s segments.

Different seven segment display may have different things. So it is mentioned to consult the
particular details of all the IC’s to be used.
Diagram

Figure 9-1-1: BCD to seven-segment decoder (SN74LS247) and seven-segment-display.

Digital Logic Design 110

Figure 9-1-2: (a) Segment designation (b) Numeric designation for display.

Procedure

1. Connect the Digital Logic Trainer AM-2000 to 220V AC supply.

2. Connect the inputs of the decoder/driver to the BCD pre-scalar and reset the pre-
scalar.
3. Connect the decoding outputs to the LEDs.
4. Proceed in a sequential order to observe the decimal display.
5. Observe all outputs carefully.

Observations and Results:

Table 9-1-1: Truth table for BCD to seven segment decoder

NOTE
Inputs 1010 through 1111 have no meaning in BCD. Depending upon the decoder, these
values may cause either a blank or meaningless pattern or as mentioned in the data sheets.
Observe and record the output displayed patterns of the six unused input combinations.
Learning outcomes:
In this lab we have learned

1. The operation of IC SN74LS247.

2. The operation of Seven Segment display.
3. How to develop a BCD to Seven Segment circuit?
Digital Logic Design 111

PRE LAB - EXPERIMENT NO. 1: BCD TO SEVEN SEGMENT DECODER

NOTE
Obtain data sheet of all the IC’s required in the Lab from Lab Staff

SECTION A: BCD TO SEVEN SEGMENT DECODER

Questions

1. Draw the block diagram of a BCD to seven-segment-decoder. Mention all input lines
and output lines clearly.

2. Develop the Functional Table (Truth Table).

BCD Inputs Outputs

A B C D a b c d e f g

3. Draw the Karnaugh Map and write Boolean expression for output a.
Digital Logic Design 112

4. Draw the Karnaugh Map and write Boolean expression for output b.

5. Draw the Karnaugh Map and write Boolean expression for output c.

6. Draw the Karnaugh Map and write Boolean expression for output d.

7. Draw the Karnaugh Map and write Boolean expression for output e.
Digital Logic Design 113

8. Draw the Karnaugh Map and write Boolean expression for output f.

9. Draw the Karnaugh Map and write Boolean expression for output g.

10. Draw the logic diagram of BCD to seven segment decoder.

Digital Logic Design 114

SECTION B: IC 7447
Questions

1. Draw Pin Diagram for IC 7447 BCD to Seven Segment driver

7447 BCD to Seven Segment Driver

2. Draw diagram for Seven Segment Display

3. How many LED’s are there in seven segment display?

4. Write their names.

5. What do understand by the term common cathode type seven segment indicator?
Digital Logic Design 115

6. How will you make connections of seven segment of common cathode type?
Draw the figure.

7. What do understand by the term common anode type seven segment indicator?

8. How will you make connections of seven segment of common anode type? Draw
the figure.
Digital Logic Design 116

Each student is required to perform the lab and submit the following Performa along with the
lab report.
1 = Unsatisfactory 2 = Fair 3= Satisfactory 4 = Very good 5= Excellent
Rating
Questions Remarks
(1 to 5)

1. To what extent did you learn on the material in

the lab?

2. Are you able to apply knowledge gained in the

lab to similar problems?

3. Are you able to analyze and interpret data

recorded in the lab?

4. Are you able to identify, formulate and solve

electrical engineering problems based on the
knowledge acquired in the lab.?

5. Can you design a system, component or process

to fulfill certain specifications based on the
knowledge acquired in the lab?

6. Were you able to function as a group in the lab?

7. Were you able to interpret effectively the

procedures and questions asked in the lab?

8. Comment whether your work in the lab has an

impact on the society.

Additional Comments (if any):

Digital Logic Design 117

Laboratory No: 10
Encoders
Digital Logic Design 118

EXPERIMENT NO. 1: 4-LINE-TO-

2-LINE ENCODER
Objectives
The Objectives of this experiment:

1. To design a 4 × 2 encoder using basic gates.

2. To understand the operation of 4 × 2 encoder.
3. To design a 4 × 2 Priority encoder using basic gates
4. To understand the operation of 4 × 2 Priority encoder.

Equipment Required

• Digital Logic Trainer AM-2000

• Wires
Theory

An encoder is a digital function that performs the inverse operation of a decoder. An

encoder has 2n (or fewer) input lines and n output lines. The output lines generate the
binary code corresponding to the input value. Encoder is a combinational circuit that
generate the binary code corresponding to the input value.

An example of the encoder is 4  2 line encoder, it has four input lines one for each of the
binary digits, two output lines that generate the corresponding binary number. It is assumed
that only one input has a high value of at any given time. The encoder just defined has the
limitation that only one input can be active at any given time: if two inputs are active
simultaneously, the output produces an incorrect combination.

To resolve this ambiguity, some encoder circuit must establish an input priority to ensure
that only one input is encoded. Another ambiguity in the encoder is that an output of all 0’s
is generated when all the inputs are 0, but this output is the same as when first input is
equal to 1. This discrepancy can be resolved by providing one more output to indicate that
at least one input is equal to 1.

A priority encoder is a combinational circuit that implements a priority function. The

operation of the priority encoder is such that if two or more inputs are equal to 1 at the
same time, the input having the highest priority takes the precedence.
Diagram

4 inputs 4  2 Encoder 2 Outputs

Figure 10-1-1: The Block diagram of 4  2 Encoder

Digital Logic Design 119

Pin Diagram.

Figure 10-1-2: Encoder

Procedure

1. Use the pre- lab for Boolean expression and make the connections.
2. Connect the Digital Connect the Digital Logic Trainer AM-2000 to 220V AC supply.
3. Connect D0, D1, D2, and D3input of Encoder Gate to the Logic Switches of the trainer
using wire.
4. Connect O1, O0 output of Encoder Gate to the LEDs of trainer using wire.
5. Now change the positions of switches, in order to note down the output of the
Encoder Gate according to the truth table.
6. Proceed in a sequential order to complete the whole Functional Table given below.
7. Note down all outputs carefully.

Observations and Results:

Complete the table given below carefully

Table 10-1-1: Function table for 2  4 Encoder.

Inputs Outputs
D0 D1 D2 D3 O1 O0
Digital Logic Design 120

Logic Diagram for 4  2 Encoder

Draw the logic diagram of 4  2 Encoder

Learning outcomes:
In this lab we have learned

1. How to design a 4 × 2 encoder using basic gates?

2. The operation of 4 × 2 encoder.
3. How to design a 4 × 2 Priority encoder using basic gates?
4. The operation of 4 × 2 Priority encoder.
Digital Logic Design 121

PRE LAB - EXPERIMENT NO. 1: 4-LINE-TO-2-LINE ENCODER

NOTE
Obtain data sheet of all the IC’s required in the Lab from Lab Staff

SECTION A: 4-LINE-TO-2-LINE ENCODER

Questions
1. Draw the block diagram of 4  2 encoder. Mention all input lines and output linear
clearly.

2. Write the Boolean expression for the

output. I0 =

I1 =

3. Draw the logic diagram of 4  2 Encoder.

Digital Logic Design 122

SECTION B: 4-LINE-TO-2-LINE PRIORITY ENCODER

Questions

1. Draw the block diagram of 4  2 priority encoder. Mention all input lines and output
lines clearly.

2. Develop the Functional Table (Truth Table)

Inputs Outputs Valid bit indicator

D0 D1 D2 D3 O1 O0 V

3. Write the Boolean expression for the

output. I0 =

I1 =

V=

4. Draw the logic diagram of 4  2 Priority Encoder.

5. For what purpose the output V is added for 4  2 Priority Encoder.

Digital Logic Design 123

EXPERIMENT NO. 2: 8-LINE-TO-

3-LINE ENCODER
Objectives
The Objectives of this experiment:

1. To design a 8 × 3 encoder using basic gates

2. To understand the operation of 8 × 3 encoder.

Equipment Required

• Digital Logic Trainer AM-2000

• Wires

Theory

Encoder converts an active input signal into a coded output signal. Encoder has n input lines
only one of them is active. The internal logic of the encoder converts this active input into a
coded binary output with m bits.

An example of the encoder is 8  3 line encoder, it has eight input lines one for each of the
binary digits, three output lines that generate the corresponding binary number. It is
assumed that only one input has a high value of at any given time.

The encoder just defined has the limitation that only one input can be active at any given
time: if two inputs are active simultaneously, the output produces an incorrect combination.

IC 74147 is a Decimal-to-BCD Encoder. It has ten decimal inputs and four BCD outputs. It is a
priority encoder because it gives priority to the highest-order input. If more than one line is
active the line with the highest priority will get encoded.

IC 74148 is an Octal to Binary encoder. It has eight decimal inputs and three binary outputs.
It is a priority encoder because it gives priority to the highest-order input. If more than one
line is active the line with the highest priority will get encoded.
Diagram

8 inputs 8  3 Encoder 3 Outputs

Figure 10-2-1: The Block diagram of 8  3 Encoder

Digital Logic Design 124

Procedure

1. Use the pre- lab for Boolean expression and make the connections.
2. Connect the Digital Connect the Digital Logic Trainer AM-2000 to 220V AC supply.
3. Connect D0, D1, D2, D3, D4, D5, D6, D7 input of Encoder Gate to the Logic Switches
of the trainer using wire.
4. Connect O2, O1, and O0 output of Encoder Gate to the LEDs of trainer using wire.
5. Now change the positions of switches, in order to note down the output of the
Encoder Gate according to the truth table.
6. Proceed in a sequential order to complete the whole Functional Table given below.
7. Note down all outputs carefully.
Observations and Results:
Complete the table given below carefully

Table 10-2-1: Function table for 8  3 Encoder.

Inputs Outputs
D0 D1 D2 D3 D4 D5 D6 D7 O2 O1 O0

Logic Diagram for 8  3 Encoder

Draw the logic diagram of 8  3 Encoder

Digital Logic Design 125

Learning outcomes:
In this lab we have learned

1. How to design an 8 × 3 encoder using basic gates?

2. The operation of 8 × 3 encoder.
3. The operation of IC 74147 Decimal-to-BCD Encoder.
4. The operation of IC 74148 Priority Encoder (Octal to Binary).
Digital Logic Design 126

PRE LAB - EXPERIMENT NO. 2: 8-LINE-TO-3-LINE ENCODER

NOTE
Obtain data sheet of all the IC’s required in the Lab from Lab Staff

SECTION A: 8-LINE-TO-3-LINE ENCODER

Questions

1. Draw the block diagram of 8  3 encoder. Mention all input lines and output lines
clearly.

2. Write the Boolean expression for the

output. O0 =

O1 =

O2 =

3. Draw the logic diagram of 8  3 Encoder.

Digital Logic Design 127

SECTION B: 10-LINE-TO-4-LINE DECIMAL TO BCD ENCODER

Questions

1. Draw Pin Diagram for IC 74147 DECIMAL TO BCD ENCODER

74147 Decimal to BCD Encoder

2. Complete the table given below carefully for IC 74147 Decimal to BCD Encoder

Inputs Outputs
D0 D1 D2 D3 D4 D5 D6 D7 D8 O3 O2 O1 O0

3. Write the Boolean expression for the

output. O1 =

O2 =

O3 =

O4 =
Digital Logic Design 128

SECTION C: 8-LINE-TO-3-LINE OCTAL TO BINARY ENCODER

Questions

1. Draw Pin Diagram for IC 74148 OCTAL TO BINARY ENCODER

74148 Octal to Binary Encoder

2. Complete the table given below carefully for IC 74148 Octal to Binary Encoder

Inputs Outputs
D0 D1 D2 D3 D4 D5 D6 D7 O2 O1 O0
Digital Logic Design 129

Each student is required to perform the lab and submit the following Performa along with the
lab report.
1 = Unsatisfactory 2 = Fair 3= Satisfactory 4 = Very good 5= Excellent
Rating
Questions Remarks
(1 to 5)

1. To what extent did you learn on the material in

the lab?

2. Are you able to apply knowledge gained in the

lab to similar problems?

3. Are you able to analyze and interpret data

recorded in the lab?

4. Are you able to identify, formulate and solve

electrical engineering problems based on the
knowledge acquired in the lab.?

5. Can you design a system, component or process

to fulfill certain specifications based on the
knowledge acquired in the lab?

6. Were you able to function as a group in the lab?

7. Were you able to interpret effectively the

procedures and questions asked in the lab?

8. Comment whether your work in the lab has an

impact on the society.

Additional Comments (if any):

Digital Logic Design 130

Laboratory No: 11
Multiplexers
Digital Logic Design 131

EXPERIMENT NO. 1: 4-LINE-TO-

1-LINE MULTIPLEXER
Objectives
The Objectives of this experiment:

1. To design a 4 × 1 Multiplexer using basic gates

2. To understand the operation of 4 × 1 Multiplexer.
3. To implement the Boolean function using 4 × 1 Multiplexer.

Equipment Required

• Digital Logic Trainer AM-2000

• Wires

Theory
Multiplex means many into one. A multiplexer is a circuit with many inputs but only one
output. By applying control signals, we can steer any input to the output. Figure 11-1-1
illustrates the general idea. The circuit has n input signals, one output signal and m control
signals

Multiplexer is also called data selector because the output bit depends upon the input data
bit selected. Input data bit is selected by the selection lines.

4  1 Multiplexer has four input lines, one output and two selection lines or control lines.
One of the input line is selected (by means of control lines) and transmitted to the output. As
multiplexer has only one output, hence it has only one output function. In other words, it
can implement only one Boolean function.

Diagram

Figure 11-1-1: The Block diagram of 4  1 Multiplexer

Digital Logic Design 132

Logic Diagram

Draw the logic diagram of 4  1 Multiplexer

Procedure

1. Connect the Digital Logic Trainer AM-2000 to 220V AC supply.

2. Use the MULTIPLEXER BLOCK on trainer.
3. Connect all inputs to some switches.
4. Connect the output to a led.
5. Referring to the truth table 11-1-1, carry out different input combination
by means of switches, so to test the device completely.

Observations and Results:

Complete the table given below carefully by examining and carrying out the operations
mentioned in the theory.

Table 11-1-1: Function table for 4  1 Multiplexer.

Select Line Inputs Output
S1 S0 I0 I1 I2 I3 F
0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1

Learning outcomes:
In this lab we have learned

1. How to design a 4 × 1 Multiplexer using basic gates?

2. The operation of 4 × 1 Multiplexer.
3. How to implement the Boolean function using 4 × 1 Multiplexer?
Digital Logic Design 133

PRE LAB - EXPERIMENT NO. 1: 4-LINE-TO-1-LINE MULTIPLEXER

NOTE
Obtain data sheet of all the IC’s required in the Lab from Lab Staff

Questions

1. How many control lines are required for 4  1 Multiplexer? Write the names of
control lines.

2. Draw the block diagram of 4  1 Multiplexer. Mention all inputs, output and selection
lines clearly

.
3. Develop the compressed Functional Table (Truth Table).

4. Write the Boolean expression for the output.

F (S1, S0, I0, I1, I2, I3) =

Digital Logic Design 134

5. Draw the logic diagram of 4  1 Multiplexer.

6. Implement F(x, y, z) = ∑m (1, 3, 4, 5) using a multiplexer.

Digital Logic Design 135

7. Implement the 4  1 Multiplexer using 2 x 1 Multiplexer.

Digital Logic Design 136

EXPERIMENT NO. 2: 8-LINE-TO-

1-LINE MULTIPLEXER
Objectives
The Objectives of this experiment:

1. To understand the operation of IC 74LS153(8 × 1 Multiplexer)

2. To implement the Boolean function using IC 74LS153 (8 × 1 Multiplexer)

Equipment Required

• Digital Logic Trainer AM-2000

• Wires

Theory

Multiplex means many into one. A multiplexer is a circuit with many inputs but only one
output. By applying control signals, we can steer any input to the output. Figure 1 illustrates
the general idea. The circuit has n input signals, one output signal and m control signals.
Multiplexer is also called data selector because the output bit depends upon the input data
bit selected. Input data bit is selected by the selection lines.
8  1 Multiplexer has eight input lines, one output and three selection lines or control lines.
One of the input line is selected (by means of control lines) and transmitted to the output. As
multiplexer has only one output, hence it has only one output function. In other words, it
can implement only one Boolean function.

Diagram

Figure 11-2-1: The Block diagram of 8  1 Multiplexer

Digital Logic Design 137

Logic Diagram

Draw the logic diagram of 8  1 Multiplexer

Pin Diagram:

Figure 11-2-1: 8 * 1 Multiplexer

Procedure

1. Use the pre- lab for pin connections and make the connections.
2. Connect the Digital Logic Trainer AM-2000 to 220V AC supply.
3. Connect the inputs for selecting A and B to the outputs B0 and B1 of the pre-scalar.
4. Connect the Strobe input 1G to the output B2 of the pre-scalar and the strobe input
2G to its negated.
5. Connect the common terminal C of the pre-scalar to ground.
6. Connect the outputs of the two multiplexers to an OR port and consequently, the OR
to a Led.
7. Increment the numerical combination of the pre-scalar and each time check which is
the input selected.
Digital Logic Design 138

Observations and Results:

Complete the table given below carefully by examining and carrying out the operations
mentioned in the theory.

Table 11-2-1: Function table for 8  1 Multiplexer.

Select lines Inputs Output

S1 S1 S0 I0 I1 I2 I3 I4 I5 I6 I7 F
0 0 0
0 0 0
0 0 1
0 0 1
0 1 0
0 1 0
0 1 1
0 1 1
1 0 0
1 0 0
1 0 1
1 0 1
1 1 0
1 1 0
1 1 1
1 1 1

Learning outcomes:
In this lab we have learned

1. The operation of 8 × 1 Multiplexer.

2. How to implement the Boolean function using 8 × 1 Multiplexer?
Digital Logic Design 139

PRE LAB - EXPERIMENT NO. 2: 8-LINE-TO-1-LINE MULTIPLEXER

NOTE
Obtain data sheet of all the IC’s required in the Lab from Lab Staff

Questions

1. How many control lines are required for 8  1 Multiplexer? Write the names of
control lines.

2. Draw the block diagram of 8  1 Multiplexer. Mention all inputs, output and selection
lines clearly.

3. Develop the compressed Functional Table (Truth Table).

4. Write the Boolean expression for the output.

F (Select lines, Input lines) =

Digital Logic Design 140

5. Draw the logic diagram of 8  1 Multiplexer.

6. Implement the 4-input even parity generator 8  1 Multiplexer.

Digital Logic Design 141

7. Implement the 8  1 Multiplexer using 4 x 1 Multiplexer & 2 x 1 Multiplexer

Digital Logic Design 142

Each student is required to perform the lab and submit the following Performa along with the
lab report.
1 = Unsatisfactory 2 = Fair 3= Satisfactory 4 = Very good 5= Excellent
Rating
Questions Remarks
(1 to 5)

1. To what extent did you learn on the material in

the lab?

2. Are you able to apply knowledge gained in the

lab to similar problems?

3. Are you able to analyze and interpret data

recorded in the lab?

4. Are you able to identify, formulate and solve

electrical engineering problems based on the
knowledge acquired in the lab.?

5. Can you design a system, component or process

to fulfill certain specifications based on the
knowledge acquired in the lab?

6. Were you able to function as a group in the lab?

7. Were you able to interpret effectively the

procedures and questions asked in the lab?

8. Comment whether your work in the lab has an

impact on the society.

Additional Comments (if any):

Digital Logic Design 143

Laboratory No: 12
Latches
Digital Logic Design 144

EXPERIMENT NO. 1: RS LATCH

USING NOR GATES
Objective

1. To develop the RS Latch using NOR Gates

2. To study and verify the behavior of RS Latch using NOR Gates.
Equipment

• Digital Logic Trainer AM-2000

• Wires

Theory
So far we’ve just worked with combinational circuits, where applying the same inputs always
produces the same outputs. This corresponds to a mathematical function, where every input has
a single, unique output. In programming terminology, combinational circuits are similar to
“functional programs” that do not contain variables and assignments.

In contrast, the outputs of a sequential circuit depend on not only the inputs, but also the
state, or the current contents of some memory. This makes things more difficult to
understand, since the same inputs can yield different outputs, depending on what’s stored in
memory. The memory contents can also change as the circuit runs. We’ll some need new
techniques for analyzing and designing sequential circuits.

A latch is a type of Bistable logic device or multivibrator. A latch is a temporary storage

device that has two stable states. A latch output can change from one state to the other by
applying appropriate inputs. A latch normally has two inputs, the binary input combinations
at the latch input allows the latch to change its state. A latch has two outputs Q and its
complement Q. The latch is said to be in logic high state when Q=1 and Q=0 and it is in the
logic low state when Q=0 and Q=1. When the latch is set to a certain state it retains its state
unless the inputs are changed to set the latch to a new state. Thus a latch is a memory
element which is able to retain the information stored in it.
Digital Logic Design 145

Diagram

Figure 12-1-1: (a) Logic diagram of SR latch using NOR gates.

(b) Function table (c) Graphic symbols

Procedure
1. Connect the Digital Logic Trainer AM-2000 to 220V AC supply
2. Use two NOR blocks available on the trainer.
3. Connect R input of NOR Gate to the Logic Switch 1 of the trainer using wire.
4. Connect S input of NOR to the Logic Switch 2 of the trainer using wire.
5. Follow the above circuit in Figure 12-1-1.
6. Connect Q and Q* output of the two NOR Gates to the LEDs of trainer using wire.
7. Note down the initial state of the Normal Output Q. Q =
8. Now change the inputs S and R according to the truth table and fill it up.
Observations and Results:
Table 12-1-1: Characteristic table of RS latch

Inputs Outputs
Q Q’ S R Q+ Q+’
Digital Logic Design 146

Learning outcomes:
In this lab we have learned

1. How to develop the RS Latch using NOR Gates?

2. How to verify the behavior of RS Latch using NOR Gates?

PRE LAB - EXPERIMENT NO. 1: RS LATCH USING NOR GATES

NOTE
Obtain data sheet of all the IC’s required in the Lab from Lab Staff

Questions

1. Draw the graphic symbol of RS latch. Mention all inputs and output clearly,

2. Draw the logic diagram of RS latch neither using NOR gates. Mention all inputs and
output clearly.

3. Write the behavior of RS latch using NOR gates in your words.

4. Develop the function table in compressed form

Inputs Outputs
R S Q+ Q+’
0 0
0 1
1 0
1 1
Digital Logic Design 147

5. When the circuit will behave normally.

6. When the circuit will not behave normally.

7. What will be output if all the inputs are at logic-0?

8. What will be output if all the inputs are at logic-1?

9. State the condition when next state will be equal to present state.

R= and S= will reset the latch.

10. To set the latch R = and S=

.
11. If both S and R at the same logic levels, then what will happen?

12. Draw the state diagram for RS latch.

Digital Logic Design 148

EXPERIMENT NO. 2: SR LATCH

WITH CONTROL INPUT USING
NAND GATES
Objective

1. To develop the SR Latch with control input using NAND Gates

2. To study and verify the behavior of SR Latch with control input using NAND Gates.
Equipment

• Digital Logic Trainer AM-2000

• Wires

Theory

A latch is a type of Bistable logic device or multivibrator. A latch is a temporary storage

device that has two stable states. A latch output can change from one state to the other by
applying appropriate inputs. A latch normally has two inputs, the binary input combinations
at the latch input allows the latch to change its state. A latch has two outputs Q and its
complement Q. The latch is said to be in logic high state when Q=1 and Q=0 and it is in the
logic low state when Q=0 and Q=1. When the latch is set to a certain state it retains its state
unless the inputs are changed to set the latch to a new state. Thus a latch is a memory
element which is able to retain the information stored in it.
Diagram

Figure 12-2-1: (a) Logic Diagram of SR latch with control input using NAND gates.
(b) Function table (c) Graphic symbols
Digital Logic Design 149

Procedure

1. Connect the Digital Logic Trainer AM-2000 to 220V AC supply

2. Use four NAND blocks available on the trainer.
3. Connect R input of NAND Gate to the Logic Switch 1 of the trainer using wire.
4. Connect S input of NAND to the Logic Switch 2 of the trainer using wire.
5. Follow the above circuit in Figure 12-2-1.
6. Connect Q and Q* output of the two NAND Gats to the LEDs of trainer using wire.
7. Note down the initial state of the Normal Output Q. Q =
8. Now change the inputs S and R according to the truth table and fill it up.

Observations and Results:

Table 12-2-1: Characteristic table of SR latch with control input using NAND gates.

Inputs Outputs
Q C S R Q+ Q+’

Learning outcomes:
In this lab we have learned

1. How to develop the SR Latch with control input using NAND Gates?
2. How to verify the behavior of SR Latch with control input using NAND Gates?
Digital Logic Design 150

PRE LAB - EXPERIMENT NO. 2: SR LATCH WITH CONTROL INPUT

USING NAND GATES

NOTE
Obtain data sheet of all the IC’s required in the Lab from Lab Staff

Questions

1. Draw the graphic symbol of SR latch with control input using NAND gates.
Mention all inputs and output clearly.

2. Draw the logic diagram of SR latch with control input using NAND gates. Mention
all inputs and output clearly.

3. Write the behavior of SR latch with control input using NAND gates in your words.

4. Develop the function table in compressed form

C S R Q+ Q+’
0 0
0 1
1 0
1 1
Digital Logic Design 151

5. Write the characteristics equation of SR latch.

6. When the circuit will behave normally.

7. When the circuit will not behave normally.

8. What will be output if all the inputs are at logic-0?

9. What will be output if all the inputs are at logic-1?

10. State the condition when next state will be equal to present state.
Digital Logic Design 152

EXPERIMENT NO. 3: D LATCH

WUTH CONTROL INPUT USING
NAND GATES
Objectives

1. To develop the D Latch with control input using NAND Gates

2. To study the behavior of D Latch with control input using NAND Gates

Equipment

• Digital Logic Trainer AM-2000

• Wires

Theory

A latch is a type of Bistable logic device or multivibrator. A latch is a temporary storage

device that has two stable states. A latch output can change from one state to the other by
applying appropriate inputs. A latch normally has two inputs, the binary input combinations
at the latch input allows the latch to change its state. A latch has two outputs Q and its
complement Q. The latch is said to be in logic high state when Q=1 and Q=0 and it is in the
logic low state when Q=0 and Q=1. When the latch is set to a certain state it retains its state
unless the inputs are changed to set the latch to a new state. Thus a latch is a memory
element which is able to retain the information stored in it.
D latch is based on an S’R’ latch. The additional gates generate the S’ and R’ signals, based
on inputs D (“data”) and C (“control”).
– When C = 0, S’ and R’ are both 1, so the state Q does not change.
– When C = 1, the latch output Q will equal the input D.
No more messing with one input for set and another input for reset!
Diagram

Figure 12-3-1: (a) Logic Diagram of D Latch with control input using NAND gates.
(b) Function table (c) Graphic symbols
Digital Logic Design 153

Procedure

1. Connect the Digital Logic Trainer AM-2000 to 220V AC supply

2. Use four one inverter and NAND blocks available on the trainer.
3. Connect D input of NAND Gate to the Logic Switch 1 of the trainer using wire.
4. Follow the above circuit in Figure 12-3-1.
5. Connect Q and Q* output of the two NAND Gates to the LEDs of trainer using
wire.
6. Note down the initial state of the Normal Output Q. Q =
7. Now change the inputs S and R according to the truth table and fill it up.

Observations and Results:

Table 12-3-1: Function table of D latch with control input

C D Q+ Q+’

Learning outcomes:
In this lab we have learned

1. To develop the D Latch with control input using NAND Gates

2. The behavior of D Latch with control input using NAND Gates

PRE LAB - EXPERIMENT NO. 3: D LATCH WITH CONTROL INPUT

USING NAND GATES

NOTE
Obtain data sheet of all the IC’s required in the Lab from Lab Staff
Questions

1. Draw the graphic symbol of D latch with control input using NAND gates. Mention
all inputs and output clearly.
Digital Logic Design 154

2. Draw the logic diagram of D latch with control input using NAND gates. Mention
all inputs and output clearly.

3. Write the behavior of D latch with control input using NAND gates in your words.

4. Develop the function table in compressed form

Inputs Outputs
C D Q+ Q+’

5. Is there any case when the circuit will not behave normally?

6. What will be output if all the inputs are at logic-0?

7. What will be output if all the inputs are at logic-1?

Digital Logic Design 155

8. State the condition when next state will be equal to present state.

9. In case of D Latch the next state follow the input D. justify it.
Digital Logic Design 156

Each student is required to perform the lab and submit the following Performa along with the
lab report.
1 = Unsatisfactory 2 = Fair 3= Satisfactory 4 = Very good 5= Excellent
Rating
Questions Remarks
(1 to 5)

1. To what extent did you learn on the material in

the lab?

2. Are you able to apply knowledge gained in the

lab to similar problems?

3. Are you able to analyze and interpret data

recorded in the lab?

4. Are you able to identify, formulate and solve

electrical engineering problems based on the
knowledge acquired in the lab.?

5. Can you design a system, component or process

to fulfill certain specifications based on the
knowledge acquired in the lab?

6. Were you able to function as a group in the lab?

7. Were you able to interpret effectively the

procedures and questions asked in the lab?

8. Comment whether your work in the lab has an

impact on the society.

Additional Comments (if any):

Digital Logic Design 157

Laboratory No: 13
Flip- Flops
Digital Logic Design 158

EXPERIMENT NO. 1: JK FLIP

FLOP WITH CONTROL INPUT
USING NOR GATES
Objectives

1. To develop the JK flip flop.

2. To study the behavior of JK flip flop.

Equipment

• Digital Logic Trainer AM-2000

• Wires

Theory

Flip-Flops are synchronous bi-stable devices, known as bi-stable multivibrator. Flip-flops

have a clock input instead of a simple enable input as discussed earlier. In Synchronous
systems (i.e. flip-flops), the output of all the digital circuits changes when a clock
signal is applied instead of the enable signal. The change in the state of the
digital circuit occurs either at the low-to-high or high-to-low transition of the clock signal.
Since the transition of the clock signal is for a very short a precise time interval thus all digital
parts of a Digital system change their states simultaneously.
The low to high or high to low transition of the clock is considered to be an
edge. Four different types of edge-triggered flip-flops are generally used in digital logic
circuits.
– S-R edge-triggered flip-flop
– D edge-triggered flip-flop
– J-K edge-triggered flip-flop
– T edge-triggered flip-flop

Diagram

(a) Logic Diagram of JK flip flop.

Digital Logic Design 159

(b) Characteristics Table (c) Graphic Symbol

Figure 13-1-1: (a) Logic diagram of JK flip flop. (b) Characteristics table. (c) Graphic symbol

Procedure

1.Connect the Digital Logic Trainer AM-2000 to 220V AC supply.

2.Follow the Logic Diagram of JK flip flop shown above.
3.Use two AND & two NOR blocks available on the trainer.
4.Connect the inputs of J, K and CK to the switches 1, 2 and 3 respectively available on
the trainer.
5. Analyze the behavior of the Led and explain the behavior of J-K flip-flop.
Observations and Results:
Table 13-1-1: Characteristic Table

Inputs Outputs
C J K Q+ Q+’
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1

Learning outcomes:
In this lab we have learned

1. To develop the JK flip flop.

2. The behavior of JK flip flop
Digital Logic Design 160

PRE LAB - EXPERIMENT NO. 1: JK FLIP FLOP

NOTE
Obtain data sheet of all the IC’s required in the Lab from Lab Staff

Questions

1. Draw the graphic symbol of JK flip flop. Mention all inputs and output clearly.

2. Draw the logic diagram of JK flip flop. Mention all inputs and output clearly.

3. Write the behavior of JK flip flop in your words.

4. Develop the function table.

Inputs Outputs
Q Q’ J K Q+ Q+’
Digital Logic Design 161

5. Write the characteristics equation of JK flip flop

6. Draw the state diagram for JK flip flop.

7. When the circuit will behave normally

.
8. What will be output if all the inputs are at logic-0?

9. What will be output if all the inputs are at logic-1?

10. State the condition when next state will be equal to present state.

11. What will be the values of C, J and K if we want to reset the circuit?

12. What will be the values of C, J and K if we want to set the circuit?

13. To keep the current state as next state the value of C = , J = and K =

14. Draw the timing wave diagram of the JK flip flop.

Digital Logic Design 162

EXPERIMENT NO. 2: T Flip Flop

Objectives

1. To develop the T Flip Flop.

2. To study the behavior of T Flip Flop.

Equipment

• Digital Logic Trainer AM-2000

• Wires

Theory

With a slight modification of a J-K flip-flop, we can construct a new flip-flop called a T
(toggle) flip-flop. If the two inputs J and K of a J-K flip-flop are tied together it is referred to
as a T flip-flop. Hence, a T flip-flop has only one input T and two outputs Q and Q'. The name
T flip-flop actually indicates the fact that the flip-flop has the ability to toggle. It has actually
only two states—toggle state and memory state (i.e. can only maintain or complement its
current state).

Diagram

(a) Logic Diagram of T flip flop.

(b) Characteristics table (c) Graphic symbol

Figure 13-2-1: (a) Logic Diagram of T flip flop. (b) Characteristics table. (c) Graphic symbol
Digital Logic Design 163

Procedure

1. Connect the Digital Logic Trainer AM-2000 to 220V AC supply

2. Develop the circuit according to the Figure 13-2-1.
3. Connect inputs C and T to the logic switch 1 and logic switch 2 respectively.
4. Connect the final output Q (Normal Output) of the figure 1 to the LED 1.
5. Now change the inputs C and T according to the truth table and fill it up.

Observations and Results:

Table 13-2-1: Characteristic Table

Inputs Outputs
C T Q+ Q+’

Learning outcomes:
In this lab we have learned

1. How to develop the T Flip Flop?

2. The behavior of T Flip Flop.
Digital Logic Design 164

PRE LAB - EXPERIMENT NO. 2: T FLIP FLOP

NOTE
Obtain data sheet of all the IC’s required in the Lab from Lab Staff

Questions

1. Draw the graphic symbol of T flip flop. Mention all inputs and output clearly.

2. Draw the logic diagram of T flip flop. Mention all inputs and output clearly.

3. Write the behavior of T flip flop in your own words.

4. Develop the function table for T flip flop.

Inputs Outputs
Q C T Q+ Q+’
Digital Logic Design 165

5. What will be output if all the inputs are at logic-0?

6. What will be output if all the inputs are at logic-1?

7. State the condition when next state will be equal to present state.

8. What will be the values of C and T if we want to reset the circuit? Assuming previous
state is set.

9. What will be the values of C and T if we want to set the circuit? Assume any suitable
previous state.

10. Draw the timing wave diagram of T flip flop.

Digital Logic Design 166

Each student is required to perform the lab and submit the following Performa along with the
lab report.
1 = Unsatisfactory 2 = Fair 3= Satisfactory 4 = Very good 5= Excellent
Rating
Questions Remarks
(1 to 5)

1. To what extent did you learn on the material in

the lab?

2. Are you able to apply knowledge gained in the

lab to similar problems?

3. Are you able to analyze and interpret data

recorded in the lab?

4. Are you able to identify, formulate and solve

electrical engineering problems based on the
knowledge acquired in the lab.?

5. Can you design a system, component or process

to fulfill certain specifications based on the
knowledge acquired in the lab?

6. Were you able to function as a group in the lab?

7. Were you able to interpret effectively the

procedures and questions asked in the lab?

8. Comment whether your work in the lab has an

impact on the society.

Additional Comments (if any):

Digital Logic Design 167

Laboratory No: 14
Counter
Digital Logic Design 168

EXPERIMENT NO. 1: THREE BIT

ASYNCHRNOUS COUNTER
Objectives
1. To develop 3-bit asynchronous counter using 74LS76 JK flip flop.

Equipment Required

• Digital Logic Trainer AM-2000

• Wires

Theory

Flip flops can be used to form the basis for counters and registers. The counters are of two
main types. Synchronous and asynchronous. Here in this lab we will see how these flip flop
and logic gates can be combined to produce different types of asynchronous counters.
Consider the figure1 having three JK flip flops. A flip flop is the left most flip flop, B flip flop is
the middle one and C is the right most flip flop. All the inputs JK of all flip flops are
connected to logic-1 level. Assuming flip flops are negatively edge triggered
The clock pulse is applied only to CLK input of A flip flop. Thus flip flop A will toggle each time
the clock pulse makes a negative transition. The normal output of flip flop A acts as a CLK
input for the flip flop B.
So B flip flop will toggle each time the A output goes from 1 to 0. Similarly, the flip flop C will
toggle when B goes from 1 to 0. Flip flops outputs Q0, Q1 and Q2 represents the three-bit
binary number with Q0 as least significant bit and Q2 as most significant bit.
If All flip flops are reset (Q0 = 0, Q1 = 0 and Q2 = 0) then CLK is applied to the A flip flop A.
then after seven clock pulses the outputs will be Q0 = 1, Q1 = 1 and Q2 = 1. It means the
counter has gone through one complete cycle and has recycled back to the initial state.

Diagram for 3-bit asynchronous counter

Figure 14-1-1: Three-bit asynchronous counter using JK flip flops

Digital Logic Design 169

Figure 14-1-2: IC 74LS76 Dual JK master slave flip flop

Table 14-1-1: Function table for IC 74LS76 Dual JK master slave flip flop

Procedure For 3-bit Asynchronous Counter

1. Construct the circuit as shown in figure 1.

2. Connect the Digital Logic Trainer AM-2000 to 220V AC supply.
3. Connect all inputs J and K to +5Vdc.
4. Connect the terminal “P1” of the first push-button to the input CK of the first flip-flop.
5. Connect the output Q of the first flip flop to the input CK of the second and the
output of the second to CK of the third.
6. Connect the outputs of the three flip-flops to three LEDs so to display the state.
7. Connect the inputs “P” and “R” of the flip-flops J-K to +5Vdc.
8. Now activate the push-button “P1” and observe what happens to the counter.
9. Now observe the operation of the asynchronous counter.
10. Observe all outputs carefully and fill the table.
Digital Logic Design 170

Observations and Results:

Write the count sequence displayed by the circuit

Table 14-1-2: Count Sequence of 3-bit asynchronous counter

Q2 Q1 Q0

Learning outcomes:
In this lab we have learned

1. To develop 3-bit asynchronous counter using 74LS76 JK flip flop.

Digital Logic Design 171

PRE LAB - EXPERIMENT NO. 1: THREE BIT ASYNCHRNOUS COUNTER

NOTE
Obtain data sheet of all the IC’s required in the Lab from Lab Staff

Questions

1. How many flip flops are required?

2. Write the name of flip flop to be used.

3. Draw the block diagram of a three-bit asynchronous counter using JK flip flop.
Mention all input lines and output lines clearly. The figure must show asynchronous
set or reset inputs.

4. Develop the function table for the IC here. Use data sheet for this.

Inputs Outputs
Preset Clear Clock J K Q Q’
Digital Logic Design 172

5. Draw the timing wave diagram of the 3-bit asynchronous counter.

Digital Logic Design 173

EXPERIMENT NO. 2: FOUR BIT

ASYNCHRNOUS COUNTER
Objectives

1. To Use the IC 74LS93 Ripple counter.

Equipment Required

• Digital Logic Trainer AM-2000

• Wires

Theory

Flip flops can be used to form the basis for counters and registers. The counters are of two
main types. Synchronous and asynchronous. Here in this lab we will see how these flip flop
and logic gates can be combined to produce different types of asynchronous counters.
Information about the IC 7493 found in the data book is shown in the figure 14-2-1.

Figure 14-2-1. (a) Shows a diagram of the internal logic circuit and its connections to its
external pins. All inputs and outputs are given symbolic letters and assigned to pin numbers.
Figure 14-2-1. (b) Shows the physical layout the IC.
Figure 14-2-1. (c) Shows the schematic of the IC.

The 7493 IC can operate as a three-bit counter using input B and flip flops QB, QC, AND QD.
It can operate as 4-bit counter using input A if output QA is connected to the input B.
therefore to operate the counter as a four bit counter it is therefore required to have a
external connection between pin 12 and pin 1. The reset inputs, R1, and R2, at pin 2 and 3
respectively must be grounded.
Digital Logic Design 174

Diagram for IC 7493 4-bit asynchronous counter

Figure 14-2-1: (a) internal circuit diagram. (b) Physical layout. (c) Schematic diagram

Procedure For 4-bit Asynchronous Counter using IC 7493

1. Consider the Figure 14-2-1. (b)

2. Connect the Digital Logic Trainer AM-2000 to 220V AC supply
3. Connect the pin 12 with pin1.
4. Ground the pin 2 and pin3 respectively.
5. Connect pin 5 to 5V supply.
6. Pin 10 must be connected to ground.
7. Now select four LEDs and mark them as MSB to LSB. Pin no. 12 should be connected
to LSB. Pin no. 9 will be connected to the higher order bit. Pin no. 8 to the third
order bit and MSB to the pin no. 11.
8. QD, QC, QB, QA is the order of the bits. Where QA is the least significant bit and QD is
the MSB.
9. Now apply a suitable signal at pin number 14.
10. Observe all outputs carefully and fill the table given below
Digital Logic Design 175

Observations and Results:

Write here count sequence displayed by counter

QD QC QB QA

Learning outcomes:
In this lab we have learned

1. How to Use the 4-bit Asynchronous Counter?

Digital Logic Design 176

PRE LAB - EXPERIMENT NO. 2: FOUR BIT ASYNCHRNOUS COUNTER

NOTE
Obtain data sheet of all the IC’s required in the Lab from Lab Staff

Questions
1. How many flip flops are required?

2. Draw the block diagram of a four-bit asynchronous counter using JK flip flop.
Mention all input lines and output lines clearly. The figure must show asynchronous
set or reset inputs.

3. Draw the timing wave diagram of the counter.

4. Draw the figure for 4-bit asynchronous down counter

Digital Logic Design 177

5. Develop a 3-bit asynchronous up down counter that counts in a straight binary

sequence
Digital Logic Design 178

Each student is required to perform the lab and submit the following Performa along with the
lab report.
1 = Unsatisfactory 2 = Fair 3= Satisfactory 4 = Very good 5= Excellent
Rating
Questions Remarks
(1 to 5)

1. To what extent did you learn on the material in

the lab?

2. Are you able to apply knowledge gained in the

lab to similar problems?

3. Are you able to analyze and interpret data

recorded in the lab?

4. Are you able to identify, formulate and solve

electrical engineering problems based on the
knowledge acquired in the lab.?

5. Can you design a system, component or process

to fulfill certain specifications based on the
knowledge acquired in the lab?

6. Were you able to function as a group in the lab?

7. Were you able to interpret effectively the

procedures and questions asked in the lab?

8. Comment whether your work in the lab has an

impact on the society.

Additional Comments (if any):

Digital Logic Design 179

Laboratory No: 15
Registers
Digital Logic Design 180

EXPERIMENT NO. 1: 4-BIT

SERIAL-IN-SERIAL-OUT
REGISTER
Objectives

1. To develop 4-bit serial –in-serial-out register using 74LS74 D flip flop.

2. To verify the operation of the 4-bit serial-in-serial-out register.

Equipment Required

• Digital Logic Trainer AM-2000

• Wires

Theory

A flip flop is the basic memory unit. It is a 1-bit memory element. A register is a set of flip
flops to store a binary word. To store n-bit binary word a set of n flip flops is used. For
instance, a register used to store an 8-bit binary number must have eight flip flops. Naturally
the flip flop must be connected such that the binary number can be entered (shifted) into
the register and possibly shifted out. A group of flip flops connected to provide either or
both of these functions is called shift registers.
The bits in the binary number can be moved from one place to another in either of two
ways. The first method involves shifting the data 1 bit at a time in a serial fashion, beginning
with either the MSB or with LSB. This technique is referred to as serial shifting. The second
method involves shifting all the data bits simultaneously and is referred to as parallel
shifting. There are two ways to shift data into a register (serial or parallel) and similarly there
are two ways to shift the data out of the register. This leads to the construction of four basic
types of registers.
Serial – in - serial-out register
Serial – in-parallel-out register
Parallel-in-serial-out register
Parallel-in-parallel-out register
In this lab we will develop a 4-bit serial-in-serial-out registers using D flip flops (using the IC
7474). There will be four flip flops used. The output of first flip flop will be fed into the input
of the next coming flip flop.
Digital Logic Design 181

Draw the logic diagram for 4-bit serial – in-serial-out register

Label inputs and outputs clearly (D flip flops will be used).

Pin diagram of IC 7474

Function table of IC 7474

Digital Logic Design 182

Procedure For 4-bit serial -in-serial-out register

1. Construct the circuit using diagram by yourself.

2. Connect the Digital Logic Trainer AM-2000 to 220V AC supply.
3. Apply the clock input to all flip flops.
4. Select one logic switch as serial in input and mark it.
5. Select four LEDs and mark them Q0, Q1, Q2 and Q3. Q3 will act as serial out output.
6. Now connect normal output Q0 to D1, Q1 to D2, and Q2 to D3. Q3 is serial-out output.
7. Now turn on the power.
8. Now observe the operation of the synchronous counter.
9. Observe all outputs carefully and fill the table.

Observations and Results:

Fill up the table as the pulses arrives and the data moves out of the register. Then 0 is
applied to serial input
Q0 Q1 Q2 Q3
1 1 1 1

Fill up the table as the pulses arrives and the data moves out of the register. Then 1 is
applied to serial input

Q0 Q1 Q2 Q3
1 0 0 1

Fill up the table as the pulses arrives and the data moves out of the register. Then 0011 is
applied to serial input

Q0 Q1 Q2 Q3
0 1 0 1
Digital Logic Design 183

Learning outcomes:
In this lab we have learned

1. To develop 4-bit serial –in-serial-out register using 74LS74 D flip flop.

2. How to verify the operation of the 4-bit serial-in-serial-out register?

PRE LAB - EXPERIMENT NO. 1: 4-BIT SERIAL-IN-SERIAL-OUT

REGISTER

NOTE
Obtain data sheet of all the IC’s required in the Lab from Lab Staff

Questions

1. How many flip flops are required?

2. Write the name of flip flop to be used.

3. Explain the operation of 4-bit serial-in-serial-out register in your words.

4. Draw the logic diagram of the serial-in-serial-out register.

Digital Logic Design 184

Each student is required to perform the lab and submit the following Performa along with the
lab report.
1 = Unsatisfactory 2 = Fair 3= Satisfactory 4 = Very good 5= Excellent
Rating
Questions Remarks
(1 to 5)

1. To what extent did you learn on the material in

the lab?

2. Are you able to apply knowledge gained in the

lab to similar problems?

3. Are you able to analyze and interpret data

recorded in the lab?

4. Are you able to identify, formulate and solve

electrical engineering problems based on the
knowledge acquired in the lab.?

5. Can you design a system, component or process

to fulfill certain specifications based on the
knowledge acquired in the lab?

6. Were you able to function as a group in the lab?

7. Were you able to interpret effectively the

procedures and questions asked in the lab?

8. Comment whether your work in the lab has an

impact on the society.

Additional Comments (if any):

Digital Logic Design 185

Laboratory No: 16
Project
Digital Logic Design 186

Objectives

1. To develop a project assign to You by instructor.

List of some useful Projects

Digital Stopwatch Circuit
Digital Clock Circuit
• FM Remote Encoder/Decoder Circuit
• Battery Level Indicator
Water Level Alarm Using 555 Timer
Unbiased Digital Dice with LEDs
Super Sensitive Intruder Alarm
Simple LED Blinking Lights Circuit
• Lamp Handball
Mobile Jammer Circuit
LED Running Lights Circuit:
• LED Christmas Lights Circuit
Boolean Algebra Calculator
LC Meter using 555 Timer
555 Timer IC Testing Circuit
Frequency Counter Circuit
Automatic Street Light Controller Circuit
Fastest Finger First Indicator Project
• Traffic Signal
Dummy Alarm Circuit
Ding Dong Sound Generator Circuit
Fire alarm circuit using IC 555
• Vending Machine

Useful Websites

• http://www.electronicshub.org/electronics-mini-projects-ideas/

• http://www.myclassbook.org/electronics-mini-project-ideas/

• https://www.elprocus.com/project-ideas-for-final-year-ece-students/

• http://www.realworldengineering.org/library_search.html
Digital Logic Design 187

How to submit lab Project Report?

The report begins with a cover page. It should include the title of the lab Project,
your Group I.D., Group Members. Subject & Section, and the date the lab was
submitted.
The main body of your report should include:
Objectives
Briefly describe the objectives of the Experiment/project:
The circuit to be designed, implemented, and tested, and its intended use.
Specifications
Describe the technical and performance specifications that must be met by the circuit or
system that is to be designed.
Design methodology
Describe the procedures you followed in the design. Explain design decisions and write
down all equations used and calculations made. Sketch rough schematics of the design
details, with nodes labeled for later analysis. It is perfectly acceptable to paste or tape into
your notebook copies of printouts, photographs, plots and other items.
Implementation
Draw detailed schematics of your built design. These should be very complete, using
functional schematics of integrated circuits instead of the pin-out schematics given in the
data books. Label each terminal with its function where appropriate and give the pin
number to help with troubleshooting. Measure the values of any parameter when they are
critical to performance.
Troubleshooting
Describe the procedures followed in troubleshooting your design. Don't simply write "we
tried it and it worked," but instead describe the test configuration, test data applied, and
measurement of output. Discuss how you concluded that it was working correctly. If it did
not work properly, explain the problem and how you solved it. Discuss any redesign that
was required. Keep a list of the equipment used. Since this list will not change often, list
your equipment in the front of your notebook, and then list any changes as they occur.
Test and evaluation.
Explain the test set-ups and the measurements taken. Provide clear, organized graphs,
performance tables and observations. Graphs should be drawn as the measurements are
taken. In this way, you can visually detect anomalous values and quickly check these
measurements to verify their accuracy. Explain what the data means by explaining how it
agrees with the corresponding mathematical model. Your report should be more than just a
collection of tables, graphs, and equations. Your interpretations and explanations of this
material is the most important part of the report. If you realize that your data is not in
agreement with theory, then explain why you think it is in error and what data you
expected to record.
Conclusion
Summarize the work accomplished. Discuss any critical design factors. Compare the
actual performance with the theoretical performance. Discuss alternative
approaches.
References
Digital Logic Design 188

Each student is required to perform the lab and submit the following Performa along with the
lab report.
1 = Unsatisfactory 2 = Fair 3= Satisfactory 4 = Very good 5= Excellent
Rating
Questions Remarks
(1 to 5)

1. To what extent did you learn on the material in

the lab?

2. Are you able to apply knowledge gained in the

lab to similar problems?

3. Are you able to analyze and interpret data

recorded in the lab?

4. Are you able to identify, formulate and solve

electrical engineering problems based on the
knowledge acquired in the lab.?

5. Can you design a system, component or process

to fulfill certain specifications based on the
knowledge acquired in the lab?

6. Were you able to function as a group in the lab?

7. Were you able to interpret effectively the

procedures and questions asked in the lab?

8. Comment whether your work in the lab has an

impact on the society.

Additional Comments (if any):

Digital Logic Design 189