BEL - Theory - Lab - Detailed Syllabus - 2024 Batch
BEL - Theory - Lab - Detailed Syllabus - 2024 Batch
Degree B. Tech.
Level Undergraduate
Semester 1st
Credit Point 3
Lecture 36 Hours
Time
Commitment Tutorial Nil
Practice Nil
Total 36 Hours
Objectives:
Objectives
The course should enable the students to:
and
1. Develop an understanding of the characteristics, operation and applications of
Outcomes pn-junction diode.
2. Comprehend the constructions, operations and characteristics of BJTs.
3. Understand the basics of operational amplifier and its configurations.
4. Acquire the knowledge of basic logic gates and its functional implementation.
Outcomes:
Upon completion of this course, the student will be able to:
Quiz-Test-2 2.5 %
Surprise Test 5%
Assignment-1 2.5 %
Assignment-2 2.5 %
Attendance 5%
End-Term Examination 50 %
Prescribed Text 1. Robert L. Boylestad, and Louis Nashelsky, Electronic Devices and Circuit
Book(s)
Theory, 11th Edition, Pearson Publication, 2014, New Delhi. (Modules 1, 2, 3
and 4)
2. D Chattopadhyay, P C Rakshit, Electronics Fundamentals and Applications,
New Age International Publications.
3. M. Morris Mano, and Michael D. Ciletti, Digital Design, 5th Edition, Pearson
Publication, 2016, New Delhi. (Module 5)
Reference 1. Adel S. Sedra, and Kenneth C. Smith, Microelectronic circuits, 7th Edition,
Book(s) Oxford University Press, 2006, New Delhi.
2. David A. Bell, Electronic Devices and Circuits, 5th Edition, Oxford University
Press, 2010, New Delhi.
3. Thomas L. Floyd, Digital Fundamentals, 11th Edition, Pearson Publication, 2015,
New Delhi.
4. R. P. Jain, Modern Digital Electronics, 4th Edition, McGraw-Hill Education
(India) Pvt Limited, 2012, New Delhi.
Course Name Basic Electronics Engineering
DETAILED SYLLABUS:
Basic Principle of Operation, Modes of Operation and Configurations, Common Emitter Characteristics,
Requirement of Biasing, DC Biasing (Simple biasing circuits), Load line Analysis, Basic characteristics
of a voltage amplifier.
The Ideal OP-AMP, Voltage transfer characteristic, Virtual short circuit and Virtual ground concept,
Inverting and Non-Inverting configurations as amplifiers, Common Mode Rejection Ratio (CMRR).
Binary digits, Logic levels, Basic Logic Operations, Laws and Rules of Boolean algebra, Logic Gates -
AND, OR, NOT, NAND, NOR, XOR and XNOR gate, De Morgan’s theorem, Minterms and Maxterms,
Standard forms of Boolean expressions, Universal properties of NAND and NOR gates, Functional
implementation using Logic Gates.
COURSE DESCRIPTION:
Degree B. Tech.
Level Undergraduate
Semester 1st
Credit Point 1
Lecture + Practice 20 Hours
Recommended
Background
Knowledge/Cou
rse Pre-requisites
Subject
Description
Objectives:
Outcomes 3. Assemble and test different circuits using diode, BJT and op-amps.
• Identify and test basic electronics components using test and measuring
instruments.
Lab Experiments 20 %
Record Writing 10 %
Behavior/ Attitude 5%
Assessment/
Evaluation Quiz 5%
Attendance 5%
Prescribed Text
Book(s)
Digital
Learning
Resources
CO1
Identify and test basic electronics components using
test and measuring instruments.
3 Study of the V-I characteristics of P-N junction diode and calculation of 2 Hours
DC & AC resistance.
4 Construction of half-wave rectifier with & without capacitive Filter and 2 Hours
verify the output waveforms using CRO and calculation of efficiency and
ripple factor.
5 Constructions of full wave rectifier circuits with & without capacitive 2 Hours
Filter and verify the output waveforms using CRO and calculation of
efficiency and ripple factor.
6 Construction of positive and negative clipper circuits and study of their 2 Hours
output waveforms by CRO.
7 Study of both input and output V-I characteristics of a Common Emitter 2 Hours
configuration.
8 Construction of BJT voltage divider bias circuits and determination of Q- 2 Hours
point and βDC.
9 Study of output V-I characteristics of an n-channel JFET and define the 2 Hours
pinch off voltage from it.
10 Design of inverting and non-inverting amplifiers using Op-Amp and 2 Hours
compare the theoretical and practical gain values.
11 Truth table verification of logic gates. 2 Hours