Hardware Engineer's Guide

CMOS SENSORs
By Shimi Cohen
CMOS Sensor

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CMOS Sensor

Table of Content:
Chapter 1: The Eye of Machines ...................................................................................................... 4

Chapter 2: Architecture ................................................................................................................ 5

Chapter 3: Shutter ....................................................................................................................... 7

Chapter 4: Pixel ........................................................................................................................... 9

Chapter 5: Illumination ............................................................................................................... 11

Chapter 6: Interface & Protocol ..................................................................................................... 12

Chapter 7: Power & Timing ........................................................................................................... 14

Chapter 8: Integration ................................................................................................................. 16

Chapter 9: ISP Basics ................................................................................................................... 17

Chapter 10: Res/FPS/BW .............................................................................................................. 18

Chapter 11: Lens Basics................................................................................................................ 21

Chapter 12: Depth of Field ........................................................................................................... 23

Chapter 13: Filters & Tuning ........................................................................................................ 25

Chapter 14: Sony iMX477 ............................................................................................................ 28

Appendix A: Sony iMX Family ....................................................................................................... 29

Appendix B: CalCULATION ........................................................................................................... 30

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CMOS Sensor

CHAPTER 1: THE EYE OF MACHINES

Sensor Evolution Timeline
CMOS sensors dominate modern imaging. CCD sensors died commercially around 2015.

KEY MILESTONES:
 1993: First CMOS image sensor (Photo-bit)
 2000: Canon introduces APS-C CMOS in DSLRs
 2012: Sony launches stacked CMOS architecture
 2018: Global shutter CMOS reaches consumer markets
 2024: AI-enabled sensors with onboard processing
CMOS & CCD Comparison

Parameter CMOS CCD

POWER 10-100mW 1-10W
SPEED High (parallel) Limited (serial)
NOISE Higher Lower
COST Low High

Application Domains
CONSUMER ELECTRONICS:
 Smartphones: Multi-camera arrays, computational photography
 Security: 4K surveillance, night vision
 Automotive: ADAS, surround view, driver monitoring
INDUSTRIAL/SCIENTIFIC:
 Machine vision: Quality control, robotics
 Medical: Endoscopy, microscopy
 Aerospace: Earth observation, star tracking
Market Leaders
Sony: 45% market share
Samsung: 28% market share
OmniVision: 15% market share

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CMOS Sensor

CHAPTER 2: ARCHITECTURE
Fundamental Building Blocks
CMOS sensors convert photons to digital data through four stages:
1. Photodiode Array: Silicon photodetectors
2. Analog Front-End: Amplifiers, sample-and-hold
3. Analog-To-Digital: On-chip ADC
4. Digital Processing: Timing, formatting, output

Photodiode Operation
PHOTOELECTRIC EFFECT:
 Photon energy > 1.1eV generates electron-hole pair
 Depletion region separates charges
 Accumulated charge proportional to light intensity
KEY PARAMETERS:
 Quantum Efficiency (QE): 60-90% for visible light
 Responsivity: 0.4-0.6 A/W at 550nm
 Dark Current: <1nA/cm² at room temperature
Pixel-Level Architecture
EACH PIXEL CONTAINS:
 Photodiode (PD)
 Transfer gate (TX)
 Floating diffusion (FD)
 Source follower (SF)
 Row select transistor (RS)
 Reset transistor (RST)

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CMOS Sensor

Readout Architecture
COLUMN-PARALLEL ADC:
 One ADC per column
 High speed, moderate power
 Used in high-end sensors (IMX477, IMX500)
PIPELINE ADC:
 Single ADC, sequential readout
 Lower power, slower speed
 Used in cost-optimized sensors
SUCCESSIVE APPROXIMATION (SAR):
 Medium speed and power
 Common in automotive sensors
Analog Signal Chain
SIGNAL PATH:
1. Photodiode → Transfer Gate
2. Floating Diffusion → Source Follower
3. Column Amplifier → Sample/Hold
4. ADC → Digital Processing

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CMOS Sensor

CHAPTER 3: SHUT TER

Shutter Types
ROLLING SHUTTER:
 Rows exposed sequentially
 Lower power consumption
 Motion artifacts possible
GLOBAL SHUTTER:
 All pixels exposed simultaneously
 Higher power consumption
 No motion artifacts
Rolling Shutter Implementation
TIMING SEQUENCE:
1. Row N reset
2. Row N exposure starts
3. Row N+1 reset (exposure starts)
4. Row N readout
5. Repeat for all rows

𝐹𝑟𝑎𝑚𝑒_𝑇𝑖𝑚𝑒 = (𝑅𝑜𝑤_𝐶𝑜𝑢𝑛𝑡 × 𝑅𝑜𝑤_𝑇𝑖𝑚𝑒) + 𝐵𝑙𝑎𝑛𝑘𝑖𝑛𝑔_𝑇𝑖𝑚𝑒

𝑅𝑜𝑤_𝑇𝑖𝑚𝑒 = 𝑃𝑖𝑥𝑒𝑙_𝐶𝑜𝑢𝑛𝑡 / 𝑃𝑖𝑥𝑒𝑙_𝐶𝑙𝑜𝑐𝑘 + 𝑅𝑜𝑤_𝑂𝑣𝑒𝑟ℎ𝑒𝑎𝑑

Rolling Shutter Artifacts

GEOMETRIC DISTORTION:
 Skew: Vertical lines appear slanted
 Wobble: Vibrating objects appear wavy
 Partial exposure: Fast-moving objects appear cut

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CMOS Sensor

Global Shutter Architecture

STORAGE METHODS:
 In-Pixel Storage: Memory node per pixel
 Column Storage: Shared memory per column
 Frame Storage: External frame buffer
POWER TRADE-OFFS:
 2-5x higher power consumption
 Larger pixel size (25-40% increase)
 Lower fill factor
Shutter Selection Criteria

Application Shutter Type Reason

SMARTPHONES Rolling Power, cost
SECURITY CAMERAS Rolling Cost, OK performance
INDUSTRIAL VISION Global Motion accuracy
AUTOMOTIVE Global Safety-critical motion
HIGH-SPEED IMAGING Global Timing precision

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CMOS Sensor

CHAPTER 4: PIXEL
3-Transistors vs 4-Transistors Method
3T PIXEL (3 TRANSISTORS):
 Reset, Source Follower, Row Select
 Lower noise performance
 Smaller pixel size
 Legacy architecture
4T PIXEL (4 TRANSISTORS):
 Adds Transfer Gate
 Pinned photodiode structure
 Lower noise, higher sensitivity
 Industry standard
Pinned Photodiode Benefits
S TRUCTURE:
 Buried junction photodiode
 Surface pinning layer
 Complete charge transfer
ADVANTAGES:
 Eliminates reset noise
 Reduces dark current
 Improves blue response
 Enables correlated double sampling

3T PIXEL 4T PIXEL

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CMOS Sensor

Advanced Pixel Architectures

DUAL-G AIN PIXELS:
 High/low conversion gain modes
 Extended dynamic range
 Single exposure HDR capability
SHARED PIXEL ARCHITECTURES:
 2×2 or 4×4 pixel sharing
 Reduced transistor count
 Lower power consumption
Correlated Double Sampling (CDS)
PROCESS:
1. Sample reset level (noise + signal)
2. Sample signal level (noise + signal + light)
3. Subtract: Signal = Sample2 - Sample1

BENEFIT S:
 Eliminates reset noise (kTC noise)
 Removes fixed pattern noise
 Improves signal-to-noise ratio by 3-6dB
Pixel Size Trends

Generation Pixel Size Fill Factor Application

EARLY CMOS 5-10μm 30-50% Industrial
STANDARD 2.2-3.0μm 60-75% Consumer
SMALL PIXEL 1.0-1.4μm 70-80% Mobile
ULTRA-SMALL 0.7-0.9μm 75-85% High-res mobile

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CMOS Sensor

CHAPTER 5: ILLUMINATION
FSI vs BSI Architecture
FRONT-SIDE ILLUMINATION (FSI):
 Light enters through metal layers
 Metal wiring blocks light
 Fill factor: 60-70%
BACK-SIDE ILLUMINATION (BSI):
 Light enters from substrate side
 No metal layer obstruction
 Fill factor: 80-90%
BSI Manufacturing Process
KEY STEPS:
1. Standard CMOS wafer fabrication
2. Wafer bonding to carrier
3. Substrate thinning (2-5μm)
4. Anti-reflective coating
5. Color filter and microlens

CHALLENGES:
 Wafer handling complexity
 Substrate uniformity
 Higher manufacturing cost

Stacked CMOS Innovation

ARCHITECTURE:
 Pixel array on top die
 Logic circuits on bottom die
 Through-silicon vias (TSV) connection
SONY IMPLEMENTATION:
 Pioneered in 2012 with IMX135
 Separate optimization for each die
 Higher speed and functionality

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CMOS Sensor

CHAPTER 6: INTERFACE & PROTOCOL

MIPI CSI-2
MIPI Camera Serial Interface 2 is the dominant mobile camera interface.

KEY FEATURES:
 High-speed differential signaling
 Scalable lane configuration (1-4 lanes)
 Low power consumption
 Error detection and correction
CSI-2 Physical Layer
SIGNAL T YPES:
 Clock Lane: Differential clock (DDR)
 Data Lanes: Differential data (DDR)
 Control Signals: I2C/SPI for configuration
ELECTRICAL SPEC:
 Common Mode: 200mV
 Differential Voltage: 200mV minimum
 Data Rate: 80Mbps - 4.5Gbps per lane
 Rise/Fall Time: <100ps
CSI-2 Protocol Layers
LOW LEVEL PROTOCOL (LLP):
 Start/End of Transmission (SoT/EoT)
 High Speed/Low Power modes
 Error correction codes
PACKET PROTOCOL:
 Short Packets: Frame start/end, line start/end
 Long Packets: Image data with header/footer
 Data types: RAW8, RAW10, RAW12, YUV422

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CMOS Sensor

Control Interfaces
I2C INTERFACE:
 Sensor configuration and control
 Standard clock speeds: 100kHz, 400kHz, 1MHz
 7-bit or 10-bit addressing
SPI INTERFACE:
 Alternative to I2C
 Higher speed capability
 Less common in cameras
Timing and Synchronization
CLOCK DOMAINS:
 Input Clock (XCLK): 6-54MHz typical
 Pixel Clock: Derived from XCLK via PLL
 MIPI Clock: Independent of pixel clock
SYNCHRONIZATION SIGNALS:
 VSYNC: Vertical synchronization
 HSYNC: Horizontal synchronization
 GPIO: General purpose I/O for flash, etc.
Interface Selection Guide

Interface Speed Power Complexity Application

MIPI CSI-2 High Low Medium Mobile
LVDS Medium Medium Low Industrial
PARALLEL Low High Low Legacy
USB 3.0 Medium Medium High PC Periph.

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CMOS Sensor

CHAPTER 7: POWER & TIMING

Power Domain Architecture
T YPICAL POWER RAILS:
 DVDD: Digital core (1.2V, 50-200mA)
 AVDD: Analog circuits (2.8V, 100-500mA)
 DOVDD: Digital I/O (1.8V, 20-100mA)
 AFVDD: Analog pixel array (2.8V, 50-200mA)
Power Sequencing Requirements
CORRECT SEQUENCE:
1. DVDD First (Digital core)
2. OVDD Second (I/O circuits)
3. AVDD Last (Analog)

TIMING CONSTRAINT S:
 Rise time: 1-10ms per rail
 Delay between rails: 1-5ms
 Total sequence time: <100ms
Clock Configuration
INPUT CLOCK (XCLK):
 Frequency range: 6-54MHz
 Duty cycle: 45-55%
 Jitter: <100ps RMS
PLL CONFIGURATION:
 Input divider (pre-division): 1-16
 Multiplier: 4-512
 Output divider (post-division): 1-16
 Target frequency: Pixel clock × lanes

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CMOS Sensor

Frame Rate Calculation

FORMULA:
𝐹𝑃𝑆 = 𝑃𝑖𝑥𝑒𝑙_𝐶𝑙𝑜𝑐𝑘 / (𝐻_𝑇𝑜𝑡𝑎𝑙 × 𝑉_𝑇𝑜𝑡𝑎𝑙)

EXAMPLE (IMX477):
 Active: 4056×3040 pixels
 Pixel clock: 840MHz
 H_Total: 4536, V_Total: 3164
 Max FPS: 840M / (4536 × 3164) = 58.5 FPS
Exposure Control Methods
INTEGRATION TIME CONTROL:
 Coarse integration: Line-based increments
 Fine integration: Sub-line precision
 Maximum: Frame time - readout time
G AIN CONTROL:
 Analog gain: 1-16x typical range
 Digital gain: 1-256x in ISP
 ISO calculation: Gain × base sensitivity

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CMOS Sensor

CHAPTER 8: INTEGRATION
Mechanical Considerations
CONNECTOR T YPES:
 FPC (Flexible Printed Circuit): 0.3-0.5mm pitch
 ZIF (Zero Insertion Force): Easy assembly
 Board-to-board: Rigid connections
STANDARD SIZES:
 15-pin: Basic CSI-2 (1-2 lanes)
 22-pin: Standard CSI-2 (4 lanes)
 24-pin: Extended features (IMX477 kit)
Electrical Design Rules
IMPEDANCE CONTROL:
 Differential pairs: 100Ω ± 10%
 Single-ended: 50Ω ± 10%
 Via impedance: Match trace impedance
SIGNAL INTEGRIT Y:
 Length matching: ±0.1mm for differential pairs
 Via minimization: <2 vias per signal
 Ground planes: Continuous under signals
Power Distribution Network
DECOUPLING STRATEGY:
 Bulk capacitors: 10-100μF tantalum
 Ceramic capacitors: 0.1-10μF, multiple values
 Placement: Close to power pins
GROUND PLANNING:
 Separate analog/digital grounds
 Star ground configuration preferred
 Avoid ground loops

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CMOS Sensor

CHAPTER 9: ISP BASICS

Image Signal Processor
ISP converts RAW data to displayable images.

CORE FUNCTIONS:
 Noise reduction
 Color correction
 Exposure
Processing Pipeline
1. White Balance
2. Color Interpolation
3. Color Correction
4. Gamma Correction
5. Color Space Conversion
6. Formatting (YUV)
7. JPEG Compression

Dynamic Range Optimization

TONE MAPPING:
 Linear to gamma conversion
 Highlight compression
 Shadow enhancement
LOCAL TONE MAPPING:
 Adaptive histogram equalization
 Multi-scale processing
Color Accuracy
COLOR CORRECTION MATRIX:
[R'] [a11, a12, a13] [R]
[G'] = [a21, a22, a23] [G]
[B'] [a31, a32, a33] [B]

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CMOS Sensor

CHAPTER 10: RES/FPS/BW

Frame Rate Limitations
READOUT SPEED:
𝑀𝑎𝑥_𝐹𝑃𝑆 = 𝑃𝑖𝑥𝑒𝑙_𝐶𝑙𝑜𝑐𝑘 / (𝐻_𝑇𝑜𝑡𝑎𝑙 × 𝑉_𝑇𝑜𝑡𝑎𝑙)

MIPI BANDWIDTH:
𝐷𝑎𝑡𝑎_𝑅𝑎𝑡𝑒 = 𝑅𝑒𝑠𝑜𝑙𝑢𝑡𝑖𝑜𝑛 × 𝐹𝑃𝑆 × 𝐵𝑖𝑡_𝐷𝑒𝑝𝑡ℎ × 𝐶𝑜𝑙𝑜𝑟_𝐷𝑒𝑝𝑡ℎ

POWER CONSTRAINT S:
 Higher FPS = Higher power
 Thermal throttling limits
 Battery life considerations

Resolution Scaling Trade-offs

PIXEL COUNT VS PERFORMANCE:
 Higher resolution = Lower sensitivity
 Smaller pixels = Higher noise
 More data = Higher bandwidth
BINNING MODES:
 2×2 binning: 4× fewer pixels, 2× sensitivity
 3×3 binning: 9× fewer pixels, 3× sensitivity
 Digital vs analog binning

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CMOS Sensor

MIPI CSI-2 Bandwidth Analysis

LANE CONFIGURATION:
 1 lane: Up to 1.5Gbps
 2 lanes: Up to 3.0Gbps
 4 lanes: Up to 4.5Gbps per lane
EFFICIENCY FACTORS:
 Protocol overhead: ~10%
 Blanking periods: 10-20%
 Error correction: 1-2%
Windowing and ROI
BENEFIT S:
 Higher frame rates
 Reduced bandwidth
 Lower power consumption
IMPLEMENTATION:
 Start/end row configuration
 Start/end column configuration
 Maintains pixel clock
APPLICATIONS:
 Object tracking
 Zoom functionality
 High-speed capture

ROI

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CMOS Sensor

Resolution Mode Examples

IMX477 (12MP SONY):
 Full: 4056×3040 @ 10fps
 Binned: 2028×1520 @ 40fps
 Windowed: 1920×1080 @ 60fps
IMX219 (8MP SONY):
 Full: 3280×2464 @ 15fps
 Binned: 1640×1232 @ 40fps
 Windowed: 1920×1080 @ 30fps

Bandwidth Optimization
COMPRESSION TECHNIQUES:
 MIPI CSI-2 embedded compression
 Lossless RAW compression: 20-30% savings
 Lossy compression: Higher savings, quality loss
FORMAT SELECTION:
 RAW12: Highest quality, highest bandwidth
 RAW10: Good compromise
 YUV422: Lowest bandwidth, processed data

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CMOS Sensor

CHAPTER 11: LENS BASICS

Focal Length
Relationship: Field of View depends on focal length and sensor dimensions.
𝐹𝑂𝑉 = 2 × 𝑎𝑟𝑐𝑡𝑎𝑛(𝑆𝑒𝑛𝑠𝑜𝑟_𝑆𝑖𝑧𝑒 / (2 × 𝐹𝑜𝑐𝑎𝑙_𝐿𝑒𝑛𝑔𝑡ℎ))

COMMON SENSOR SIZES:

 1/2.3": 6.17×4.55mm
 1/1.7": 7.6×5.7mm
 APS-C: 23.6×15.6mm
 Full Frame: 36×24mm
FOV Applications
SECURIT Y CAMERAS:
 Wide angle: 2.8mm (90° FOV)
 Standard: 6mm (50° FOV)
 Telephoto: 12mm (25° FOV)
AUTOMOTIVE CAMERAS:
 Rear view: 1.8mm (170° FOV)
 Front ADAS: 3.6mm (60° FOV)
 Driver monitoring: 6mm (45° FOV)

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CMOS Sensor

Lens Mount Standards

M12 (S-MOUNT):
 Thread: M12×0.5
 Back focal distance: 7.5-15mm
 Applications: Security, mobile

C-MOUNT:
 Thread: 1" diameter
 Back focal distance: 17.526mm
 Applications: Industrial, broadcast

CS-MOUNT:
 Thread: 1" diameter
 Back focal distance: 12.5mm
 Applications: Security cameras
Optical Performance Parameters
RESOLUTION (MTF):
 Modulation Transfer Function
 Spatial frequency response
 Target: >40% at Nyquist frequency
VIGNETTING:
 Light falloff toward corners
 Cos⁴ law natural falloff
 Target: <20% at corners

Lens Selection Criteria

Application FOV f/# Resolution Special Requirements

SMARTPHONE 75-85° f/1.8 >12MP Compact, autofocus
SECURITY 60-120° f/1.4 >2MP IR capability
AUTOMOTIVE 60-180° f/2.0 >2MP Temperature range
INDUSTRIAL 20-90° f/1.8 >5MP Vibration resistance

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CMOS Sensor

CHAPTER 12: DEPTH OF FIELD

Depth of Field Physics
Definition: Range of distances where objects appear acceptably sharp.

FORMULA:
𝐷𝑂𝐹 = (2 × 𝑁 × 𝐶 × 𝐷²) / (𝑓² − 𝑁 × 𝐶 × 𝐷)

Where:
N = f-number (aperture)
C = Circle of confusion diameter
D = Focus distance
f = Focal length

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CMOS Sensor

Autofocus Systems
VOICE COIL MOTOR (VCM):
 Electromagnetic actuator
 Fast response (<100ms)
 Precise positioning
S TEPPER MOTOR:
 Digital position control
 High precision
 Slower response (>200ms)

Focus Control Algorithms

CONTRAST DETECTION:
 Analyze image sharpness
 Move lens to maximize contrast
 Requires multiple samples
 Slower but accurate
PHASE DETECTION:
 Dedicated focus pixels
 Direct distance measurement
 Faster response
 Requires calibration

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CMOS Sensor

CHAPTER 13: FILTERS & TUNING

Color Filter Arrays
BAYER PATTERN:
 RGGB arrangement (50% green)
 Matches human visual sensitivity
 Industry standard for color imaging
ALTERNATIVE PATTERNS:
 RGBW: Adds white pixels for sensitivity
 RYYB: Yellow instead of green
 Monochrome: No color filter
Color Filter Characteristics
SPECTRAL RESPONSE:
 Red: 600-700nm peak
 Green: 500-600nm peak
 Blue: 400-500nm peak
 IR blocking: >700nm cutoff
FILTER MATERIALS:
 Organic dyes: Good color, lower durability
 Pigments: Better durability, cost effective
 Interference filters: Precise control, expensive

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CMOS Sensor

IR Cut Filters
Purpose: Block infrared light.

T YPES:
 Absorptive: Dye-based, gradual cutoff
 Reflective: Interference coating, sharp cutoff
 Hybrid: Combined approach
SPECIFICATIONS:
 Cutoff wavelength: 650-700nm
 Transition steepness: 20-50nm
 Visible transmission: >90%
Specialized Filters
NEAR-INFRARED (NIR) SENSORS:
 No visible blocking
 700-1100nm response
 Applications: Night vision, biometrics
UV FILTERS:
 Block ultraviolet <400nm
 Prevent fluorescence
 Protect sensor from UV damage
POLARIZING FILTERS:
 Reduce reflections
 Enhance contrast
 Stress analysis applications

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Filter Manufacturing
DEPOSITION METHODS:
 Spin coating: Uniform thickness
 Sputtering: High-quality interference
 Evaporation: Precise control
PATTERNING:
 Photolithography: High resolution
 Printing: Cost effective
 Laser ablation: Flexible patterns
Multispectral Imaging
APPLICATIONS:
 Agricultural monitoring
 Medical imaging
 Material identification
 Quality control
IMPLEMENTATION:
 Multiple sensors with different filters
 Tunable filters
 LED illumination control

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CHAPTER 14: SONY IMX477

IMX477 Overview
SPECIFICATIONS:
 Resolution: 4056×3040 (12.3MP)
 Pixel Size: 1.55μm
 Optical Format: 1/2.3"
 Package: 84-pin CSP
KEY FEATURES:
 Back-side illumination
 On-chip phase detection pixels
 Dual conversion gain
 4-lane MIPI CSI-2 output
Pinout and Connections
POWER PINS:
 3.3V Digital supply
 2.8V pixel array
CONTROL INTERFACE:
 SCL/SDA: I2C interface (400kHz)
CLOCK AND DATA:
 INCLK: 6-27MHz input clock
 MIPI_CLK±: Differential clock output
 MIPI_D0±, D1±, D2±, D3±: 4 data lanes

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CMOS Sensor

APPENDIX A: SONY IMX FAMILY

Model Resolution Pixel Size Optical Size Max FPS Shutter

IMX219 3280×2464 1.12μm 1/4" 30 Rolling
IMX477 4056×3040 1.55μm 1/2.3" 40 Rolling
IMX290 1945×1097 2.9μm 1/2.8" 120 Rolling
IMX296 1440×1080 3.45μm 1/2.9" 60 Global
IMX327 1945×1097 2.9μm 1/2.8" 60 Rolling
IMX385 1945×1097 3.76μm 1/2" 60 Rolling
IMX412 4056×3040 1.55μm 1/2.3" 40 Rolling
IMX415 3864×2192 1.45μm 1/2.8" 90 Rolling
IMX462 1945×1097 2.9μm 1/2.8" 120 Rolling
IMX500 4056×3040 1.55μm 1/2.3" 40 Rolling
IMX540 4000×3000 2.5μm 1/1.8" 30 Rolling
IMX678 3840×2160 2.0μm 1/1.8" 120 Rolling

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CMOS Sensor

APPENDIX B: CALCULATION
Sony iMX377CQT with 12mm S-Mount LENS
SENSOR DIMENSIONS:
𝑃𝑖𝑥𝑒𝑙𝑝𝑖𝑡𝑐ℎ ≈ 𝑃𝑖𝑥𝑒𝑙𝑠𝑖𝑧𝑒
(1) 𝑆𝑒𝑛𝑠𝑜𝑟𝑤𝑖𝑑𝑡ℎ = 𝑃𝑖𝑥𝑒𝑙𝑠𝑖𝑧𝑒 ∙ 𝑃𝑖𝑥𝑒𝑙𝑠𝐻 = 1.55𝜇𝑚 ∙ 4024 ≈ 6.24𝑚𝑚

(2) 𝑆𝑒𝑛𝑠𝑜𝑟𝐻𝑒𝑖𝑔ℎ𝑡 = 𝑃𝑖𝑥𝑒𝑙𝑠𝑖𝑧𝑒 ∙ 𝑃𝑖𝑥𝑒𝑙𝑠𝑉 = 1.55𝜇𝑚 ∙ 3036 ≈ 4.71𝑚𝑚

(3) 𝑆𝑒𝑛𝑠𝑜𝑟𝐷𝑖𝑎𝑔𝑜𝑛𝑎𝑙 = √𝑆𝑒𝑛𝑠𝑜𝑟𝑤𝑖𝑑𝑡ℎ 2 + 𝑆𝑒𝑛𝑠𝑜𝑟𝐻𝑒𝑖𝑔ℎ𝑡 2 = √6.24𝑚𝑚2 + 4.71𝑚𝑚2 ≈ 7.81𝑚𝑚

ANGULAR FIELD OF VIEW:

𝑆𝑒𝑛𝑠𝑜𝑟𝑊𝑖𝑑𝑡ℎ 6.24
(4) 𝐻𝐹𝑂𝑉∝ = 2 ∙ arctan ( ) = 2 ∙ arctan ( ) ≈ 0.5𝑟𝑎𝑑 ≈ 29°
2 ∙ 𝐹𝑜𝑐𝑎𝑙 𝐿𝑒𝑛𝑔𝑡ℎ 2 ∙ 12
𝑆𝑒𝑛𝑠𝑜𝑟𝐻𝑒𝑖𝑔ℎ𝑡 4.71
(5) 𝑉𝐹𝑂𝑉∝ = 2 ∙ arctan ( ) = 2 ∙ arctan ( ) ≈ 0.38𝑟𝑎𝑑 ≈ 22°
2 ∙ 𝐹𝑜𝑐𝑎𝑙 𝐿𝑒𝑛𝑔𝑡ℎ 2 ∙ 12
𝑃𝑖𝑥𝑒𝑙𝑠𝑖𝑧𝑒 1.55𝜇𝑚
(6) 𝑖𝐹𝑂𝑉∝ = = ≈ 130𝜇𝑟𝑎𝑑
𝐹𝑜𝑐𝑎𝑙 𝐿𝑒𝑛𝑔𝑡ℎ 12𝑚𝑚

FIELD OF VIEW:
𝐻𝐹𝑂𝑉∝ 0.5𝑟𝑎𝑑
(7) 𝐻𝐹𝑂𝑉𝑚 = 2 ∙ tan ( ) ∙ 𝐷𝑖𝑠𝑡𝑎𝑛𝑐𝑒 = 2 ∙ tan ( ) ∙ 𝐷𝑖𝑠𝑡𝑎𝑛𝑐𝑒 ≈ 0.52 ∙ 𝐷𝑖𝑠𝑡𝑎𝑛𝑐𝑒
2 2
𝑉𝐹𝑂𝑉∝ 0.38𝑟𝑎𝑑
(8) 𝑉𝐹𝑂𝑉𝑚 = 2 ∙ tan ( ) ∙ 𝐷𝑖𝑠𝑡𝑎𝑛𝑐𝑒 = 2 ∙ tan ( ) ∙ 𝐷𝑖𝑠𝑡𝑎𝑛𝑐𝑒 ≈ 0.4 ∙ 𝐷𝑖𝑠𝑡𝑎𝑛𝑐𝑒
2 2

30