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Com 112 & 113 Computer Sci and SLT

The document outlines a course titled 'Introduction to Digital Electronics' at Delta Central College, detailing various questions and topics related to digital electronics, including number conversions, binary-coded decimal, Boolean algebra, and circuit design. It includes specific questions that require detailed answers on concepts like excess-three code, seven-segment display, and the functions of digital electronics. Additionally, it provides a marking scheme for evaluating responses to these questions.

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0% found this document useful (0 votes)
6 views12 pages

Com 112 & 113 Computer Sci and SLT

The document outlines a course titled 'Introduction to Digital Electronics' at Delta Central College, detailing various questions and topics related to digital electronics, including number conversions, binary-coded decimal, Boolean algebra, and circuit design. It includes specific questions that require detailed answers on concepts like excess-three code, seven-segment display, and the functions of digital electronics. Additionally, it provides a marking scheme for evaluating responses to these questions.

Uploaded by

Paul Oshos
Copyright
© © All Rights Reserved
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You are on page 1/ 12

DELTA CENTRAL COLLEGE OF MANAGEMENT AND SCIENCES

(DECCOMS)
IN AFFILIATION WITH
TEMPLE GATE POLYTECHNIC
ABA, ABIA STATE.
COURSE TITLE: INTRODUCTION TO DIGITAL ELECTRONICS.
COURSE CODE: COM 112 / STP 113 DEPARTMENTS: COMPUTER SCIENCE /SLT
TIME ALLOWED: 2 HOURS INSTRUCTIONS: ANSWER FIVE QUESTIONS
QUESTION ONE (1) IS COMPULSORY
QUESTION 1
1a. Convert 372.348 to hexadecimal system
1b. Convert the following to Decimal number
i. 0.258
ii. 52178
1c. Convert 1ACF16 to Decimal number
QUESTION 2
2a. Give a detailed overview of binary-coded decimal (7marks)

2b. Define excess-three code and give examples of it. (7 marks)


QUESTION 3
3a. How do you encode a number (3 marks)

3b. How can you go about a seven segment display code (4 marks)

3c. Draw the image of a diode placement in a seven segment display (7 marks)
QUESTION 4
4a. What is your understanding of Boolean expression (7 marks)

4b. Express the basic laws of Boolean algebra (7 marks)

QUESTION 5
5a. Define De Morgan’s Theorem (4 marks)
5b. Explain the three major functions in digital electronics (9 marks)
QUESTION 6
6a. What do you do in order to design a circuit capable of binary addition (4 marks)

6b. Construct the logic table for a full adder (5 marks)


6c. Define half adder and full adder (5 marks)
QUESTION 7
7a. Define the following terminologies used to characterize integrated circuits (4 marks)
7b. Give the meaning and definition of the following terms LIC, IIH, IOL, and OIH (8 marks)
7c. Explain low noise margin and high noise margin (2 marks)
MARKING SCHEME

2a. Give a detailed overview of binary-coded decimal (7marks)


Binary-coded decimal (BCD) is an encoding for decimal numbers in which each digit is represented by
its own binary sequence. Its main virtue is that it allows easy conversion to decimal digits for printing or
display and faster decimal calculations. Its drawbacks are the increased complexity of circuits needed to
implement mathematical operations and a relatively inefficient encoding—it occupies more space than a
pure binary representation. In BCD, a digit is usually represented by four bits which, in general, represent
the values/digits/characters 0-9. Other bit combinations are sometimes used for sign or other indications.

2b. Define excess-three code and give examples of it. (7 marks)


Excess-three Code:
A number code in which the decimal digit n is represented by the four-bit binary equivalent of n + 3.

Excess-3 binary coded decimal (XS-3), also called biased representation or Excess-N, is a numeral
system that uses a pre-specified number N as a biasing value. It is a way to represent values with a
balanced number of positive and negative numbers. In XS-3, numbers are represented as decimal digits,
and each digit is represented by four bits as the BCD value plus 3 (the "excess" amount):

 The smallest binary number represents the smallest value. (i.e. 0 - Excess Value)
 The greatest binary number represents the largest value. (i.e. 2N - Excess Value - 1)
3a. How do you encode a number (3 marks)
To encode a number such as 127, then, one simply encodes each of the decimal digits as above, giving
(0100, 0101, 1010).
The primary advantage of XS-3 coding over BCD coding is that a decimal number can be nines'
complemented (for subtraction) as easily as a binary number can be ones' complemented; just invert all
bits.
Adding Excess-3 works on a different algorithm than BCD coding or regular binary numbers. When you
add two XS-3 numbers together, the result is not an XS-3 number. For instance, when you add 1 and 0 in
XS-3 the answer seems to be 4 instead of 1. In order to correct this problem, when you are finished
adding each digit, you have to subtract 3 (binary 11) if the digit is less than decimal 10 and add three if
the number is greater than or equal to decimal 10.

3b. How can you go about a seven segment display code (4 marks)
Seven Segment Display Code:
Binary numbers are necessary, but very hard to read or interpret. A seven-segment LED (Light-Emitted
Diode) display is used to display binary to decimal information.
A seven-segment display may have 7, 8, or 9 leads on the chip. Usually leads 8 and 9 are decimal points.
The figure below is a typical component and pin layout for a seven segment display.
The light emitting diodes in a seven-segment display are arranged in the figure below.

3c. Draw the image of a diode placement in a seven segment display (7 marks)
The image below is your typical seven segment display with each of the segments labeled with the letters
A through G. To display digits on these displays you turn on some of the LEDs. For example, when you
illuminate segments B and C for example your eye perceives it as looking like the number "1." Light up
A, B, and C and you will see what looks like a "7
4a. What is your understanding of Boolean expression (7 marks)
The most obvious way to simplify Boolean expressions is to manipulate them in the same way as normal
algebraic expressions are manipulated. With regards to logic relations in digital forms, a set of rules for
symbolic manipulation is needed in order to solve for the unknowns.
A set of rules formulated by the English mathematician George Boole describe certain propositions
whose outcome would be either true or false. With regard to digital logic, these rules are used to describe
circuits whose state can be either, 1 (true) or 0 (false). In order to fully understand this, the relation
between them AND gate, OR gate and NOT gate operations should be appreciated.

4b. Express the basic laws of Boolean algebra (7 marks)

Laws of Boolean Algebra


Table 2 shows the basic Boolean laws. Note that every law has two expressions, (a) and (b). This is
known as duality. These are obtained by changing every AND (.) to OR (+), every OR (+) to
AND (.) And all 1's to 0's and vice-versa. It has become conventional to drop the
(AND symbol) i.e. A.B is written as AB.

Commutative Law
(a) A + B = B + A
(b) AB=BA

Associate Law
(a) (A + B) + C = A + (B + C)
(b) (A B) C = A (B C)

Distributive Law
(a) A (B+C) = A B + A C
(b) A + (B C) = (A + B) (A + C)

Identity Law
(a) A + A = A
(b) A A = A

Redundance
Law

(a) A + A B = A
(b) A (A + B) = A

(a) 0 + A = A
(b) 0A=0

(a) 1 + A = 1
(b) 1 A = A
5a. Define De Morgan’s Theorem (4 marks)
De Morgan's Theorem
De Morgan's theorem is rules in formal logic relating pairs of dual logical operators in a systematic
manner expressed in terms of negation. The relationship so induced is called De Morgan duality.

Not (P and Q) = (not P) or (not Q) not


(P or Q) = (not P) and (not Q)

De Morgan's laws are based on the equivalent truth-values of each pair of statements.

5b. Explain the three major functions in digital electronics (9 marks)


Basic Digital Logic
There are three major functions in Digital Electronics. These functions are used to make more
complicated circuits, so an understanding of how these building blocks work is key to understanding how
circuits work.
The "AND" function requires that multiple inputs are all true for the output to be true. For example, if
you turn your car's ignition key, and step on the gas, then your car will start. Simply turning the key or
stepping on the gas isn't enough; both must be done to get the correct output. Likewise, all the inputs into
an AND gate must be true for the output to be true.
The "OR" function requires any input to be true for the output to be true. For example, you can enter your
home through either the back door or front door. Once you enter either one, you are inside your home.
Likewise, at least one of the inputs into an OR gate must be true for the output to be true. If more than
one input is true, the output is still true, since the minimum requirement is one.
The "INVERTER" function (also known as the "NOT") simply changes the condition. If it was true it
becomes false, and if it was false it becomes true. For example, it is never day and night at the same time.
If it is day, it is not night. Likewise, an INVERTER gate will logically change the input. For the output to
be true, the input must be false.

In digital electronics, a false condition is 0 volts (called VSS), while a true condition is the applied
voltage (called VCC or VDD). Since the applied voltage can range from under 3 volts to 5 volts, the true
condition is normally simply called a logical 1, and the false condition is called a logical 0.
Basic Boolean Algebra Manipulation
Boolean Algebra equations can be manipulated by following a few basic
rules. Manipulation Rules
A+B=B+A
A*B=B*A
(A + B) + C = A + (B + C)
(A * B) * C = A * (B * C)
A * (B + C) = (A * B) + (A * C)
A + (B * C) = (A + B) * (A + C)
Equivalence Rules
=
A = A

(double negative) A + A = A
A*A=A
_
A*A=0
_
A+A=1

Rules with Logical Constants


0+A=A
1+A=1
0*A=0
1*A=A
Many of these look identical to Matrix Operations in Linear Algebra. At any rate, this permits a circuit
designer to create a circuit as it comes to their mind, then manipulate the formula to generate an equivalent
circuit that does the same thing but requires less space.
This can be illustrated using the 5th manipulation rule.

Using the rule, generating an equivalent circuit that does the exact same thing, but be less complicated,

can be done with reasonable ease.


D = A * (B + C)
D = A * (B + 1)
D = A * (1) [1 + A = 1]
D=A [1 * A = A]
If C is known to be a logical 1, anything OR logical 1 is always a logical 1. Since the minimum
requirement is one input, once a single input is true (in this case C), the other inputs don't alter the result.
On the other hand, the AND gate requires all inputs. With B+C true, the only other requirement is A. As
the formula gave, D will be whatever A is. Many Boolean Algebra problems can be solved using more
than one formula, just like most Algebra problems. For example...

[A + (B * C) = (A + B) * (A + C)]
CHAPTER THREE
SIMPLE ADDERS

6a. What do you do in order to design a circuit capable of binary addition (4 marks)

In order to design a circuit capable of binary addition one would have to look at all of the logical
combinations. You might do that by looking at the following four sums:

0 0 1 1
+0 +1 +0 +1
0 1 1 10

That looks fine until you get to 1 + 1. In that case, you have a carry bit to worry about. If you don't care
about carrying (because this is, after all, a 1-bit addition problem), then you can see that you can solve
this problem with an XOR gate. But if you do care, then you might rewrite your equations to always
include 2 bits of output, like this:

0 0 1 1
+0 +1 +0 +1
00 01 01 10

From these equations you can form the logic table:

1-bit Adder with Carry-Out

A B Q CO
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
By looking at this table you can see that you can implement Q with an XOR gate and CO (carry-out) with
an AND gate. What if you want to add two 8-bit bytes together? This becomes slightly harder. The
easiest solution is to modularize the problem into reusable components and then replicate components. In
this case, we need to create only one component: a full binary adder. The difference between a full adder
and the previous adder we looked at is that a full adder accepts an A and a B input plus a carry-in (CI)
input. Once we have a full adder, then we can string eight of them together to create a byte-wide adder
and cascade the carry bit from one adder to the next.
In the next section, we'll look at how a full adder is implemented into a circuit.

6b. Construct the logic table for a full adder (5 marks)


Full Adders

The logic table for a full adder is slightly more complicated than the tables we have used before, because
now we have 3 input bits. It looks like this:
One-bit Full Adder with Carry-In and Carry-Out

C A B Q CO
I
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

6c. Define half adder and full adder (5 marks)


Half adder:
A Combinational Circuit that performs the addition of two bits is called a Half adder.

Full adder:
A Combinational Circuit that performs the addition of three bits (two significant bits and a previous
carry) is a full adder.
NAND Implementation:

7a. Define the following terminologies used to characterize integrated circuits (4 marks)
Fan in
Fan out

Fan in: Is the number of inputs of a digital gate.

Fan out: Is the number of gates’ inputs connected to the output of a gate (the amount of loading).
Sometimes the other types of loads (wires, pads, etc.) are expressed as fan out equivalent.
7b. Give the meaning and definition of the following terms LIC, IIH, IOL, and OIH (8 marks)
IIL is the input current to a gate when the input has a logic value of 0 (low input current)
IIH is the input current to a gate when the input has a logic value of 1 (high input
current)
IOL is the output current of a gate when the output has a logic value of 0 (low output
current)

IOH is the output current of a gate when the output has a logic value of 1 (high output
current)

7c. Explain low noise margin and high noise margin (2 marks)
The low noise margin (NML or NM0) specifies by how much an input voltage representing logic 0 can
change before an error occurs due to it being interpreted as 1.
The high noise margin (NMH or NM1) specifies by how much an input voltage representing logic 1
can change before an error occurs due to it being interpreted as 0.

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