UNIT I - INTRODUCTION TO EMBEDDED SYSTEMS

Introduction to Embedded Systems –Structural units in Embedded processor ,

selection of processor & memory devices- DMA — Memory management methods-
Timer and Counting devices, Watchdog Timer, Real Time Clock, In circuit emulator,
Target Hardware Debugging.

PART- B

1. INTRODUCTION TO EMBEDDED SYSTEMS:

●​ An Electronic/Electro mechanical system which is designed to perform a

specific function and is a combination of both hardware and firmware
(Software) E.g. Electronic Toys, Mobile Handsets, Washing Machines, Air
Conditioners, Automotive Control Units, Set Top Box, DVD Player etc…

●​ Embedded Systems are:

❑ Unique in character and behavior

❑ With specialized hardware and software

History of Embedded Systems:

➢ First Recognized Modern Embedded System: Apollo Guidance Computer (AGC)

developed by Charles Stark Draper at the MIT Instrumentation Laboratory.

• It has two modules

• 1.Command module(CM) 2.Lunar Excursion module(LEM)

• RAM size 256 , 1K ,2K words

• ROM size 4K,10K,36K words

• Clock frequency is 1.024MHz

• 5000 ,3-input RTL NOR gates are used

• User interface is DSKY(display/Keyboard)

➢ First Mass Produced Embedded System: Autonetics D-17 Guidance computer for
Minuteman-I missile

Major Application Areas of Embedded Systems:

❑ Consumer Electronics: Camcorders, Cameras etc.

❑ Household Appliances: Television, DVD players, washing machine,

Fridge, Microwave Oven etc.

❑ Home Automation and Security Systems: Air conditioners, sprinklers,

Intruder detection alarms, Closed Circuit Television Cameras, Fire alarms etc.

❑ Automotive Industry: Anti-lock breaking systems (ABS), Engine Control,

Ignition Systems, Automatic Navigation Systems etc.

❑ Telecom: Cellular Telephones, Telephone switches, Handset Multimedia

Applications etc.

❑ Computer Peripherals: Printers, Scanners, Fax machines etc.

❑ Computer Networking Systems: Network Routers, Switches, Hubs,

Firewalls etc.

❑ Health Care: Different Kinds of Scanners, EEG, ECG Machines etc.

❑ Measurement & Instrumentation: Digital multi meters, Digital CROs,

 Logic Analyzers PLC systems etc.

❑ Banking & Retail: Automatic Teller Machines (ATM) and Currency

counters, Point of Sales (POS)

❑ Card Readers: Barcode, Smart Card Readers, Hand held Devices etc.

Purpose of Embedded Systems:

Each Embedded Systems is designed to serve the purpose of any one or a

combination of the following tasks.

●​ Data Collection/Storage/Representation

●​ Data Communication

●​ Data (Signal) Processing

●​ Monitoring

●​ Control

●​ Application Specific User Interface

2. Characteristics of Embedded systems:

Embedded systems possess certain specific characteristics and these are unique to
each Embedded system.

1. Application and domain specific

2. Reactive and Real Time

3. Operates in harsh environments

4. Distributed

5. Small Size and weight

6. Power concerns

7. Single-functioned

8. Complex functionality

9. Tightly-constrained
 10. Safety-critical

1. Application and Domain Specific:-

• Each E.S has certain functions to perform and they are developed in such a
manner to do the intended functions only.

• They cannot be used for any other purpose.

• Ex – The embedded control units of the microwave oven cannot be replaced

with AC‟S embedded control unit because the embedded control units of
microwave oven and AC are specifically designed to perform certain specific
tasks.

2. Reactive and Real Time:-

• E.S are in constant interaction with the real world through sensors and
user-defined input devices which are connected to the input port of the
system.

• Any changes in the real world are captured by the sensors or input devices in
real time and the control algorithm running inside the unit reacts in a designed
manner to bring the controlled output variables to the desired level.

• E.S produce changes in output in response to the changes in the input, so

they are referred as reactive systems.

• Real Time system operation means the timing behavior of the system should
be deterministic ie the system should respond to requests in a known amount
of time.

• Example – E.S which are mission critical like flight control systems,
Antilock Brake Systems (ABS) etc are Real Time systems.

3. Operates in Harsh Environment :–

• The design of E.S should take care of the operating conditions of the area
where the system is going to implement.

• Ex – If the system needs to be deployed in a high temperature zone, then all

the components used in the system should be of high temperature grade.

• Also proper shock absorption techniques should be provided to systems

which are going to be commissioned in places subject to high shock. 4.
Distributed: –
 • It means that embedded systems may be a part of a larger system. • Many
numbers of such distributed embedded systems form a single large embedded
control unit.

• Ex – Automatic vending machine. It contains a card reader, a vending unit

etc. Each of them are independent embedded units but they work together to
perform the overall vending function.

5. Small Size and Weight:-

• Product aesthetics (size, weight, shape, style, etc) is an important factor in

choosing a product.

• It is convenient to handle a compact device than a bulky product.

6. Power Concerns:-

• Power management is another important factor that needs to be considered

in designing embedded systems.

• E.S should be designed in such a way as to minimize the heat dissipation by

the system.

7. Single-functioned:- Dedicated to perform a single function

8. Complex functionality: - We have to run sophisticated algorithms or multiple

algorithms in some applications.

9. Tightly-constrained:- Low cost, low power, small, fast, etc 10. Safety-critical:-
Must not endanger human life and the environment

3. Classification of Embedded Systems:

❑ Based on Generation

❑ Based on Complexity & Performance Requirements

❑ Based on deterministic behavior

❑ Based on Triggering

1. Embedded Systems - Classification based on Generation

First Generation: The early embedded systems built around 8-bit microprocessors
like 8085 and Z80 and 4-bit microcontrollers EX. stepper motor control units, Digital
Telephone Keypads etc.
Second Generation: Embedded Systems built around 16-bit microprocessors and 8
or 16-bit microcontrollers, following the first generation embedded systems
EX.SCADA, Data Acquisition Systems etc.

Third Generation: Embedded Systems built around high performance 16/32 bit
Microprocessors/controllers, Application Specific Instruction set processors like
Digital Signal Processors (DSPs), and Application Specific Integrated Circuits
(ASICs).The instruction set is complex and powerful. EX. Robotics, industrial
process control, networking etc.

Fourth Generation: Embedded Systems built around System on Chips (SoC’s),

Reconfigurable processors and multicore processors. It brings high performance, tight
integration and miniaturization into the embedded device market EX Smart phone
devices, MIDs etc.

2. Embedded Systems - Classification based on Complexity & Performance

➢ Small Scale: The embedded systems built around low performance and low cost 8
or 16 bit microprocessors/ microcontrollers. It is suitable for simple applications and
where performance is not time critical. It may or may not contain OS.

➢ Medium Scale: Embedded Systems built around medium performance, low cost
16 or 32 bit microprocessors / microcontrollers or DSPs. These are slightly complex
in hardware and firmware. It may contain GPOS/RTOS.

➢ Large Scale/Complex: Embedded Systems built around high performance 32 or

64 bit RISC processors/controllers, RSoC or multi-core processors and PLD. It
requires complex hardware and software. These system may contain multiple
processors/controllers and co-units/hardware accelerators for offloading the
processing requirements from the main processor. It contains RTOS for scheduling,
prioritization and management.

3. Embedded Systems - Classification Based on deterministic behavior:

It is applicable for Real Time systems.

The application/task execution behavior for an embedded system can be either

deterministic or non-deterministic

These are classified in to two types

1. Soft Real time Systems: Missing a deadline may not be critical and can be
tolerated to a certain degree

2. Hard Real time systems: Missing a program/task execution time deadline

can have catastrophic consequences (financial, human loss of life, etc.)
 4. Embedded Systems - Classification Based on Triggering:

These are classified into two types

1. Event Triggered : Activities within the system (e.g., task run-times) are
dynamic and depend upon occurrence of different events .

2. Time triggered: Activities within the system follow a statically computed

schedule (i.e., they are allocated time slots during which they can take place)
and thus by nature are predictable.

4. Structural units in Embedded Processor

The processor in any embedded system contains various units for its successful and fast
operation. Buses, memories, processing units, instructions, registers, control units are some of
the structural units that an embedded processor should possess.
Internal Buses
It internally connects all the structural units inside the processor. Its width can be of 8, 16, 32
or 64 bits. The internal buses include address bus, data bus and control bus. All the internal
units of the processor are communicated with the external buses through an interface unit
called Bus Interface Unit(BIU).

●​ Address bus is an external bus that carries the address from the Memory Address
Register(MAR) to the memory as well as to the IO devices and other units of the system.
●​ Data bus is an external bus that carries the data from or to the address determined by
Memory Address Register(MAR).
●​ Control Bus is an external bus that carries, control signals to or between the processor and
memory.

Instruction Units
The processor executes several operations with the help of a piece of code or program called
instructions. All these instruction are arranged in a queue called Instruction Queue(IQ). This
helps the Instruction Register to execute the instructions without the need to wait.

Instruction Register(IR) takes the instruction codes(opcodes) sequentially to the execution

unit of the processor. Instruction decoder(ID) decodes the instruction opcode received at the
Instruction Register and passes it to the processor Control unit for its execution..
Caches
In general, cache is the temporary storage place in the processor, where the data can easily be
retrieved by the CPU for quick operation. Cache is available in your computers, laptop,
mobile phone, browser, app, etc. The embedded processor has three cache memory for fast
operation.

Similar to an instruction queue, Instruction Cache(I-Cache) sequentially stores the

instructions in FIFO mode. It lets the processor to execute the instructions at a greater speed.

Branch Target Cache(BT Cache) facilitates the ready availability of the next instruction set,
when a branch instruction like jump, call or loop is encountered. Its fetch unit foresees a
branching instruction in the I – cache.

Data Cache(D – Cache) stores the pre – fetched data from the external memory. A data cache
holds both the address and data together at a location. It also stores the write-through data
that is to be transferred to the external memory addresses. Write-through data is nothing but
the output data from the execution unit.

Control Units
The control unit(CU) is one of the important structural units in an any embedded processor. It
is responsible for all the control of the bus activities and unit functions needed for processing.
It directs all the units of a processor to respond to the instruction that is executed.
Pre fetch control Unit(PFCU) controls the fetching of data into the I-Cache and D-Cache in
advance from the memory unit. The instructions and data are delivered when needed to the
processor’s execution units.

Memory Management Unit(MMU) manages the memories such that the instructions and data
are readily available for processing. There are several memory management methods for
managing the memory in an embedded processor such as fixed block allocation, dynamic
block allocation, dynamic page allocation, etc.

Processing Units
Processing units receives the input data, process it and produces the output. Depending on the
function of the embedded system, the processing is done through different units like ALU,
FLPU, AOU and advanced units.

Arithmetic Logic Unit(ALU) is used for the execution the arithmetic and logic instructions
according to the instruction present at the Instruction Register.

Floating point processing unit(FLPU) is different from ALU, used primarily for floating
point processing. It is essential for fast processing mathematical functions in a
microprocessor or Digital Signal Processor.

Atomic operation unit(AOU) lets a user (compiler) instruction when broken into number of
processor instructions called atomic operations, finish before an interrupt of the processor
occurs.

The embedded processor also has Advanced processing units for multistage pipeline
processing, multi-line superscalar processing to obtain processing speeds higher than one
instruction per cycle.

Register Sets
Application Register Set(ARS) is a set of on-chip registers used during processing of
instructions of the application program of the user. A register window consists of a subset of
registers with each subset storing static variables of software – routine.

System Register Set(SRS) is a set of registers used while processing the instructions of the
supervisory system program.

Floating point register set(FRS) is dedicated for storing floating point numbers in the
standard format and used by Floating point Processing Units for its data.
Memory Registers
Registers are smallest part of the CPU, where the data and address can be stored and accessed
quickly. There are various registers like accumulator, general purpose registers, flag registers,
memory address register, memory data register, program counter, stack pointer, etc.

Memory Address Register(MAR) holds the address of the data byte or word that is to be
fetched from external memories. Memory Data Register(MDR) holds the data byte or word
that is fetched from external memory or stored to the external memory.

Program Counter and Stack Pointer

Program counter is a register that stores the address of the next instruction to be executed
from the memory. It generates the instruction cycle to fetch the address from memory through
MAR.

Stack pointer is a register that stores the address of the last program request in a stack. It is a
pointer for an address which corresponds to a stack top in the memory.

5. Processor Selection for an embedded system

♣ The processing unit could be a microprocessor, a microcontroller, embedded

processor, DSP, ASIC or FPGA selected for an embedded system based on the
application requirements.

♣ The following considerations need to be factored during processor selection for an

embedded system.

¬ Performance Considerations

¬ Power considerations

¬ Peripheral Set

¬ Operating Voltage

¬ Specialized Processing Units

¬ Software tools availability

¬ Packaging, Memory, I/O Ports, Cost etc.

1. Performance Considerations:
 ♣ The first and foremost consideration in selecting the processor is its performance.

♣ The performance speed of a processor is dependent primarily on its architecture and

its silicon design.

♣ Evolution of fabrication techniques helped packing more transistors in same area

there by reducing the propagation delay.

♣ Also presence of cache reduces instruction/data fetch timing.

♣ Pipelining and super-scalar architectures further improves the performance of the

processor

♣ Branch prediction, speculative execution etc. are some other techniques used for
improving the execution rate

2. Power Considerations:

♣ Increasing the logic density and clock speed has adverse impact on power
requirement of the processor.

♣ A higher clock implies faster charge and discharge cycles leading to more power
consumption.

♣ More logic leads to higher power density there by making the heat dissipation
difficult.

♣ Techniques like

¬ Frequency scaling

– reducing the clock frequency of the processor depending on the load.

¬ Voltage scaling

– varying the voltage based on load can help in achieving lower power usage.

♣ SoC comes with advanced power gating techniques that can shut down clocks and
power to unused modules

3. Peripheral Set:

♣ Every system requires not only a processor but also peripherals for input and output
operations.
 ♣ In an embedded system, almost all the processors used are SoCs, So it is better if
the necessary peripherals are available in the chip itself. This offers various benefits
compared to peripherals in external IC’s.

♣ So it is important to have peripheral set in consideration when selecting the

processor

4. Operating Voltages:

♣ Each and every processor will have its own operating voltage condition. The
operating voltage maximum and minimum ratings will be provided in the respective
data sheet or user manual.

♣ While higher end processors typically operate with 2 to 5 voltages including 1.8V
for Cores/Analogue domains, 3.3V for IO lines, needs specialized PMIC(Power
Management IC) devices, it is a deciding factor in low end micro-controllers based on
the input voltage.

5. Specialized Processing Unit:

♣ Apart from the core, presence of various co-processors and specialized processing
units can help achieving necessary processing performance.

♣ Co-processors execute the instructions fetched by the primary processor thereby

reducing the load on the primary.

♣ Some of the popular co-processors include DSP, GPU and Floating point co-
processor

6. Packaging:

♣ Is it 40-pin DIP (Dual-inline-package) or QFP (Quad flat package)? This is

important in terms of space, assembling, and prototyping the end-product.

7. Software tools:

♣ Make sure you have tools such as compilers, debuggers, and assemblers etc.,
available with the processor/controller.

8. Cost:

♣ Engineers (especially software/firmware engineers) want to have all the

functionality, but pricing is a factor when designing a system and choosing the right
processor.
5. Direct Memory Access (DMA)

Direct Memory Access (DMA) is a process of transferring data from one memory location
to another without the direct involvement of the processor (CPU). The main benefit of using
DMA is more efficient data movement in the embedded system.

Principle of Operation

There are many different types of DMA implementations, some of them for very specific use
cases. In this article, we will focus on the general principles of operation. Let’s start with the
simple system shown below in Fig.1.

Fig,1 Simplified DMA block diagram

The functional unit that performs the operations for directly accessing the memory is called
a DMA controller. On the simplified block diagram (Fig.1) we have a CPU, a RAM, a
peripheral unit, and a DMA controller. All except the peripheral unit are connected on the
same bus. As the CPU and the DMA controller must be able to initiate transfers they have
master interfaces. Although the goal is to have DMA that operates independently, the CPU is
the one that has to configure the DMA controller to perform transfers. The DMA controller
can be dedicated to a specific DMA-capable peripheral unit (as shown in Fig. 1) or can be a
more general DMA able to access various types of memory-mapped peripherals.

DMA Interaction With The CPU

As the CPU and the DMA controller use the same bus, there must be some form of
handshaking between them. They can’t access the bus simultaneously. The handshaking can
be implemented as a dedicated interface between the CPU and the DMA controller or can be
part of the bus protocol. The DMA controller contains registers that the CPU must configure.
The configuration may include: the source address of the transfer, the destination address of
the transfer, the number of bytes to be transferred, interrupt request to the CPU on completion
of a transfer, etc.
An important thing to remember is that DMA is not cost-free and it may affect the CPU
operation in certain situations. If the CPU is using the memory bus the DMA has to wait. If
the DMA starts a transfer, then the CPU has to wait for it to finish if it wants to access the
bus. For avoiding these situations some systems are designed with multiple areas of memory
(see Fig.2). Each memory area has its own dedicated bus and DMA controller. In that
scenario, the CPU may be accessing one area of the memory, while a DMA controller is
accessing at the same time another area. Bus bridges and interconnects are used for
connecting all subsystems and forming a single memory space.

Fig.2 Simplified block diagram of an embedded system with two DMA subsystems

Type of Transfers

The most common configuration in modern microcontrollers is the use of a single memory
address space, where all types of memories (Code Flash, RAM, Data flash, etc.) and
peripheral units are mapped into the same address space. For the DMA controller, all
transfers are memory-to-memory. For us as developers however, by knowing what
functionality is behind each memory address we can use the DMA for the following type of
transfers:

●​ memory to peripheral unit and vice versa

●​ memory to memory
●​ peripheral unit to peripheral unit

Each DMA controller has FIFO buffers. They are used in case a busy resource is preventing
the transfer from completing. Using FIFO allows the DMA controller to perform two-step
transfers:

1.​ Read access – data is transferred from the source address to the DMA FIFO
2.​ Write access – data is transferred from the DMA FIFO to the destination address
Fig.3 Two-step DMA transfer

Why Use DMA?

DMA is used for moving data from one address of the memory to another. When used
properly it can improve the efficiency of an embedded system. The CPU can be more focused
on performing calculations, without having to waste too many instruction cycles for
transferring data. This can result in improving the speed of our program.

Another benefit can be the reduction of power consumption. The two common ways of
transferring data without the use of DMA are:

●​ based on interrupts – interrupt is generated when a new data is available and CPU has
to transfer it
●​ polling – the CPU waits for a new data to become available and then transfers it

Both methods require the CPU to be awake. In contrast, some DMA controllers can perform
data transfers while the CPU is in sleep mode (low-power mode).

6. Memory Management in Operating System

The term memory can be defined as a collection of data in a specific format. It is used to store
instructions and process data.
The memory comprises a large array or group of words or bytes, each with its own location.
The primary purpose of a computer system is to execute programs.
These programs, along with the information they access, should be in the main memory
during execution. The CPU fetches instructions from memory according to the value of the
program counter.
To achieve a degree of multiprogramming and proper utilization of memory, memory
management is important.

What is Main Memory?

The main memory is central to the operation of a Modern Computer. Main Memory is a large
array of words or bytes, ranging in size from hundreds of thousands to billions. Main memory
is a repository of rapidly available information shared by the CPU and I/O devices. Main
memory is the place where programs and information are kept when the processor is
effectively utilizing them. Main memory is associated with the processor, so moving
instructions and information into and out of the processor is extremely fast. Main memory is
also known as RAM (Random Access Memory). This memory is volatile. RAM loses its data
when a power interruption occurs.

What is Memory Management?

Memory management mostly involves management of main memory. In a multiprogramming
computer, the Operating System resides in a part of the main memory, and the rest is used by
multiple processes. The task of subdividing the memory among different processes is called
Memory Management.

Why Memory Management is Required?

●​ Allocate and de-allocate memory before and after process execution.
●​ To keep track of used memory space by processes.
●​ To minimize fragmentation issues.
●​ To proper utilization of main memory.
●​ To maintain data integrity while executing of process.

1. Logical and Physical Address Space

●​ Logical Address Space: An address generated by the CPU is known as a “Logical
Address”. It is also known as a Virtual address. Logical address space can be defined as
the size of the process. A logical address can be changed.
●​ Physical Address Space: An address seen by the memory unit (i.e. the one loaded into
the memory address register of the memory) is commonly known as a “Physical
Address”. A Physical address is also known as a Real address. The set of all physical
addresses corresponding to these logical addresses is known as Physical address space.
2. Static and Dynamic Loading
Loading a process into the main memory is done by a loader. There are two different types of
loading :
●​ Static Loading: Static Loading is basically loading the entire program into a fixed
address. It requires more memory space.
●​ Dynamic Loading: The entire program and all data of a process must be in physical
memory for the process to execute. So, the size of a process is limited to the size
of physical memory. To gain proper memory utilization, dynamic loading is used.
In dynamic loading, a routine is not loaded until it is called. All routines are residing on
disk in a relocatable load format. One of the advantages of dynamic loading is that the
 unused routine is never loaded. This loading is useful when a large amount of code is
needed to handle it efficiently.
3. Static and Dynamic Linking
To perform a linking task a linker is used. A linker is a program that takes one or more object
files generated by a compiler and combines them into a single executable file.
●​ Static Linking: In static linking, the linker combines all necessary program modules into
a single executable program. So there is no runtime dependency. Some operating systems
support only static linking, in which system language libraries are treated like any other
object module.
●​ Dynamic Linking: The basic concept of dynamic linking is similar to dynamic loading.
In dynamic linking, "Stub" is included for each appropriate library routine reference. A
stub is a small piece of code. When the stub is executed, it checks whether the needed
routine is already in memory or not. If not available then the program loads the routine
into memory.
4. Swapping
When a process is executed it must have resided in memory. Swapping is a process of
swapping a process temporarily into a secondary memory from the main memory, which is
fast compared to secondary memory. A swapping allows more processes to be run and can be
fit into memory at one time. The main part of swapping is transferred time and the total time
is directly proportional to the amount of memory swapped. Swapping is also known as
roll-out, or roll because if a higher priority process arrives and wants service, the memory
manager can swap out the lower priority process and then load and execute the higher priority
process. After finishing higher priority work, the lower priority process swapped back in
memory and continued to the execution process.

7. Memory Management Techniques

Memory management techniques are methods used by an operating system to efficiently
allocate, utilize, and manage memory resources for processes. These techniques ensure
smooth execution of programs and optimal use of system memory
Different Memory Management techniques are:
1. Memory Management with Monoprogramming (Without Swapping)
This is the simplest memory management approach the memory is divided into two sections:
●​ One part of the operating system
●​ The second part of the user program

Fence Register

operating system user program

●​ In this approach, the operating system keeps track of the first and last location available
for the allocation of the user program
●​ The operating system is loaded either at the bottom or at top

2. Multiprogramming with Fixed Partitions (Without Swapping)

●​ A memory partition scheme with a fixed number of partitions was introduced to support
multiprogramming. this scheme is based on contiguous allocation
●​ Each partition is a block of contiguous memory
●​ Memory is partitioned into a fixed number of partitions.
●​ Each partition is of fixed size
Example: As shown in fig. memory is partitioned into 5 regions the region is reserved for
updating the system the remaining four partitions are for the user program.

3. Fixed Size Partitioning

Operating System

p1

p2
 Operating System

p3

p4

Partition Table
Once partitions are defined operating system keeps track of the status of memory partitions it
is done through a data structure called a partition table.

Sample Partition Table

Starting Address of Partition Size of Partition Status

0k 200k allocated

200k 100k free

300k 150k free

450k 250k allocated

Logical vs Physical Address

An address generated by the CPU is commonly referred to as a logical address. the address
seen by the memory unit is known as the physical address. The logical address can be
mapped to a physical address by hardware with the help of a base register this is known as
dynamic relocation of memory references.

Contiguous Memory Allocation

Contiguous memory allocation is a memory management method where each process is given
a single, continuous block of memory. This means all the data for a process is stored in
adjacent memory locations.
Partition Allocation Methods
To gain proper memory utilization, memory allocation must be allocated efficient manner.
One of the simplest methods for allocating memory is to divide memory into several
fixed-sized partitions and each partition contains exactly one process. Thus, the degree of
multiprogramming is obtained by the number of partitions.
●​ Fixed partition allocation: Memory is divided into fixed-sized partitions during system
initialization. Each partition can hold only one process.
●​ Dynamic Partition Allocation: In this allocation strategy, Memory is divided into
variable-sized partitions based on the size of the processes.
When it is time to load a process into the main memory and if there is more than one free
block of memory of sufficient size then the OS decides which free block to allocate.
There are different Placement Algorithm:
1.​ First Fit
2.​ Best Fit
3.​ Worst Fit
4.​ Next Fit

Non-Contiguous Memory Allocation

Non-contiguous memory allocation is a memory management method where a process is
divided into smaller parts, and these parts are stored in different, non-adjacent memory
locations. This means the entire process does not need to be stored in one continuous block of
memory.
Techniques of Non-Contiguous Memory Allocation are:
●​ Paging
●​ Segmentation

Fragmentation
Fragmentation is defined as when the process is loaded and removed after execution from
memory, it creates a small free hole. These holes can not be assigned to new processes
because holes are not combined or do not fulfill the memory requirement of the process. In
the operating systems two types of fragmentation are:
●​ Internal fragmentation: Internal fragmentation occurs when memory blocks are
allocated to the process more than their requested size. Due to this some unused space is
left over and creating an internal fragmentation problem. .
●​ External fragmentation: In External Fragmentation, we have a free memory block, but
we can not assign it to a process because blocks are not contiguous.

8. TIMERS AND COUNTERS:

A timer is a specialized type of clock which is used to measure time intervals. A timer that
counts from zero upwards for measuring time elapsed is often called a stopwatch. It is a
device that counts down from a specified time interval and used to generate a time delay, for
example, an hourglass is a timer.
A counter is a device that stores (and sometimes displays) the number of times a particular
event or process occurred, with respect to a clock signal. It is used to count the events
happening outside the microcontroller. In electronics, counters can be implemented quite
easily using register-type circuits such as a flip-flop.
Different Modes of Timers
Mode 0 (13-Bit Timer Mode)
Both Timer 1 and Timer 0 in Mode 0 operate as 8-bit counters (with a divide-by-32
prescaler). Timer register is configured as a 13-bit register consisting of all the 8 bits of TH1
and the lower 5 bits of TL1. The upper 3 bits of TL1 are indeterminate and should be ignored.
Setting the run flag (TR1) does not clear the register. The timer interrupt flag TF1 is set when
the count rolls over from all 1s to all 0s. Mode 0 operation is the same for Timer 0 as it is for
Timer 1.

Mode 1 (16-Bit Timer Mode)

Timer mode "1" is a 16-bit timer and is a commonly used mode. It functions in the same way
as 13-bit mode except that all 16 bits are used. TLx is incremented starting from 0 to a
maximum 255. Once the value 255 is reached, TLx resets to 0 and then THx is incremented
by 1. As being a full 16-bit timer, the timer may contain up to 65536 distinct values and it
will overflow back to 0 after 65,536 machine cycles.

Mode 2 (8 Bit Auto Reload)

Both the timer registers are configured as 8-bit counters (TL1 and TL0) with automatic
reload. Overflow from TL1 (TL0) sets TF1 (TF0) and also reloads TL1 (TL0) with the
contents of Th1 (TH0), which is preset by software. The reload leaves TH1 (TH0)
unchanged.

The benefit of auto-reload mode is that you can have the timer to always contain a value from
200 to 255. If you use mode 0 or 1, you would have to check in the code to see the overflow
and, in that case, reset the timer to 200. In this case, precious instructions check the value
and/or get reloaded. In mode 2, the microcontroller takes care of this. Once you have
configured a timer in mode 2, you don't have to worry about checking to see if the timer has
overflowed, nor do you have to worry about resetting the value because the microcontroller
hardware will do it all for you. The auto-reload mode is used for establishing a common baud
rate.

Mode 3 (Split Timer Mode)

Timer mode "3" is known as split-timer mode. When Timer 0 is placed in mode 3, it becomes
two separate 8-bit timers. Timer 0 is TL0 and Timer 1 is TH0. Both the timers count from 0
to 255 and in case of overflow, reset back to 0. All the bits that are of Timer 1 will now be
tied to TH0.

When Timer 0 is in split mode, the real Timer 1 (i.e. TH1 and TL1) can be set in modes 0, 1
or 2, but it cannot be started/stopped as the bits that do that are now linked to TH0. The real
timer 1 will be incremented with every machine cycle.
Reading a Timer
A 16-bit timer can be read in two ways. Either read the actual value of the timer as a 16-bit
number, or you detect when the timer has overflowed.

Main Components of Timer/Counter Hardware

●​ Counter Register – Stores the current value.

●​ Prescaler – Divides the clock frequency to slow down counting.

●​ Control Registers – Configure mode, enable/disable, start/stop.

●​ Compare Registers – Used in PWM and event triggering.

●​ Interrupt Flags – Set when the timer overflows or hits a compare value.

Applications:
●​ Delays and Time Measurement
●​ Event Counting
●​ Pulse Width Modulation (PWM)
●​ Frequency Measurement
●​ Real-Time Clock (RTC)

9. WATCHDOG TIMER:
What is a Watchdog Timer?
A Watchdog Timer is a hardware timer that runs independently of the main program. It must
be regularly reset (or “kicked”/“petted”) by the software within a specified time interval. If
the software fails to reset the watchdog before the timer expires, the WDT assumes the
system has become unresponsive and forces a system reset.
Purpose of the Watchdog Timer
Recover from software hangs or infinite loops
Ensure system reliability in mission-critical applications
Restart the system after unexpected behaviour

🌀
How Watchdog Timer Works
Normal Operation
●​ The watchdog timer starts counting down.
●​ The software resets the timer periodically within the allowed time.
●​ Timer never expires → System runs normally.
⚠️Faulty Operation
●​ Software hangs, crashes, or enters an infinite loop.
●​ Watchdog is not reset in time.
●​ Timer expires → Triggers system reset or interrupt.
WDT operation
Detection of MCU faults
The watchdog timer communicates with the MCU at a set interval. If the MCU does not
output a signal, outputs too many signals or outputs signals that differ from a predetermined
pattern, the timer determines that the MCU is malfunctioning and sends a reset signal to the
MCU.
The WDT uses a number of methods (modes) to detect MCU faults and the type of faults it
detects varies with the mode.The following is a description of WDT operation and features
by mode.
Time-out mode
In this mode, the watchdog timer determines the MCU is malfunctioning and outputs a reset
signal if it does not receive a signal from the MCU within the set interval.
The time-out mode is a major WDT monitoring mode or method, but it sometimes fails to
detect MCU faults.
In Time-out mode, the WDT will not detect an MCU fault if the MCU inputs multiple signals
(= double pulse) in the set period.
WINDOW MODE
The window mode enables more accurate detection of faults than the Time-out mode.
In window mode, the watchdog timer determines that the MCU is malfunctioning and outputs
a reset signal if it does not receive a signal, or receives multiple signals (= double pulse) from
the MCU within the set interval.
A window mode watchdog timer may be more suitable for applications such as automotive
devices that require greater safety
Q&A (Question & Answer) mode

The Q&A mode enables more accurate detection of faults than the previous two modes.
In Q&A mode, the MCU sends predetermined data to the WDT. The WDT determines
whether or not the MCU is operating normally depending on whether or not the signal sent by
the MCU matches predetermined data.
Devices that require a high degree of safety, may require a Q&A mode WDT. However,
unlike the window and the timeout modes, this mode relies on data communication between
the MCU and WDT, which makes operation more complex.

Key Components and Features

Component Description
WDT Register Control and configure WDT (enable, timeout period, etc.)
Timeout Period The max time allowed before a reset is triggered
Reset Mechanism Typically triggers a system reset
Interrupt Option Some WDTs can first trigger an interrupt before reset
Enable/Disable Usually must be enabled at startup or via fuse bits (e.g., in AVR)

Use Cases in Real Life

Application Use of WDT

Automotive ECUs Keeps engine control unit from hanging
Medical Devices Ensures continuous monitoring of vital parameters
 Application Use of WDT
Spacecraft Systems Resets system if radiation causes software crash
Routers/IoT Devices Ensures they reconnect if they become unresponsive

10. Quality Attributes of Embedded System:

Quality attributes are the non-functional requirements that need to be documented

properly in any system design.

Quality attributes can be classified as

I. Operational quality attributes

II. Non-operational quality attributes.

I. Operational Quality Attributes:

The operational quality attributes represent the relevant quality attributes related to
the embedded system when it is in the operational mode or online mode.

Operational Quality Attributes are:

1. Response :- It is the measure of quickness of the system. It tells how fast the
system is tracking the changes in input variables.

Most of the E.S demands fast response which should be almost realtime.

Ex – Flight control application.

2. Throughput :- It deals with the efficiency of a system. It can be defined as the rate
of production or operation of a defined process over a stated period of time. The rates
can be expressed in terms of products, batches produced or any other meaningful
measurements.

Ex – In case of card reader throughput means how many transactions the reader can
perform in a minute or in an hour or in a day. Throughput is generally measured in
terms of “Benchmark”. A Benchmark is a reference point by which something can be
measured

3. Reliability :-

• It is a measure of how much we can rely upon the proper functioning of the
system.

• Mean Time Between Failure (MTBF) and Mean Time To Repair (MTTR)
 are the terms used in determining system reliability.

• MTBF gives the frequency of failures in hours/weeks/months.

• MTTR specifies how long the system is allowed to be out of order following
a failure.

• For embedded system with critical application need, it should be of the order
of minutes.

4. Maintainability:-

• It deals with support and maintenance to the end user or client in case of
technical issues and product failure or on the basis of a routine system
checkup.

• Reliability and maintainability are complementary to each other.

• A more reliable system means a system with less corrective maintainability

requirements and vice versa.

• Maintainability can be broadly classified into two categories

1. Scheduled or Periodic maintenance (Preventive maintenance) ​

2. Corrective maintenance to unexpected failures

5. Security:-

• Confidentiality, Integrity and availability are the three major measures of

information security.

• Confidentiality deals with protection of data and application from

unauthorized disclosure.

• Integrity deals with the protection of data and application from unauthorized
modification.

• Availability deals with protection of data and application from unauthorized

users.

6. Safety :-

Safety deals with the possible damages that can happen to the operator, public and the
environment due to the breakdown of an Embedded System. The breakdown of an
embedded system may occur due to a hardware failure or a firmware failure. Safety
analysis is a must in product engineering to evaluate the anticipated damages and
determine the best course of action to bring down the consequences of damage to an
acceptable level.

II. Non-Operational Quality Attributes:

The quality attributes that needs to be addressed for the product not on the basis of
operational aspects are grouped under this category.

1. Testability and Debug-ability:-

• Testability deals with how easily one can test the design, application and by
which means it can be done.

• For an E.S testability is applicable to both the embedded hardware and

firmware.

• Embedded hardware testing ensures that the peripherals and total hardware
functions in the desired manner, whereas firmware testing ensures that the
firmware is functioning in the expected way.

• Debug-ability is a means of debugging the product from unexpected

behavior in the system • Debug-ability is two level process

• 1.Hardware level

2.software level

• 1. Hardware level: It is used for finding the issues created by hardware

problems.

• 2. Software level: It is employed for finding the errors created by the flaws
in the software.

2. Evolvability :-

• It is a term which is closely related to Biology. It is referred as the

non-heritable variation.

• For an embedded system evolvability refers to the ease with which the
embedded product can be modified to take advantage of new firmware or
hardware technologies.

3. Portability:-

• It is the measure of system independence.

 • An embedded product is said to be portable if the product is capable of
functioning in various environments, target processors and embedded
operating systems.

• „Porting‟ represents the migration of embedded firmware written for one

target processor to a different target processor.

4. Time-to-Prototype and Market:-

• It is the time elapsed between the conceptualization of a product and the

time at which the product is ready for selling.

• The commercial embedded product market is highly competitive and time to

market the product is critical factor in the success of commercial embedded
product.

• There may be multiple players in embedded industry who develop products

of the same category (like mobile phone).

5. Per Unit Cost and Revenue:-

• Cost is a factor which is closely monitored by both end user and product
manufacturer. Cost is highly sensitive factor for commercial products

• Any failure to position the cost of a commercial product at a nominal rate

may lead to the failure of the product in the market.

• Proper market study and cost benefit analysis should be carried out before
taking a decision on the per-unit cost of the embedded product.

• The ultimate aim of the product is to generate marginal profit so the budget
and total cost should be properly balanced to provide a marginal profit.