Computer Organization and

Architecture
Chapter three

Assembly level machine

organization

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 contents.
3.1. Basic organization of the von Neumann machine
3.2. Control unit; instruction fetch, decode, and execution
3.3. Instruction sets and types (data manipulation, control, I/O)
3.4. Assembly/machine language programming
3.5. Instruction formats
3.6. Addressing modes
3.7. Subroutine call and return mechanisms
3.8. I/O and interrupts

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3.1 Basic organization of the von Neumann machine
• The invention of stored program computers has been
ascribed to a mathematician, John von Neumann.
• It was pointed out by von-Neumann that the same memory
can be used or storing data and instructions.

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• Today’s stored-program computers have the following
characteristics:
– Three hardware systems:
• A central processing unit (CPU)
• A main memory system
• An I/O system
• The capacity to carry out sequential instruction processing.
• A single data path between the CPU and main memory.This
single path is known as the von Neumann bottleneck.(rate at
which data and program can get into the CPU is limited by the
bandwidth of the interconnect))

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3.2 Control unit; instruction fetch, decode, and execution
• The control unit
– Directs the information flow through ALU by
• - Selecting various Components in the system
• - Selecting the Function of ALU
– A cycle is made of three phases: fetch, decode and execute.
• During the fetch phase, the instruction whose address is determined by
the PC is obtained from the memory and loaded into the IR. The PC is
then incremented to point to the next instruction.
• During the decode phase, the instruction in IR is decoded and the
required operands are fetched from the register or from memory.
• During the execute phase, the instruction is executed and the results
are placed in the appropriate memory location or the register.
• Once the third phase is completed, the control unit starts the cycle
again, but now the PC is pointing to the next instruction. The process
continues until the CPU reaches a HALT instruction.

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An example
Let us show how our simple computer can add two integers A and B
and create the result as C. We assume that integers are in two’s
complement format. Mathematically, we show this operation as:

We assume that the first two integers are stored in memory locations
(40)16 and (41)16 and the result should be stored in
memory location (42)16. To do the simple addition needs five
instructions, as shown next:

Assume for the moment that we need to add 161 + 254 = 415. The
numbers are shown in memory in hexadecimal is, (00A1)16, (00FE)16,
and (019F)16.

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these five instructions are encoded as:

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5.8
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3.3. Instruction sets and types (data
manipulation, control, I/O)
• What is an Instruction Set?
• The complete collection of instructions that are understood by a CPU
• Instruction Types
– Data transfer: registers, main memory, stack or I/O
– Data processing: arithmetic, logical
– Control: systems control, transfer of control

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 DATA TRANSFER INSTRUCTIONS
Name Mnemonic
Typical Data Transfer Instructions
Load LD
Store ST
Move MOV
Exchange XCH
Input IN
Output OUT
Push PUSH
Pop POP
Data Transfer Instructions with Different Addressing Modes
Some assembly language conventions modify the mnemonic symbol to
differentiate between addressing modes
LDI – load immediate
• Some use a special character to designate the mode

Assembly
Mode Convention Register Transfer
Direct address LD ADR AC  M[ADR]
Indirect address LD @ADR AC  M[M[ADR]]
Relative address LD $ADR AC  M[PC + ADR]
Immediate operand LD #NBR AC  NBR
Index addressing LD ADR(X) AC  M[ADR + XR]
Register LD R1 AC  R1
Register indirect LD (R1) AC  M[R1]
Autoincrement LD (R1)+ AC  M[R1], R1  R1 + 1 15
Autodecrement LD -(R1) R1  R1 - 1, AC  M[R1]
 DATA MANIPULATION INSTRUCTIONS
Three Basic Types: Arithmetic instructions
Logical and bit manipulation instructions
Shift instructions
Arithmetic Instructions
Name Mnemonic
Increment INC
Decrement DEC
Add ADD
Subtract SUB
Multiply MUL
Divide DIV
Add with Carry ADDC
Subtract with Borrow SUBB
Negate(2’s Complement) NEG

Logical and Bit Manipulation Instructions Shift Instructions

Name Mnemonic Name Mnemonic
Clear CLR Logical shift right SHR
Complement COM Logical shift left SHL
AND AND Arithmetic shift right SHRA
OR OR Arithmetic shift left SHLA
Exclusive-OR XOR Rotate right ROR
Clear carry CLRC Rotate left ROL
Set carry SETC Rotate right thru carry RORC
Complement carry COMC Rotate left thru carry ROLC
Enable interrupt EI
Disable interrupt DI 16
 PROGRAM CONTROL INSTRUCTIONS
• Program control instructions: provide decision-making
capabilities and change the program path
• Typically, the program counter is incremented during the fetch
phase to the location of the next instruction
• A program control type of instruction may change the address
value in the program counter and cause the flow of control to
be altered
– This provides control over the flow of program execution and a
capability for branching to different program segments

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 Cont…
+1
In-Line Sequencing
(Next instruction is fetched from the
PC next adjacent location in the memory)

Address from other source; Current Instruction, Stack, etc

Branch, Conditional Branch, Subroutine, etc
Program Control Instructions
Name Mnemonic
Branch BR
Jump JMP
Skip SKP
Call CALL * CMP and TST instructions do not retain their
Return RTN results of operations(- and AND, respectively).
Compare(by - ) CMP They only set or clear certain Flags.
Test (by AND) TST

Status Flag Circuit A B

8 8
c7
c8 8-bit ALU
F7 - F0
V Z S C
F7
Check for 8
zero output
F 18
CONDITIONAL BRANCH INSTRUCTIONS
Mnemonic Branch condition Tested condition
BZ Branch if zero Z=1
BNZ Branch if not zero Z=0
BC Branch if carry C=1
BNC Branch if no carry C=0
BP Branch if plus S=0
BM Branch if minus S=1
BV Branch if overflow V=1
BNV Branch if no overflow V=0
Unsigned compare conditions (A - B)
BHI Branch if higher A>B
BHE Branch if higher or equal AB
BLO Branch if lower A<B
BLOE Branch if lower or equal AB
BE Branch if equal A=B
BNE Branch if not equal AB
Signed compare conditions (A - B)
BGT Branch if greater than A>B
BGE Branch if greater or equal AB
BLT Branch if less than A<B
BLE Branch if less or equal AB
BE Branch if equal A=B
BNE Branch if not equal AB

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3.4. Assembly/machine language programming
• Machine language
– Native to a processor: executed directly by hardware
– Instructions consist of binary code: 1s and 0s
• Assembly language
– Slightly higher-level language
– Readability of instructions is better than machine language
– One-to-one correspondence with machine language
instructions
• Assemblers translate assembly to machine code
• Compilers translate high-level programs to machine code
– Either directly, or
– Indirectly via an assembler

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A Hierarchy of Languages

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 Translating Languages
English: D is assigned the sum of A times B plus 10.

High-Level Language: D = A * B + 10

A statement in a high-level language is translated

typically into several machine-level instructions

Intel Assembly Language: Intel Machine Language:

mov eax, A A1 00404000
mul B F7 25 00404004
add eax, 10 83 C0 0A
mov D, eax A3 00404008

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Advantages of High-Level Languages
• Program development is faster
– High-level statements: fewer instructions to code
• Program maintenance is easier
– For the same above reasons
• Programs are portable
– Contain few machine-dependent details
• Can be used with little or no modifications on different
machines
– Compiler translates to the target machine language
– However, Assembly language programs are not portable

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• Why Learn Assembly Language?
Two main reasons:
– Accessibility to system hardware
• Assembly Language is useful for implementing system software
• Also useful for small embedded system applications
– Space and Time efficiency
• Understanding sources of program inefficiency
• Tuning program performance
• Writing compact code

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Assembler
• Software tools are needed for editing, assembling, linking,
and debugging assembly language programs
• An assembler is a program that converts source-code
programs written in assembly language into object files in
machine language
• Popular assemblers have emerged over the years for the Intel
family of processors. These include …
– TASM (Turbo Assembler from Borland)
– NASM (Netwide Assembler for both Windows and Linux),
and
– GNU assembler distributed by the free software foundation
– MASM (Macro Assembler from Microsoft)

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• Learning assembly language programming will
help understanding the operations of the
microprocessor
• To learn:
– Need to know the functions of various registers
– Need to know how external memory is organized and
how it is addressed to obtain instructions and data
(different addressing modes)
– Need to know what operations (or the instruction
set) are supported by the CPU. For example,
powerful CPUs support floating-point operations but
simple CPUs only support integer operations

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Example:
• The statement must specify which operation (opcode) is to be
performed and the operands
• Eg ADD AX, BX
ADD is the operation
AX is called the destination operand
BX is called the source operand
The result is AX = AX + BX
• When writing assembly language program, you need to think
in the instruction level

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Example
• In c++, you can do A = (B+C)*100
• In assembly language, only one instruction per statement
A=B ; only one instruction - MOVE
A = A+C ; only one instruction - ADD
A = A*100 ; only one instruction - Multiply
Formats of assembly language
• General format for an assembly language statement
Label Instruction Comment
Start: Mov AX, BX ; copy BX into AX

Start is a user defined name and you only put in a

label in your statement when necessary!!!!
The symbol : is used to indicate that it is a label

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• In 8086, memory is divided into segments
• Only 4 64K-byte segments are active and these are: code,
stack, data, and extra

• When you write your assembly language program for an

8086, theoretically you should define the different segments!!!

• To access the active segments, it is via the segment register:

CS (code), SS (stack), DS (data), ES (extra)
• So when writing assembly language program, you must make
use of the proper segment register or index register when you
want to access the memory

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• In assembly programming, you cannot operate on two
memory locations in the same instruction
• So you usually need to store (move) value of one location into
a register and then perform your operation
• After the operation, you then put the result back to the
memory location
• Therefore, one form of operation that you will use very
frequent is the store (move) operation!!!
And using registers!!!!!
• In C++ A = B+C ; A, B, C are variables
• In assembly language A,B, C representing memory locations
so you cannot do A = B+C
– MOV AL, B ; move value of B into AL register
– ADD, AL, C ; do the add AL = AL +C
– MOV A, AL ; put the result to A

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• In general, an assembly program must include the code
segment!!
• Other segments, such as stack segment, data segment are
not compulsory
• There are key words to indicate the beginning of a segment
as well as the end of a segment. Just like using main(){} in
C++ Programming
Example
• DSEG segment ‘data’ ; define the start of a data
segment
• DSEG ENDS ; defines the end of a data segment
• Segment is the keyword DSEG is the name of the segment
• Similarly key words are used to define the beginning of a
program, as well as the end.

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Example
CSEG segment ‘code’
START PROC FAR ; define the start of a program (procedure)
RET ; return
START ENDP ; define the end of a procedure
CSEG ends
End start ; end of everything

• Different assembler may have different syntax for the

definition of the key words !!!!!
• Start is just a name it could be my_prog, ABC etc

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 3.5 INSTRUCTION FORMAT
Instruction Fields
OP-code field - specifies the operation to be performed
Address field - designates memory address(s) or a processor register(s)
Mode field - specifies the way the operand or the
effective address is determined
The number of address fields in the instruction format
depends on the internal organization of CPU

- The three most common CPU organizations:

Single accumulator organization:
ADD X /* AC  AC + M[X] */
General register organization:
ADD R1, R2, R3 /* R3  R2 + R1 */
ADD R1, R2 /* R2  R1 + R2 */
MOV R1, R2 /* R2  R1 */
ADD R1, X /* M[X]  R1 + M[X] */
Stack organization:
PUSH X /* TOS  M[X] */
ADD
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THREE, and TWO-ADDRESS INSTRUCTIONS
Three-Address Instructions:

Program to evaluate X = (A + B) * (C + D) :
ADD A, B ,R1 /* R1  M[A] + M[B] */
ADD C, D, R2 /* R2  M[C] + M[D] */
MUL R1, R2, X /* M[X]  R1 * R2 */

- Results in short programs

- Instruction becomes long (many bits)

Two-Address Instructions:
Program to evaluate X = (A + B) * (C + D) :

MOV R1, A /* R1  M[A] */

ADD R1, B /* R1  R1 + M[B] */
MOV R2, C /* R2  M[C] */
ADD R2, D /* R2  R2 + M[D] */
MUL R1, R2 /* R1  R1 * R2 */
MOV X, R1 /* M[X]  R1 */
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ONE, and ZERO-ADDRESS INSTRUCTIONS
One-Address Instructions:
- Use an implied AC register for all data manipulation
- Program to evaluate X = (A + B) * (C + D) :
LOAD A /* AC  M[A] */
ADD B /* AC  AC + M[B] */
STORE T /* M[T]  AC */
LOAD C /* AC  M[C] */
ADD D /* AC  AC + M[D] */
MUL T /* AC  AC * M[T] */
STORE X /* M[X]  AC */
Zero-Address Instructions:
- Can be found in a stack-organized computer
- Program to evaluate X = (A + B) * (C + D) :
PUSH A /* TOS  A */
PUSH B /* TOS  B */
ADD /* TOS  (A + B) */
PUSH C /* TOS  C */
PUSH D /* TOS  D */
ADD /* TOS  (C + D) */
MUL /* TOS  (C + D) * (A + B) */
POP X /* M[X]  TOS */
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The stack push and pop
operations

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 ADDRESSING MODES
• The different ways in which operands can
be addressed are called the addressing
modes.
• Addressing modes differ in the way the
address information of operands is
specified.

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• Immediate Mode
– According to this addressing mode, the value of the
operand is (immediately) available in the instruction
itself.
– Consider, for example, the case of loading the
decimal value 1000 into a register Ri. This operation
can be performed using an instruction such as the
following: LOAD #1000, Ri.

ITEC2021: Computer 39
Organization
 TYPES OF ADDRESSING MODES
Register Indirect Mode
Instruction specifies a register which contains
the memory address of the operand
- Saving instruction bits since register address
is shorter than the memory address
- Slower to acquire an operand than both the
register addressing or memory addressing
- EA = [IR(R)] ([x]: Content of x)

Auto-increment or Auto-decrement features:

Same as the Register Indirect, but:
- When the address in the register is used to access memory, the
value in the register is incremented or decremented by 1 (after or
before the execution of the instruction)

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 TYPES OF ADDRESSING MODES
Direct Address Mode
Instruction specifies the memory address which
can be used directly to the physical memory
- Faster than the other memory addressing modes
- Too many bits are needed to specify the address
for a large physical memory space
- EA = IR(address), (IR(address): address field of IR)

Indirect Addressing Mode

The address field of an instruction specifies the address of a memory
location that contains the address of the operand
- When the abbreviated address is used, large physical memory can
be addressed with a relatively small number of bits
- Slow to acquire an operand because of an additional memory
access
- EA = M[IR(address)]

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 Direct

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 Indirect

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 TYPES OF ADDRESSING MODES

Relative Addressing Modes

The Address fields of an instruction specifies the part of the address
(abbreviated address) which can be used along with a
designated register to calculate the address of the operand

PC Relative Addressing Mode(R = PC)

- EA = PC + IR(address)

- Address field of the instruction is short

- Large physical memory can be accessed with a small number of
address bits

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 relative

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