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Course Plan ECE5128

This document outlines the course plan for Analog and Mixed Signal Design I taught during the 2011-2012 academic year. The course is a 3 credit hour course taught over one semester. It introduces students to challenges in mixed signal integrated circuit design and covers topics such as analog and digital filters, data converters, noise shaping, and high speed data converters. Evaluation includes two sessional examinations, assignments, and a final exam. The intended learning outcomes are for students to gain fundamental circuit design skills for mixed signal VLSI circuits including analog to digital and digital to analog converters.

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77 views

Course Plan ECE5128

This document outlines the course plan for Analog and Mixed Signal Design I taught during the 2011-2012 academic year. The course is a 3 credit hour course taught over one semester. It introduces students to challenges in mixed signal integrated circuit design and covers topics such as analog and digital filters, data converters, noise shaping, and high speed data converters. Evaluation includes two sessional examinations, assignments, and a final exam. The intended learning outcomes are for students to gain fundamental circuit design skills for mixed signal VLSI circuits including analog to digital and digital to analog converters.

Uploaded by

vicky205444
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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(KALASALINGAM ACADEMY OF RESEARCH AND EDUCATION)

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

KALASALINGAM UNIVERSITY
COURSE PLAN

Academic Year Course Code Course Name Year/Semester/Branch Lecture-Tutorial-Practical Credits Course coordinator Course instructor(s) 1. Pre-requisite

: : : : : : : :

2011-2012 ECE5128 ANALOG AND MIXED SIGNAL DESIGN I / II / VLSI Design 3-1-0 3 P.Sivakumar P.Sivakumar

Students are expected to have knowledge in Basics of Analog and Digital Design.

2.

Objective
To discuss the Challenges in mixed signal IC design To discuss the importance of MOS models and its impact on design To design, model and analyze Analog and Digital Filters for mixed signal IC design To design, model and analyze converters, Noise Shaping, Band pass Data Converters

3.

Learning Outcome and End Use

At the end of the course the student must be able to covers fundamental circuit techniques and design issues for mixed-signal VLSI. The topics include the design of analog-to-digital (ADC) and digital-to-analog (DAC) converters, signal conditioning circuits used with data converters, signal integrity issues in modern VLSI circuits, and high-speed I/O circuits.

4.
Sl. No. T1

Text Books
Authors R. Jacob Baker Books Title CMOS: Mixed-Signal Circuit Design Publisher Wiley-IEEE press, 2008 Edition 2nd Edition

5.
Sl. No. R1 R2

Reference Books
Authors Vineeta P. Gijji Erik Brunvand, Books Title Analog and Mixed Mode VLSI Design Digital VLSI Chip Design with Cadence and Synopsys CAD Tools Publisher Prentice Hall, 2011 Pearson, 2010 Edition 1st Edition 1st Edition

6.
Sl. No. W1 W2

Web Resources
Topic Name Analog Integrated Circuits CMOS Mixed-Signal IC Design course website Web Resource http://eguru/Electrical%20Engineering/Analog%20ICs/ http://cmosedu.com/jbaker/courses/ece615/f10/ece615.htm

7.
Topic No.

Lesson Plan
Topic Name Reference Number of Periods Cumulative Periods

1. 2. 3. 4. 5. 6. 7.

I INTRODUCTION ANALOG AND MIXED SIGNAL DESIGN Challenges in Analog design, Mixed signal processing blocks R1 1 Mixed signal issues, Mixed signal design example Review of Basic MOS Transistors, Review of Basic Analog Circuits Large signal, Small signal models, Amplifiers, , Signals Filters Submicron CMOS circuit design R1 R1 R1 T1 T1 R1 1 1 1 1 2 2

1 2 3 4 5 7 9

II ANALOG AND DIGITAL FILTERS 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. 21. 22. 23. 24. 25. 26. 27. 28. 29. 30. Sampling, Sample and Hold Circuits Data converters, Differential non-linearity and Integral non-linearity for DACs and ADCs Data converter architectures Analog filters, Integrator building blocks Analog Filtering topologies, Digital filters, SPICE models for DACs and ADCs, Sinc-shaped Digital filters, T1, R1 R1 R1 T1, W2 T1, W2 T1, W2 T1, W2 1 1 2 1 1 1 1 1 1 1 1 1 1 2 1 10 11 13 14 15 16 17 18 19 20 21 22 23 25 26 27 29 30 32 33 34 35 36

Digital filtering topologies T1, W2 III DATA CONVERTER SNR, DESIGN BASICS Quantization noise Signal-to-Noise Ratio Clock jitter, Improving SNR using averaging Decimating filters for ADC Interpolating filters for DAC Data converter design, One bit ADC and DAC, Passive noise-shaping Improving SNR and linearity T1, W2 T1, W2 R1 R1 R1 T1, W2 T1, W2

Improving linearity using an Active circuit T1, W2 1 IV NOISE SHAPING, BANDPASS DATA CONVERTERS First order noise shaping second order noise shaping Noise shaping topologies Continuous time Band pass noise-shaping, Passive component modulators Active component modulators Modulators at RF Frequencies T1, W2 T1, W2 T1, W2 T1, W2 T1, W2 T1, W2 2 1 2 1 1 1 1

31. 32. 33. 34. 35. 36.

Switched-capacitor Band pass noise-shaping T1, W2 V HIGH SPEED DATA CONVERTERS Topology, Clock signals, Path settling time, Implementation T1, W2 filtering, understanding the signals Practical implementation, Generating clock signals, Components Switched capacitors, Amplifiers, Clocked comparators; High speed ADC, Switched capacitor circuits T1, W2 T1, W2 T1, W2 T1, W2 R1

2 1 1 1 2 2

38 39 40 41 43 45

8.

Portions for Sessional Examination I, II


Sessional Examination I Sessional Examination II I, II III, IV

9.
i. ii. iii.

Related Magazines / Journals


Analog Integrated Circuits and Signal processing http://www.springer.com/engineering/circuits+%26+systems/journal/10470 Analog and Mixed Signal Design http://www.icjournal.com/design/analog Semiconductor processes http://www.mosis.com/

10.
i.

Related Experiments / Projects


Determine the mode of operation of each of the following FETs

ii.

A ring oscillator of 39 inverters has an operating frequency of 150 MHz. What is the propagation delay of a single inverter?

11.

Evaluation Plan
Sessional Examination I Sessional Examination II End Semester Examination Assignments / Quizzes / Tutorials 20% 20% 50% 10%

Prepared by

Verified by

P.Sivakumar

HoD/E.C.E (Dr.S.Durairaj)

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