8085 Microprocessor
8085 Microprocessor
Organization of 8085: 9
Block diagram of a microprocessor based system and its description, Pin layout of 8085 µp and the function of each pin, internal architecture, de-multiplexing of the
bus, generating control signals, registers, modes of addressing, timing diagram for MOV and MVI instructions, 8085 serial i/o lines: SOD and SID.
Assembly Programming: 12
Instruction classification, instruction format, programming techniques- looping counting and indexing, simple programs based on data transfer, sorting arithmetic
operations, counters and time delays.
Basic of Interrupts: 6
INTR, RST 5.5, RST 6.5, RST 7.5 & TRAP, their Priorities and implementation, important of SIM and RIM instruction, DMA transfer- HOLD and HLDA
Text Books:
1.Intro to Architecture, Hardware and programming with 8085 -R. Gaonkar,3rd Ed (PHI).
References:
1. Microprocessor Architecture, programming and Applications Tawade & Borole Technova pub
2. Microprocessor interfacing Douglas Hall (TMG)
Block diagram of a microprocessor based system
Features
• Introduced in 1977
• 8 bit microprocessor
• NMOS device
• 40 pin DIP
8085 board
8085 MPU
Bus Driver
A15
or Buffer High-Order Address Bus
A7 Low-Order Address Bus
A0
Latch to
Demultiplex
AD7 – AD0 Chip Select Chip Select Port Select Port Select Decoder
Decoder Decoder Decoder
IOW
IOR AND Gate AND Gate
8085
Microprocessor
(MPU) CS EPROM CS R/W Memory EN Encoder Key Board EN Latch LED Display
RD RD WR
MEMR
MEMR
Bus Driver
Control D7 Data Bus Bidirectional Data Bus
Logic
D0
MEMR
MEMR MEMW
MEMW
IOR
Gates
IOR IOW
IOW
X1 and X2:-
• Provides clock frequency to the microprocessor.
• Generally Crystal oscillator is used.
• The frequency generated is internally divided by two.
• The internal operating frequency is 3 MHz.
Address Bus:
A8 - A15: (output; 3-state)
• Carries most significant 8 bits of the memory address or 8 bits of the I/O address.
Data bus:
AD0 - AD7 (input/output; 3-state)
• Multiplexed lines carry the lower order 8 bit address as well as data bus.
• During the opcode fetch operation, in the first clock cycle, the lines deliver the lower order
address A0 - A7.
• In the subsequent IO / memory, read / write clock cycle, the lines are used as data bus.
• The CPU may read or write out data through these lines.
Control and Status signals:
• They are the signals initiated by an external device to request the microprocessor to
do a particular task or work.
• There are five hardware interrupts called,
• TRAP
• RST 7.5
• RST 6.5
• RST 5.5
• INTA
Reset In (input, active low)
• This signal is used to reset the microprocessor.
• The program counter inside the microprocessor is set to zero.
• The buses are tri-stated.
• Temporary Register
• General Purpose Register
• Special Purpose Registers
Temporary Registers
• In 8085 available temporary register are temporary data register and W and Z re
gisters. These registers are not available to the programmer, but 8085 uses them
internally to hold temporary data during execution of some instructions.
• W and Z are two 8-bit temporary registers, used to hold 8-bit data/address during
execution of some instructions.
General Purpose Registers
• B,C,D,E,H &L are used as general purpose register.
• Each 8 bit long .
• These registers can also be used to work in pairs to hold 16-bit data.
• They can work in pairs such as B-C, D-E and H-L to store 16-bit data.
• The H-L pair works as a memory pointer.
• A memory pointer holds the address of a particular memory location.
• They can store 16-bit address as they work in pair.
Special Purpose Register
• Accumulator
• Status or Flag Register
• Instruction Register
• Program Counter
• Stack Pointer
Accumulator
• Flag register is a group of flip flops used to give status of different operations result.
• The flag register is connected to ALU.
• Once an operation is performed by ALU the result is transferred on internal data bus
and status of result will be stored in flip flops.
• They are called Zero (Z), Carry (CY), Sign (S), Parity (P), and Auxiliary Carry (AC)
flags.
Flag Register…
• A flag register contains a number of flags either to indicate certain conditions arising
after arithmetic and logical operations or to control certain operations.
• The flags which indicate conditions are known as condition flags. The flags which are
used to control certain operations are called control flags.
• A flag is a flip-flop which is set or reset by the processor to indicate certain conditions
or set/reset by the programmer to control certain operations.
Carry flag(CY):
• If an operation performed in ALU generates the carry from D7 to next stage then CY flag is set,
else it is reset.
Auxiliary carry(AC):
• If an operation performed in ALU generates the carry from lower nibble (D0 to D3) to upper
nibble (D4 to D7) AC flag is set, else it resets.
Zero flag(z):
• If an operation performed in ALU results 0value of entire 8-bits then zero flag is set, else it resets
Sign flag(s):
• If MSB bit =0 then the number is positive, else it is negative.
Parity flag(p):
• If the result contains even no. of ones this flag is set and for odd no. of ones this flag is reset.
Instruction Register
• This 16-bit register deals with sequencing the execution of instructions. This registe
r is a memory pointer. Memory locations have 16-bit addresses, and that is why this
is a16-bit register.
• The microprocessor uses this register to sequence the execution of the instructions.
The function of the program counter is to point to the memory address from which t
he next byte is to be fetched. When a byte is being fetched, the program counter is
incremented by one to point to the next memory location.
Stack Pointer
• The stack pointer is also a 16-bit register used as a memory pointer. It points to a
memory location in R/W memory, called the stack. The beginning of the stack is
defined by loading 16-bit address in the stack pointer.
• Stack pointer is also a 16-bit register which is used as a memory pointer.
• Stack pointer maintains the address of the last byte that is entered into stack.
• Each time when the data is loaded into stack, Stack pointer gets decremented.
• The ALU performs the actual numerical and logic operation such as add, subtract,
AND, OR, etc. Uses data from memory and from Accumulator to perform arithmetic.
Always stores result of operation in Accumulator.
• It accepts an OPCODE from instruction register, decodes it and gives the decoded inf
ormation to control logic.
• The information includes what operation is to be performed, who is going to perform
it, etc. It means it will understand the instruction in this block.
• The decoded information is given to the timing and control unit that provides control
signals
Address Buffer
• The contents of the stack pointer and program counter are loaded into the
address buffer and address-data buffer.
• These buffers are then used to drive the external address bus and address-data
bus.
• As the memory and I/O chips are connected to these buses, the CPU can
exchange desired data to the memory and I/O chips.
• The address-data buffer is not only connected to the external data bus but also to
the internal data bus which consists of 8-bits.
• The address data buffer can both send and receive data from internal data bus.
• The contents of the stack pointer and program counter are loaded into the
address buffer and address-data buffer. These buffers are then used to drive the e
xternal address bus and address-data bus. As the memory and I/O chips are c
onnected to these buses, the CPU can exchange desired data to the memory
and I/O chips.
• The address-data buffer is not only connected to the external data bus but also to
the internal data bus which consists of 8-bits. The address data buffer can
both send and receive data from internal data bus.
Incrementer/Decrementer Address Latch
• The 8-bit contents of a register or a memory location
can be incremented or decremented by 1.
• It accepts data from instruction decoder and generates micro steps to perform it
,in addition it accepts clock inputs for synchronizing operations.
• This unit consists of an oscillator and controller sequencer which sends control
signals needed for internal and external control of data and other units.