Field Effect

Transistors

1
 Overview (1)

p-channel
JFET n-channel

 Types of FET enhancement

p-channel
depletion
MOSFET enhancement
n-channel
depletion

2
Overview (2)

 FET characteristics and modes of operation

 Analysis and Design of FET Amplifiers
 bias operating point (DC analysis)
 small signal model (AC analysis)

3
 Enhancement mode n-MOSFET

Figure 5.1 n-Channel enhancement MOSFET showing channel length L

and channel width W.
4
 Enhancement mode n-MOSFET

Figure 5.2 Circuit symbol for an enhancement-mode n-channel MOSFET. 5

 nMOS operation modes (1)

Fig. 5.3 An NMOS transistor with vGS < Vt

The device acts as an open circuit.
6
 nMOS operation modes (2)

Fig. 5.3 An NMOS transistor with vGS > Vt and with a small vDS applied. The device acts
as a conductance whose value is determined by vGS. Specifically, the channel
conductance is proportional to vGS - Vt, and this iD is proportional to (vGS - Vt) vDS. 7
Note that the depletion region is not shown (for simplicity).
 nMOS operation modes (3)

Fig. 5.5 Operation of the enhancement NMOS transistor as vDS is increased.

The induced channel acquires a tapered shape and its resistance increases as vDS
is increased. Here, vGS is kept constant at a value > Vt. 8
 Derivation of the iD vs. vDS characteristic

Fig. 5.8 Derivation of the iD - vDS characteristic of the NMOS transistor.

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Derivation of the iD vs. vDS characteristic

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nMOS equations (1)

11
nMOS equations (2)

12
 nMOS characteristics

Source: 13
Kang, Leblebici, CMOS Digital Integrated Circuits, 3/e, McGraw-Hill
 nMOS output characteristics

Fig. 5.11 (a) An n-channel enhancement-type MOSFET with vGS and vDS applied and
with the normal directions of current flow indicated. (b) The iD - vDS characteristics
for a device with Vt = 1 V and k’n(W/L) = 0.5 mA/V2. 14
 Zooming in the output characteristics

Fig. 5.6 The drain current iD versus the drain-to-source voltage vDS for an
enhancement-type NMOS transistor operated with vGS > Vt.

15
 nMOS in saturation: iD vs. vGS

Fig. 5.12 The iD - vGS characteristic for an enhancement-type NMOS transistor in

saturation (Vt = 1 V and k’n(W/L) = 0.5 mA/V2).
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 channel length modulation

Fig. 5.15 Increasing vDS beyond vDSsat causes the channel pinch-off point to move
slightly away from the drain, thus reducing the effective channel length (by L).
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 Effect of channel length modulation

Fig. 5.16 Effect of vDS on iD in the saturation region. The MOSFET parameter VA is
typically in the range of 30 to 200 V.
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The device’s figure of merit

19
 The MOSFET as an amplifier

Fig. 5.31 Conceptual circuit utilized to study the operation of the MOSFET
as an amplifier.
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 Small signal analysis (AC)

21
Fig. 5.32 Small-signal operation of the enhancement MOSFET amplifier.
 Total component analysis (DC + AC)

Fig. 5.33 Total instantaneous voltages vGS and vD. 22

Total component analysis

23
Total component analysis

24
 Small signal models

Fig. 5.34 Small-signal models for the MOSFET: (a) neglecting the dependence of iD on
vDS in saturation (channel-length modulation effect); and (b) including the effect of
channel-length modulation modeled by output resistance ro = |VA|/ID. 25
gm and ro

26
Figure 5.24 Determination of gm and ro
Load Line Analysis Example (1)

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Load Line Analysis Example (2)

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Load Line Analysis Example (3)

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Practical Bias Circuits (1)
(DC operating point)

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Practical Bias Circuits (2)
(DC operating point)

31
Practical Bias Circuits (3): Load Line

32
Practical Bias Circuits (4): Load Line

33
Practical Bias Circuits (4)
(DC operating point)

34
Practical Bias Circuits (5)
(DC operating point)

35
Practical Bias Circuits (5)
(DC operating point)

36
An Alternative Bias Circuit (6)
(DC operating point)

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Common Source (CS) Amplifier
with Degeneration (1)

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Common Source (CS) Amplifier
with Degeneration (2)

39
Common Source (CS) Amplifier
w/o degeneration (1)

40
Common Source (CS) Amplifier
w/o degeneration (2)

41
Common Drain (CD) Amplifier

42
Common Drain (CD) Amplifier (2)

43
Common Gate (CG) Amplifier (1)

44
Common Gate (CG) Amplifier (2)

45
Common Gate (CG) Amplifier (3)

46
n-MOSFET
current mirror

47
 MOSFET current mirror characteristic

Fig. 5.42 Output characteristic of the current source in Fig. 5.40 and the current
mirror for the case Q2 is matched to Q1.

48
p-MOSFET current mirror

49
 Common source amplifier

Fig. 5.45 The CMOS common-source amplifier: (a) circuit; (b) i-v characteristic of the
active-load Q2; (c) graphical construction to determine the transfer characteristic; and
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transfer characteristic.
CS amplifier (small signal analysis)

51
Body effect (1)

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Body effect (2)

53
Body effect (3)

54
Body effect (4)

55
 Common gate amplifier

Fig. 5.47 The CMOS common-gate amplifier: (a) circuit; (b) small-signal equivalent
circuit; and (c) simplified version of the circuit in (b). 56
CG amplifier (small signal analysis)

57
CG amplifier (small signal analysis)

58
 Common drain amplifier

Fig. 5.48 The source follower: (a) circuit; (b) small-signal equivalent circuit; 59
and (c) simplified version of the equivalent circuit.
CD amplifier (small signal analysis)

60
CD amplifier (small signal analysis)

61
Junction FET (n-channel)

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Figure 5.38 n-Channel JFET.
 JFET for vDS=0 (n-channel)

Figure 5.39 The nonconductive depletion region becomes thicker with increased reverse bias.
(Note: The two gate regions of each FET are connected to each other.)

63
JFET for vGS=0 (n-channel)

Figure 5.42 n-Channel FET for vGS = 0.

64
 JFET for vGS=0 (n-channel)

Figure 5.41 Drain current versus drain-to-source voltage for zero gate-to-source voltage. 65
n-channel JFET: output characteristics

Figure 5.43 Typical drain characteristics of an n-channel JFET. 66

n channel JFET: iD vs. vGS

67
 Breakdown

Figure 5.44 If vDG exceeds the breakdown voltage VB, drain current increases rapidly. 68
Depletion mode n-MOSFET

Figure 5.46 n-Channel depletion MOSFET. 69

 Depletion n-MOSFET characteristics

Fig. 5.21 The current-voltage characteristics of a depletion-type n-channel MOSFET

for which Vt = -4 V and k’n(W/L) = 2 mA/V2: (a) transistor with current and voltage
polarities indicated; (b) the iD - vDS characteristics; (c) the iD - vGS characteristic in 70
saturation.
 n-channel FET

Figure 5.47 Drain current versus vGS in the saturation region for n-channel devices. 71
 p-channel FET

Figure 5.48 p-Channel FET circuit symbols. These are the same as the circuit symbols for
n-channel devices, except for the directions of the arrowheads.
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 iD vs. vGS for the various FET

Figure 5.49 Drain current versus vGS for several types of FETs. iD is referenced into 73
the drain terminal for n-channel devices and out of the drain for p-channel devices.
p-FET equations

74
p-FET output characteristics

75