Sultanate of Oman

Faculty of Economics, Management and Information Systems

University of Nizwa

A Comprehensive Study
of Intel Core i3, i5 and
Prepared by : Amal Sultan Almuqrishi
i7 family
ID: 14676412
Course Title: Advanced Computer System Theory - INFS501
submitted to: Dr. Said Younes
‘ Presentation (2) ’
 Intel core series ( i3, i5 and i7)

Outlines :
 Introduction of Intel core i3, i5 and i7 family
 General technical specification :

1. Micro-architecture
2. Number of cores
3. Clock rate
4. Cache memory
5. Addressable memory
6. I/O bandwidth
7. Performance GFLOP
8. Power dissipation

 Internal organization of the processor

 Internal/ External connectivity
 Cache organization
 Intel core series ( i3, i5 and i7)

Introduction
 Processor, that's also known as microprocessor, CPU or central processing unit, is the central
component of the PC. It is the brain that runs the show inside the PC and responsible for all directly or
indirect work. Obviously, it is one of the crucial components within the PC.

 A multi-core processor is a single computing component with two or more “independent” processors
(called "cores"). Shared memory model and distributed memory model are the two main ways to have
multiple cores interact.

 In November 2008 the first generation is released , called Nehalem micro-architecture.

 There are three types that support this architecture , Core i3, Core i5 and Core i7 , which have different
technical features that will be clear in next slide.

 These types divide based on the performance of each , for example, Core i3 (low-level), Core i5 (mid-
range) and Core i7 (high-end performance); thus, i7 processors are considered as the best processor
nowadays.
Intel Core i Generations (Tick Tock)
 Skylake 6th Generation

Skylake Generation

 Skylake is the sixth generation Core processor micro-

architecture, and was launched in August 2015.

 It comes after the Broadwell line and before Kaby Lake

(the last generation 7th).

 The main purpose of each generation:

1. Reduce the size of fabrication (in Skylake equals to
14 nm)
2. Improve the CPU performance as well as GPU
3. Decrease the power consumption
 Intel Core i Series Features

General Features of Intel core i3, i5 and i7

 Pure 64-bit architecture

 Micro-architecture: 6th generations that mentioned before
 Fabrication process in nm (45/32/14 nm)
 Multiple cores on single die (2-32 cores)
 CPU clock rate: 2- 4 GHz
 Addressable memory: 64GB.
 Virtual memory : 64 TB
 Power dissipation : 4.5- 100 W
 Cache memory: L1 cache 32 KB per core, L2 cache 256 KB, L3 cache
2-8 MB to 16 MB shared and L4 cache 64-128 MB
 Price: $42 - $434
 Intel Core i Performance

Performance of Intel core i in GFLOPS

 Intel core series ( i3, i5 and i7)

Organization of the processor

 Difference between FSB & DMI

 FSB – Front Side Bus

 It is a bus technology which used for communication and move the data that goes in and out of the
CPU.
 Used in early Intel core series processors such as Core 2 Quad/Duo processor
 It connects the processor with memory controller hub which has a connection with memory, PCIe,
video and IO devices (USB, Hard disk, Network etc).

 DMI – Direct Media Interface

 It is also a bus technology which used for communication and move the data that goes in and out of
the CPU.
 Used in current Intel core series processors such as Intel Core i3, i5 and i7 processors
 The main different, in the current models or architectures, is the CPU has different channels to connect
with RAM, PCIe and Platform controller hub that used to communicate with all other components .
 This way is better than FSB because it improve the performance and the data movement in less time.
Internal/ External connectivity
 Internal/ External connectivity

 Skylake micro-architecture improve the performance of the CPU by including beefed up front end,
optimized execution engine and add numerous number of smaller enhancements.

 It consists of DMI 3.0  rather than DMI 2.0 :

• It has four-lane DMI 3.0 interface that connect the CPU with the chipset
• It enhance the speed from 5.0 GT/s (2GB/sec) to 8.0 GT/s (~3.93GB/sec)
• It is also upgrade DMI from PCIe 2 to PCIe 3
• All these improvement in this architecture requires to reduce the motherboard traces among
the processor and chipset 7 inches rather than 8 inches; therefore, it maintains the signal
speed and integrity

 Skylake support the last to versions of DDR4 and DDR3L .

 The motherboard designer choose only one version (DDR4 or DDR3L ) but not both.

 It also support 16 PCI Express 3.0 lanes in order to use for directly connected devices to the CPU.
These PCIe 3.0 split to x16, x8/x8 or x8/x4/x4 with the main motherboard design.
 Intel core series ( i3, i5 and i7)

Difference Between DDR3 and DDR4 RAM :

 Internal/ External connectivity

SKylake supports a new chipset which is called

“dubbed Z170”.

• Intel Z170 maintains dual channel memory

that has four dims in total.
• It also supports a very large number of USB
ports.
• It has14 ports in total which divide as
follows :
• 10 of which are USB 3.0
• 4 are USB 2.0.

• Z170 chipset consists of six SATA 6Gbps

ports and 20 lanes of PCI express
connectivity. In addition, it includes three
SATA Express x2 interfaces and to four M.2
interfaces. 
Internal organization of the processor

 In Front End part:

 Increase the legacy pipeline delivery to 5 µOPs
 Increase the IDQ delivery to 6 µOPs
 Support 2.28x larger allocation queue that has 64/thread
 It also improves the performance of the branch
prediction unit

 In Execution Engine part:

 Increase the re-order buffer to 224 entries
 Increase the scheduler to 97 entries and the Integer
Register File to 180 entries
 Increase the store buffer to 56 entries

 In the Memory part:

 There is a significant change in the number of ways in
the second level of cache (from 8-way to 4-way set
associative).

 TLBs
 ITLB has 8-way associative where 4KB page translations
was changed
 STLB has 12-way associative in which 4KB+2M page
translations was changed
Cache organization
 Cache organization

Intel Core Caches

 First level cache (L1)

 L1 Instruction cache
 It’s size equals to 32kB
 Supports 8-way set associative
 Supports write-back policy
 Shared by the two threads, per core

 L1 Data Cache
 It’s size equals to 32kB
 Supports 8-way set associative
 Supports write-back policy
 Shared by the two threads, per core
 load bandwidth equals to 64 Bytes/cycle
 store bandwidth equals to 32 Bytes/cycle
 Cache organization

Intel Core Caches

 Second level cache (L2)

 It’s a new cache feature that introduced first in

Nehalem micro-architecture
 It’s a unified that holds code and data
 It’s size equals to 256 kB per core
 Supports 8-way set associative
 Supports write-back policy
 Enhance the Performance of CPU:
 Very low latency in which 12 cycle load-to-use
 Enhance the Scalability of CPU:
 The pressure on shared cache is reduced when the
number of cores is increased
 Cache organization

Intel Core Caches

 Third level cache (L3)
 Shared among all cores in the processor
 It’s size equals to 8 MB per core
 Supports 16-way set associative
 Enhance the Performance of CPU:
 The L3 cache must have the address residing in L1/L2
 Enhance the Scalability of CPU:
 To satisfy the future purpose needs of increase L3 size
 To change core size with change core counts
 Support inclusive cache policy rather than exclusive for
best performance

 Fourth level Cache (L4)

 It’s size equals to 128 MB per core
 Sometimes called eDRAM cache
Difference between exclusive & inclusive
Difference between exclusive & inclusive
Difference between exclusive & inclusive
Difference between exclusive & inclusive
 Difference between exclusive & inclusive

• L3 cache has a set of “core valid” bits per cache line

where each bit represents a core
• If the L1/L2 of a core may contain the cache line, then
core valid bit is set to “1”
• If no bits are set, there is no needed to snoop of cores
• If more than 1 bit is set, line cannot be in Modified
state in any core

 Enhance the scalability of CPU

 More cores/sockets does not boost snoop traffic
seen by cores
 Enhance the Latency of CPU
 Decrease effective cache latency by eliminating
cross-core snoops in the common case
 Reduces snoop response time for cross-socket
cases
Difference between exclusive & inclusive
 Intel core series ( i3, i5 and i7)

Which Intel Core i3, i5 or i7 is the best?

 A quad-core CPU will perform

much better than a dual-core CPU with
hyper-threading!
 The Intel Core i5 series does not support
hyper-threading.
 Turbo Boost: i7 > i5 > i3.
 Whereas, Intel Core i3 series does not
support Turbo Boost.
Intel core series ( i3, i5 and i7)
 Intel core series ( i3, i5 and i7)

Summary:
 Introduction of Intel core i3, i5 and i7 family
 General technical specification :

1. Number of cores
2. Frequency
3. Cache memory
4. Addressable memory
5. Micro-architecture
6. I/O bandwidth
7. Performance GFLOP
8. Power dissipation

 Internal organization of the processor

 Internal/ External connectivity
 Cache organization
 Intel core series ( i3, i5 and i7)

References
1. http://www.extremetech.com/gaming/212661-idf-2015-intel-unveils-skylakes-new-gpu-architecture
2. https://www.pcper.com/image/view/60506?return=node%2F63627
3. https://www.pcper.com/reviews/Processors/Intel-Skylake-Processor-Architecture-Overview-Scaling-tablets-servers
4. http://www.anandtech.com/show/9485/intel-skylake-z170-motherboards-asrock-asus-gigabyte-msi-ecs-evga-super
micro
5. https://en.wikichip.org/wiki/intel/microarchitectures/skylake
6. http://wccftech.com/intel-skylake-socket-lga-1151-z170-chipset/
7. https://en.wikichip.org/wiki/File:6th_Gen_Intel%C2%AE_Core%E2%84%A2_processor_family_and_Intel%C2%
AE_Xeon%C2%AE_processors_Factsheet.pdf
8. http://www.intel.com/content/www/us/en/design/personal-computers/platforms/skylake-h/overview.html
9. https://en.wikipedia.org/wiki/Skylake_(microarchitecture)#Architecture
10. http://www.bit-tech.net/hardware/cpus/2008/11/03/intel-core-i7-nehalem-architecture-dive/2
11. http://slideplayer.com/slide/4145290/
12. http://www.ni.com/white-paper/11266/en/
13. http://slideplayer.com/slide/2811832/
 Intel core series ( i3, i5 and i7)

Finished

Thanks