Unit – 2

Microelectronic Technology
for MEMS
MEMS & ICs Fabrication Cycle:
MEMS & ICs Fabrication Cycle:
Design Part:
1. Make the solid models of the device.

 Solid model means, you were going to use a certain material may
be that is crystalline material or amorphous or some other materials
like ceramic materials.

 So that material you first model it and free-form geometry (irregular

shape).

 So in irregular shape body or material, simulation is little bit

difficult and only you have to use the numeric tool is the only
technique by which we can simulate any kind of the irregular shape
or free shape body.

 3D solid model basically the finite element model.

MEMS & ICs Fabrication Cycle:
Design Part:
2. Coupled many other properties.

 Because in MEMS involves the electrical, mechanical,

fluidic properties also.

 So then you have to use certain simulators and using

that simulator we can couple the electrical,
mechanical, fluidic, kinematic properties.

 Then you couple these properties with that particular

solid body then you simulate it and when you are
satisfied with the simulation result.
MEMS & ICs Fabrication Cycle:
Design Part:
3. Making of the layout.
4. Mask making and that is generation of
physical mask or direct write pattern.

 So direct write pattern sometimes we use it for

making the master mask and then we get step and
repeat camera and using that we get the regular
mask which is used for fabrication.

 Now once the mask is fabricated, then design part

is over.
MEMS & ICs Fabrication Cycle:
Fabrication Part:
1. Fabrication done in ‘Fab lab’ and there it starts from the crystal.

2. We have the material that material in case of silicon, the single crystal silicon is
used.

3. In case of MEMS technology, the mainly we require the deposition of material,

patterning of the material and removal of the material. So this process, the cycle
continued.

4. On the wafer you deposit certain material.

5. Then you have to transfer certain pattern. That is known as a pattern transfer
and that is known lithography. By using the lithography technique the pattern is
transferred.

6. After transferring the pattern on the wafer, then selectively you have to remove
some of the materials. Removal of selective of the material and that is basically
the etching or machining.
MEMS & ICs Fabrication Cycle:
Fabrication Part:
7. So maybe once, twice, thrice, so repeatedly depending on how complex is
your process. So how complex is your device structure, depending on that,
this cycle will continue.

8. The wafer having different kinds of structure and different kind of sensing or
pick up electronic circuit on the structure.

9. Next is probe testing by using the probe art machine.

10. Before bonding, testing is done with the help of certain probes then you have
to do the sectioning.

11. Sectioning means small pieces you are getting from the whole wafer and then
is the individual dye.

12. Individual dye is put on the package base. So that connection is known as
assembling to the package.
MEMS & ICs Fabrication Cycle:
Fabrication Part:
13. After the bonding is over, then you have to seal the package is known as
Package sealing.

14. So here you are doing one test which is known as the probe test and here is the
final test.

15. Final Test: So number of devices you are getting here which shows the correct
results.

16. The Number may reduce here because of the intermediate certain process step.

17. In case of IC packaging and testing, the loss is less. But in case of MEMS
devices, damage is more because use of very thin membrane or thin cantilever
or thin structure.

18. So special probing sectioning and handling procedures is to be adopted to

protect a release part.
Difference in VLSI package & MEMS package:
 So in case of VLSI, the complete part is sealed and packaged and the
external leads you can connect by wire using some external wire or in PCB
board you can put it.

 But in MEMS packaging, so some portion you are covering and some
portion you should not cover. Because that will be in touch with the
external volt or physical volt.

 For example, in case of gas sensor, the sensing element must expose to the
environment that you cannot keep it inside the packet. Similarly things are
not there in case of VLSI. The whole complete thing you can seal it.

 So in MEMS, some portion which requires the interaction with the

environment has to be taken outside the sealed portion.

 So that is the difference in the normal VLSI package and the MEMS
package. So then you have to final test and something in a test if it
qualifies, then only you can go for the marketing.
MEMS Technology Steps
MEMS Technology Steps:

1. Crystal growth
2. Thin film deposition process
3. Pattern transfer / Lithography
4. Etching of materials
5. Doping semiconductors
6. Metallization
7. Bonding and Packaging.
Crystal Growth
Crystal Growth
Crystal Growth (Silicon Wafer Fabrication or Czochralski’s Technique or CZ Process):

 Crystal growth basically silicon wafer fabrication.

This technique is known as Czochralski’s Process or
CZ process.

 The Czochralski process is a method of crystal

growth used to obtain single crystals ingot of
semiconductors (e.g. silicon, germanium and gallium
arsenide), metals (e.g. palladium, platinum, silver,
gold), salts and synthetic gemstones.

 The process is named after scientist J.Czochralski,

who invented the method in 1915.
CZ Process:

 The CZ Process begins with pure silicon powder.

 A lot of pure silicon is placed in a large crucible that is made of

fused quartz.

 The crucible is then put in a vacuum chamber, which is sealed and

then filled with some conveniently inert gas, usually Argon (Ar).

 The chamber is then heated up to 1500 °C to melt the silicon.

 When the silicon is nicely melted, a small seed crystal mounted on

the end of a rotating shaft is slowly lowered until it just dips
below the surface of the red-hot silicon melt.

 The shaft rotates counter clockwise (anti-clockwise) and the

crucible rotates clockwise.
CZ Process:

 Now, the rotating rod is drawn upwards very slowly, allowing a

cylindrical ingot.

 The orientation of the crystal where it is 100 or 111 or 110, all

things depends on the seed crystal.

 Ingot side cooling is also very important. So when you are cooling
the ingot, so automatically the impurities are not dissolved.

 By segregation it will come into the hottest zone from the cold
zone.

 At the end of the process, those particular ends contain impurities

sliced it, so that the other portion will be pure.

 The finished crystals are called Boules.

Slicing and Polishing:

 By using diamond cutter, slicing the boules into thin and

circular wafers.

 After making thin slices, using certain fine green carbon

powders used for polishing along with some fluid in
polishing machine.

 Using 3 to 4 wafers and certain rotation was giving using

certain carbonate powder or small particle carbon or the
diamond particles in the cleaning or polishing material.
To get the polished single crystal silicon.

 Diced the single crystal silicon into the little silicon chips
from which all silicon semiconductor chips are made.
CZ Process: Si wafer fabrication
 Thin Film Deposition Processes

Thin Film: A thin film is a layer of material ranging from

fractions of a sub-nanometer to several micrometers in
thickness.
Spin Casting Technique:

Principle:
Spin casting technique is a procedure used to deposit
uniform thin films to flat substrates (wafer) by fast rotation
of the surface using centrifugal force.
Spin Casting Technique:

Process:
 Usually a small amount of coating material is applied on the center of the substrate
through the nozzle, which is either spinning at low speed or not spinning at all.

 The substrate is then rotated at high speed in order to spread the coating material by
centrifugal force.

 A machine used for spin coating is called a spin coater or spinner.

 Rotation is continued while the fluid spins off the edges of the substrate, until the
desired thickness of the film is achieved.

 The applied solvent is usually volatile, and simultaneously evaporates.

 The higher the angular speed of spinning, the thinner the film.

 The thickness of the film also depends on the viscosity and concentration of the
solution, and the solvent.

 It is also known as “Spin Coating”.

Spin Casting Technique:

Advantages:
1. Spin casting can be done at atmospheric pressure and is very cheap.
2. Film thickness of up to several hundred nanometers can be obtained.
3. The thickness can be controlled. (But not as well as with
evaporation).
4. The thickness is fairly uniform across the substrate (expect at the
edges).

Disadvantages:
5. The Whole substrate is coated. Patterning must be done separately.
6. Films have a high stress value, less dense and more suitable to
chemical attack.
7. Difficult to make multilayer structures because the deposition of one
layer can dissolve the layer underneath.
Vapor Deposition
Working principle of Evaporator:

 Wafers are loaded into high vacuum chamber that is

commonly pumped with either Diffusion pump or a Cryo-
pump.

 The charge or material to be deposited is loaded into a

heated container called the crucible.

 The crucible is heated by means of embedded heater and an

external power supply.

 When it becomes hot and when the temperature exceeds the

melting point of this particular material, it will evaporate.

 This is the basic principle of a simple Evaporator.

Vapor Deposition:

Vapor deposition is a coating technique, involving

transfer of material on an atomic level.

There are two types of vapor deposition techniques:

1. Physical Vapor Deposition (PVD)
2. Chemical Vapor Deposition (CVD)
Physical Vapor Deposition
(PVD)
 Physical Vapor Deposition (PVD)

 Physicalvapor deposition (PVD) describes a variety of vacuum deposition

methods which can be used to produce thin films and coatings.

 In Physical vapor deposition (PVD), the material goes from a condensed

phase (as precursor )to a vapor phase and then back to a thin film
condensed phase.

 The most common PVD processes are Sputtering & Evaporation.

 PVD is used in the manufacture of items which require thin films for
mechanical, optical, chemical or electronic functions.

 Examples include semiconductor devices such as thin film solar panels,

aluminized PET film for food packaging and balloons, and titanium
nitride coated cutting tools for metalworking.

 No chemical reactions occur during the deposition process and the process
is perform under vacuum.
 Steps Involved in Physical Vapor Deposition (PVD):

Evaporation:
The source material to be coated or Source
(Solid / Liquid)
deposited is incident with high
energy sources like an electron / Evaporation
ion beam.
Gas Phase
Transport:
Transport &
The atomic vapors are carried Deposition
from target surface to the surface
Solid Phase
of the substrate requiring coating.
(Changes in Physical
Morphology)

Deposition:
Fig: Flow Chart of PVD
It involves coating bulid-up on Technique
surface of the substrate.
Types of PVD’s:
Types of PVD’s:
Advantages of PVD:
1. Materials can be deposited with improved properties compared to the

substrate material.

2. Almost any type of inorganic material can be used as well as some

kinds of organic materials.

3. Great variety of coating.

4. High wear resistance.

5. Low frictional co-efficient.

6. No toxic reaction product.

7. Excellent adherence.

8. Uniform Coating Thickness.

Disadvantages of PVD:
1. It is Line in Sight technique meaning that it is extremely
difficult to coat undercuts and similar surface features.

2. High Capital Cost.

3. Some processes operate at high vacuums and temperature

requiring skilled operators.

4. Processes requiring large amount of heat require

appropriate cooling systems.

5. The rate of coating deposition is usually quite slow.

Applications of PVD:
PVD coating are generally used to improve Hardness,
Wear resistance and Oxidation resistance.

Thus such coating use in wide range of applications

such as :
1. Aerospace
2. Automotive
3. Surgical/Medical
4. Dies and Moulds for all manner of material
processing
5. Cutting Tools
6. Fire Arms
 Thermal Evaporation Deposition

 Evaporation is a common method of thin-film deposition.

 The source material is evaporated in a vacuum.

 The vacuum allows vapor particles to travel directly to the target

object (substrate), where they condense back to a solid state.

 Evaporation is used in microfabrication, and to make macro-scale

products such as metalized plastic film.

 Any evaporation system includes a vacuum pump.

 It also includes an energy source that evaporates the material to be

deposited.

 Many different energy sources exist.

Thermal Evaporation Deposition
 Types of Evaporations:

Depending on different energy sources used to heat

crucible in evaporator.

They are:-
1. Resistive heating evaporation
2. RF induction heating evaporation
3. Electron beam evaporation (e-beam Evaporation)
 Resistive Heating Evaporation:

Working principle:
Resistive evaporation is accomplished by passing
a large current through a resistive wire or foil
containing the material to be deposited.

 The heating element is often referred to as an

"evaporation source".
 Evaporation sources in this evaporation is Wire
type or Boat Type evaporation sources.
 Resistive Heating Evaporation:

 Wire type evaporation sources are made from tungsten wire and can
be formed into filaments, baskets or spiral shaped sources.

 This kind of arrangement is useful if the source is in the form of rod

or stick.

 But if the source is in the form of the powder, then this kind of
arrangement will not use.

 Then we use dimpled boat arrangement where in the central there is

a small boat and there you can put the charge (powder form) and
then if you apply current to this boat, so it will be heated and
evaporation will take place.

 Boat type evaporation sources are made from tungsten, molybdenum

or ceramic type materials capable of withstanding high temperatures.
(~2000 C)
 Resistive Heating Evaporation:

Advantages:
1. It is very simple and inexpensive technique.
2. There is no ionizing radiation takes place from
this resistivity evaporation.

Disadvantages:
3. Charge requirement is very small.
4. Short filament life.
5. Contamination from the heating element.
6. Low deposition rate.
RF Induction Heating Evaporation:

Working:
 The crucible is made of Boron Nitride material.

 Because Boron Nitride melting temperature is

very high. (~2973 C)

 Basically, if you use the inductive coil it should

not be metal. It is an insulated boron nitride also.

 So it contains the molten charge and the RF

induction heating is used to melt this charge.

 Inductive Coils are wound around crucible and RF

power is run through coil.

 RF induces eddy currents in the charge causing it

to heat.
 RF Induction Heating Evaporation:

Advantages:
1. High deposition rate.
2. Accommodate more charge compare to resistive heating
evaporation.
3. The volume of the material in the crucible is large compared to
the filament which is used in resistivity operation technique.
4. Can have evaporation for long time.
5. Larger thickness of the deposited film on wafer by using
inductive technique.
6. No ionizing radiation.

Disadvantages:
7. The molten material is in contact with the crucible then the
conduction or contamination from the crucible will be there.
8. Mandatory use of crucible.
e-beam Evaporation
E-Beam Evaporation:
 Working Principle of E-Beam Evaporation:

 It contain filament from which the electrons are ejected,

basically the cathode rays
and
accelerated through that accelerating grid
and
guiding the beam through the electrostatic deflecting plates or
bending magnet using electrostatic or electromagnetic field
then
it will be focused to a point and this high energy electron beam
is incident on the charge
and
as a result of which locally heat will be transferred to the
charge
and
locally it will be melted so and it will be evaporated.
 Particular focused beam scan over the surface so only surface
will melt and from there evaporation will take place.

 So since the complete material is not going to melt, so there is no

chance of contamination from the crucible.

 Because local melting is taking place and almost no

contamination from the crucible.

 Same electron beam can be used for heating the material from
one crucible to second crucible to third crucible (different
crucibles). So in that way one by one you can just deposit the
material and make alloy material.

 We can use two crucibles, two electron beam source so different

beam will be incident on the different material.

 This is the basic principle of Electron beam heating evaporation.

 E-Beam Evaporation:

Advantages:
1. Almost no contamination from the crucible.
2. Use large source because depending on the capacity of the crucible.
3. Uniform thick metal films because you are using large amount of
charge.
4. Purity of the film will be good compared to resistive and inductive
techniques.
5. Co-evaporation to form alloy and multiple sources.

Disadvantages:
6. For accelerating the electron beam you need very high voltage nearly 10
Kilo Volt voltage is required.
7. High acceleration voltage is incident on any metal produce x-rays. Since
x-rays will damage substrate and dielectrics, e-beam evaporators cannot
be used in MOS.
8. Ionization radiation produces damages.
9. If that beam is not properly focused, there may be secondary ion
emission from other periphery materials; it may contaminate the film
also.
E-Beam Evaporation:
Sputtering
Sputtering:
Definition:
Sputtering is a technique used to deposit thin film of a material
onto a surface of a substrate by creating gaseous plasma and then
accelerating the ions from this plasma into some source material
(target).

Source material is gradually destroyed by the arriving ions via

energy transfer and is ejected in the form of neutral particles
(either individual atoms or cluster of atoms/molecules).

 Sputtering is developed as a thin film deposition technique by

Langmuir in 1920.
 Sputtering alters the physical property of any material by etching
mechanism.
 The key principal of sputtering is “Energy and Momentum
Conservation” .
Sputtering:
Sputtering:
Fundamental Steps for Sputtering Process:
1. A negative electrical potential is applied to the target material to be sputtered
which act as cathode and the positive anode or ground is substrate.

2. This electrical potential will cause free electrons to accelerate.

3. When these electrons collide with a process gas atom (inert gas – Ar), they
strip an electron from the gas atom and create a positively charged gas ion
(Ar+).

4. The positively charged ion is then accelerated towards the target.

5. This ion carries enough energy with it to “knock off” or “Sputter” some of
the material.

6. Target material will then collect on the substrate.

7. Additionally, a plasma glow is created when the ions recombine with free
electrons into a lower energy state. During processing, this light is
sometimes called as plasma glow.
Fundamental Steps for Sputtering Process:
Ion surface interaction depends on the ion beam
energy:
 < 5 eV : Absorption or reflection
 5 – 10 eV : Surface damage and migration
 3 – 10 keV : Sputtering
 > 10 keV : Ion implantation
Sputter Yield (S):
Definition:
It is a ratio of Number of particles emitted from
target to the Number of incident particles.

 The rate of deposition of thin film is proportional

to the sputter yield (S).
Limitations for Sputtering Process:
1. The particular material to be sputtered is made into a disk
(target) that is thermally bonded to the cathode.

2. No powder, no rod or no plates is used in case of sputter.

3. Cathode and Anode in a sputtering system are closely

spaced (<10 cm).

4. Argon plasma is sustained between the electrodes.

5. The closer the target to the wafer the higher the deposition
rate.

6. The gas pressure in the chamber is about 0.1 Torr.

Limitations for Sputtering Process:
7. Plasma chamber is designed such that a high density of ions
strikes a target containing the material to be deposited.

8. Simple DC sputtering is used for elemental metal deposition.

9. For deposition of insulating material such as silicon dioxide,

silicon nitride, RF plasma is used. Because metals can be used as
a cathode.

10. Choice of a particular ion. The atomic weights of the ions and the
target atoms should be close.

11. Suitable cathode voltage, so that the ions will have sufficient
energy for sputtering.

12. Consistent substrate voltage and temperature for a clean film.

Advantages of Sputtering Process:
1. Sputtering technique will have better step coverage than evaporation. Addition of
magnetic field improves step coverage.

2. It induces less radiation damage than E-beam technique.

3. Sputtering technique not used 10 KV or higher electron beam.

4. High deposition rate offered by modern design. If you design the sputtering
chamber properly, the evaporation rate will be higher.

5. Capable of depositing and maintaining complex alloy composition.

6. Capable of depositing refractory metals at high temperature.

7. Capable of maintaining well controlled uniform deposition on large wafers.

8. High energy plasma overcomes temperature limitation.

9. 9. Co-sputtering allows us to control the atomic ratio of the species.

Disadvantages of Sputtering Process:
1. Trapping of gas molecules causes anomalies in its
mechanical properties.

2. Stress and mechanical properties of thin film

depends on specific sputtering conditions.
DC Sputtering Process:
1. Sputtering can be achieved by
applying a large DC voltage
(approx. 2000v).

2. A plasma discharge is
established & the Ar ion will
be attracted to an impact
sputtering of the target atoms.

3. In DC sputtering the target

must be electrically conducted
otherwise the target surface
will charge with the collection
of ion & repels other Ar ion.
RF Sputtering Process:
1. RF sputtering will allow the
sputtering of target that are
electrical insulator.

2. The target attracts Ar ions

during one half of the cycle.

3. The electrons are more

mobile & build up a negative
charge called as self bias
which helps in attracting Ar
ions which does the
sputtering.
Chemical Vapor Deposition
(CVD)
Chemical Vapor Deposition (CVD):
Definition:
Chemical Vapor Deposition (CVD) is defined as a
formation of a non-volatile solid film on a heated
substrate by the reaction of vapor phase chemicals
(reactants) that contains the required constituents.

 The reactant gases are introduced into a reaction chamber

and are decomposed and reacted at a heated surface to
form the thin film.
CVD Principle:
 Fundamental principle is that a chemical reaction
takes place between the source gases and the
substrate.

 The product of that is a solid material that

condenses on all surfaces inside the reactor.

 Precursor gases (often diluted in carrier gases) are

delivered into the reaction chamber at
approximately ambient temperatures.
CVD Sequential Steps:
CVD reaction follows the following steps:

1. Transport of Reactants via forced convection to reaction region and Transport

of the reacting gaseous species via Diffusion to the substrate surface.

2. Adsorption of the species on the substrate surface.

3. Surface processes like Surface diffusion of the precursor at growth site.

Reaction without diffusion may leads to rough surface.

4. Heterogeneous reaction (Surface Chemical reaction) catalyzed by the substrate

surface.

5. Desorption of by-products from the surface.

6. Transport of by-products away from the substrate surface back to the gas
stream.

7. Transport of by-product by forced convection away from the deposition region.

CVD Sequential Steps:
CVD Sequential Steps:
 These steps for CVD process are sequential; so
the one step that occur at the slowest rate will
determine the deposition rate and is called The
”Rate-Limiting Step”.

 It the deposition process is dominated by steps 2,

3 or 4 as above, it is a “Surface Controlled
Process”.

 It a deposition process is dominated by step 1, it

is called a “Mass-Transport Controlled
Processes”.
CVD Coating Characteristics:
 CVD coating are usually only a few microns
thick and are deposited at fairly slow rates,
usually of the order of a few hundred microns per
hour.

 CVD coatings are typically:

 Fine Grained.
 Impervious.
 High Purity.
Applications of CVD:
CVD is an extremely popular and is preferred deposition method for
a wide range of materials.

1. Poly silicon film deposition in poly crystal silicon using CVD

technique.
2. Dielectric film deposition like silicon dioxide (SiO2) and silicon
nitride (Si3N4).
3. Single crystal epitaxial growth is also a CVD process.
4. Metal film deposition (W).
5. Low-temperature Insulators over Metals, Nitride Passivation.
6. Coating for variety of applications such as wear resistance, corrosion
resistance, high temperature protection, erosion protection and
combinations.
7. Semiconductors and related devices – ICs, Sensors and
Optoelectronic devices.
8. Optical Fibres – For Telecommunications, Nanomachines etc.,
Advantages & Disadvantages of CVD:
Advantages:
1. High growth rate possible and good reproducibility.
2. Can deposit materials which are hard to evaporate.
3. Can grow epitaxial films.
4. Generally better film quality, more conformal step
coverage.

Disadvantages:
5. High temperature process.
6. Complex processes, toxic and corrosive gasses.
7. Film may not be pure (Hydrogen incorporation).
Types of CVD: (Depending upon Reactors)
Types of CVD: (Depending upon Reactors)
Types of CVD Processes:
1. APCVD (Atmospheric Pressure CVD)
2. LPCVD (Low Pressure CVD)
3. PECVD (Plasma Enhanced CVD)
 Hot wall
 Parallel type
 Single wafer
4. MOCVD (Metal Organic CVD)
5. LCVD (Laser CVD)
6. PCVD (Photochemical CVD)
7. CVI (Chemical Vapor Infiltration)
8. CBE (Chemical Beam Epitaxy)
Simple Thermal CVD:
 It contains the susceptor on which the wafers are kept and heated.
 Susceptor means container of the silicon wafer.
 So if you heat it then gas is flown onto the surface of the wafer.
 So in this reaction chamber at high temperature the gas will decompose and the
solid material will deposit on the substrate.
 Decomposition of Silane gas (SiH4) to form poly-silicon at susceptor
temperature.

SiH4(g)  SiH2(g) + 2H2(g) at high temperature

 The reaction should be heterogeneous where deposition reactions occur at the

surface of the wafer.

SiH2(g) ↔ SiH2(a) amorphous (a), gases (g)

 Once the molecule is on the surface, it is first ‘adsorbed’

SiH2(a) ↔ Si (Solid) + H2(g)

 After absorption solid material is coming out and it is deposited at the surface of
the wafer.
Simple Thermal CVD:
Atmospheric Pressure CVD (APCVD):
1. APCVD reactors operate in mass transport
limited region.

2. So they are designed such that equal flow of

reactants is delivered.

3. This ensures uniform film deposition.

4. This is done by placing the wafer horizontally

and then moving them under gas stream.

5. They are used for depositing low temperature

oxide films.

6. Samples are carried through the reactor on a

conveyer belt.

7. Reactant gases flowing through the centre of

the reactor are containing by gas curtains
formed by fast flow of nitrogen.
APCVD:
Advantages:
1. Simple.
2. High deposition rate.
3. Low Temperature.

Disadvantages:
4. Poor step coverage.
5. Particle contamination.
6. Require excess wafer handling.

Application:
◦ Doped & Undoped low temperature oxides.
Low Pressure CVD (LPCVD):
1. The reactor consists of a quartz tube heated
by a three zone furnace.

2. Gas introduced from one end & pumped out

from the other end.

3. Wafers stand vertically, perpendicular to the

gas flow.

4. They are placed in a quartz holder.

5. It operates in a surface reaction rate limited

mode.

6. Therefore supply of equal flux of reactants is

not required.

7. Therefore geometry can be such that it can

accommodate a large no. of wafers approx
200 wafers at a time.
LPCVD:
Advantages:
1. Excellent purity.
2. Comfortable step coverage.
3. Large wafer capacity.

Disadvantages:
4. High Temperature.
5. Low Deposition Rate

Application:
◦ Doped & Undoped high temperature oxides.
◦ Silicon Nitride.
◦ Polysilicon.
Plasma Enhanced CVD (PECVD):
1. PECVD system use an ‘RF induced’ glow discharge to transfer
energy into reactant gases.

2. This procedure allows the substrate to remain at a low

temperature than APCVD & LPCVD.

3. Types:
a. Parallel plate type.
b. Hot wall type.
c. Single wafer type..
Parallel Plate PECVD:
1. Reaction chamber is cylinder &
constructed of Al- coated stainless steel.
2. There are Al plates on the top & bottom.
3. Samples lie on the grounded bottom
electrode.
4. RF is applied to the top electrode which
creates a glow discharge between 2 plates.
5. Gases flow radically through the
discharge.
6. Resistance heater heat the bottom,
grounded electrode to a temperature
between 100- 400°C.
7. Gases are flowing from outer edges to the
center.

Advantages:
◦ Low temperature deposition
Disadvantages:
◦ Wafer must be loaded & unloaded individually.
◦ Chance of contamination.
Compare PVD & CVD
S.No Physical Vapor Deposition (PVD) Chemical Vapor Deposition (CVD)
1 Deposition occur by Condensation. Deposition occur by chemical reaction..
The material that is introduced onto the
2 substrate is introduced mostly in solid Material is introduced in a gaseous form.
form.
Atoms are moving and depositing on the The gaseous molecules will react with the
3 substrate. substrate
PVD coating is deposited at a relatively low CVD uses high temperatures in the range of
4 temperature (around 250°C~ 450°C) 450° C to 1050° C.
5 Low Deposition Rate High Deposition rate
6 High capital cost. Low capital cost.
7 Line-of-sight Process. Avoids Line-of-sight
Safer than CVD, due to the absence of
8 toxic precursors or by-products.
Possibility of Toxicity of precursors.

9 Non-Uniform Coating Uniform Coating

PVD is suitable for coating tools that are CVD is mainly used for depositing compound
10 used in applications that demand a tough protective coatings.
cutting edge.
Coating thickness 3 -5 micrometer.
11 Coating thickness up to 20 micrometer.

Types of PVD Techniques: E-beam, CVD Techniques are LPCVD, APCVD,

12 Sputtering, Evaporation etc., PECVD, LCVD etc.,
 Pattern Transfer /
Lithography

Lithography: It comes from two Greek words “lithos”

means “Stone” and “graphein” means “writing a pattern on
stone”.

Lithography is the transfer of geometric shapes on a mask

to a smooth surface.
 Photolithography

Photolithography: It is a process of transferring some

pattern from photographic mask to a resultant pattern on a
wafer.
Photolithography:
 Transfer of any kind of structure from mask level onto the
wafer level is known as photolithography.

 In photolithography process, a photosensitive polymer film is

applied on silicon wafer. This photosensitive polymer film is
known as photo resist.

 The photosensitive polymer film is dried and then exposed

with the proper geometrical patterns through a photo mask to
UV light or other radiation and finally developed.

 Use UV radiation for exposing the film, then it is known as

UV lithography.

 Use deep ultraviolet rays for exposing the film then it is

known as deep ultraviolet lithography.
Photolithography:
 Use X-ray radiation for exposing the film, then it is known as X-ray lithography.

 Use electron beam for exposing the film, then it is known as e-beam lithography.

 Use ion beam for exposing the film, then it is known as ion beam lithography.

 Resists are made sensitive to

a. UV Light
b. Electron beam (e-beam)
c. X-ray
d. Ion beam

 Depending on the polymer used, either exposed or non-exposed area of the film
is removed in the developing process.

 Photolithography requires resists, spinner, mask, mask aligner, developer

solution, baking ovens etc.,

 It is a “subtractive method” of pattern transfer technique.

Photo Resist:
 Photo resist is a light sensitive liquid used to form thin film.

 There are two kinds of photo resists:

1. Positive photo resists.
2. Negative photo resists.

Positive Photo resist:

Positive photo resist becomes more soluble in developer solution when they are exposed to
radiation.
 
Negative Photo resist:
Negative photo resist becomes less soluble in developer solution when they are exposed to
radiation.

Fig: Photo Resist Behaviour

◦ The structure obtained in case of Positive Photo resist is complementary to the structure obtained
in case of Negative Photo resist.
Various Steps of Pattern Transfer Techniques:
Various Steps of Pattern Transfer Techniques:
Step 1: Preparation of Photo Mask
◦ Reticle generation and subsequently reduced image repeated to create the final mask.

◦ Need to have certain information which contains the geometrical feature

corresponding to a particular mask is electronically entered with the help of layout
editor software (LASI layout editor).

◦ Emulsion or chromium coated glass plate is exposed as per the data and then
developed to obtain the ‘Photo Mask’.
 
Step 2: Pattern Transfer
◦ Transfer the pattern from mask plate onto the substrate.
◦ It uses spinner, photoresist, exposure tool, developer solution and sintering oven etc.,
 
Step 3: Alignment and Exposure
◦ In case of MEMS devices or micro sensors require lithography on both sides with the
help of two different masks.
◦ In case of MEMS devices uses double sided alignment technique by using double
sided mask aligner machine.
Various Steps of Pattern Transfer Techniques:

Step 4: Development and Baking

◦ After exposure of the film need to develop just similar
to the photographic plate developing.

◦ During developing either the soft portion or the hard

portion depending on which kind of photo resistor
going to use and will get the pattern.

◦ After pattern then sinter whole thing.

 
Step 5: Etching
◦ Next is etching to create certain windows or structure
finally.
 Lithography Steps:
Steps Comments

Adhesion promoter HMDS is used

Resist application Dispensing and Spinning

Resist dry To remove Solvents

Resist pre-bake To harden and improve adhesion

Expose Define image in resist

Resist develop Remove unwanted resist

Resist post-bake Improve adhesion

Resist must not react with etch or peel from surface (SiO 2 –
Etch oxide
HF)
Oxygen plasma (Dry etching) or Hot acid (-ve resist – H2O2
Resist removal and H2SO4 and +ve resist – Hot Acetone or special purpose
photo remover solution)
 Lift-Off Technique

Lift-off technique is a method of creating structures

(patterning) of a target material on the surface of a substrate
(wafer) using a sacrificial material (photoresist).
Lift-off Techniques:
 Lift-off technique is known as “Additive method”
of pattern transfer.

 Lift-off technique is used in some cases where the

etching solution is not known or we know the
etching solution will react with the photo resist
film.

 Lift-off process is used mostly to create metallic

interconnections.
Lift-off Technique Steps:
1. Preparation of Substrate.

2. Deposition of Sacrificial Layer.

3. Pattern the Sacrificial Layer (eg. Etching),

create an inverse pattern.

4. Deposition of the target material usually thin

metal film on the whole surface of the wafer.

5. Washing out the sacrificial layer together

with the target material on its surface.

6. Only the material that was in the "holes"

having direct contact with the underlying
layer (substrate/wafer) stays.

Final pattern layers : Substrate and target

material.
1. Substrate 2. Sacrificial 3. Target.
Lift-off Techniques:
Limitations:
◦ The film thickness (Target material) should be smaller than the photo resist.

To get thicker photoresist film, we use special kind of photoresist whose viscosity is more
and by which we can pattern larger thickness resist.

Advantages:
1. Lift-off is applied in cases where a direct etching of structural material would have
undesirable effects on the layer below.
2. Lift-off is a cheap and simple patterning technique.
3. Finally, lifting off a material is an option if there is no access to an etching tool with
the appropriate etchants.

Disadvantages:
4. Retention: This is the worst problem for lift-off processes. If this problem occurs,
unwanted parts of the metal layer will remain on the wafer.
5. Ears: When the metal is deposited, and it covers the sidewalls of the resist, "ears" can
be formed.
6. Re-deposition: During the lift-off process it is possible that particles of metal will
become reattached to the surface, at a random location. It is very difficult to remove
these particles after the wafer has dried.
Metallization Process
Metallization:
 Metallization is the final step in the wafer processing sequence.

 Metallization is the process by which the components of IC’s or

MEMES are interconnected by thin-film metal layer conductor
(Aluminum)

 This process produces a thin-film metal layer that will serve as the
required conductor pattern for the interconnection of the various
components on the chip.

 Another use of metallization is to produce metalized areas called

bonding pads around the periphery of the chip to produce metalized
areas for the bonding of wire leads from the package to the chip. 

 The bonding wires are typically 25 micro meters diameter gold wires,
and the bonding pads are usually made to be around 100×100 micro
meters square.
Metallization:
For metallization there are certain thumb rules to select the metal film
which will be suited for your application or device:

1. Low resistivity or high conductance, easy to form.

2. Low contact resistance and non-rectifying contacts.
3. Shaped and controlled as required.
4. Has mutual solubility with silicon.
5. Penetrates thin native oxide.
6. Mechanical stability, good adhesion and low stress.
7. Metallurgic alloy compatible with silicon, other metal and passivation.
8. Should not contaminate wafer or working apparatus.
9. Minimal junction penetration and low electro migration.
 
 For metallization various kinds of deposition techniques used as
Physical vapor depositions (PVD) like E-beam lithography, resistance
and inductively heated evaporation and sputtering and Chemical vapor
deposition (CVD).
Metallization:
Aliminium (Al):
 Aluminium (Al) is the most commonly used material for the
metallization of most IC’s, discrete diodes, and transistors.
 The film thickness is as about 1 micro meters and conductor widths
of about 2 to 25 micro meters are commonly used.

The use of aluminium offers the following advantages:

1. It has as relatively good conductivity.
2. It is easy to deposit thin films of Al by vacuum evaporation.
3. It has good adherence to the silicon dioxide surface.
4. Aluminium forms good mechanical bonds with silicon by sintering at
about 500°C or by alloying at the temperature of 577°C.
5. Aluminium forms low-resistance, non-rectifying that is, ohmic
contacts with p-type silicon and with heavily doped n-type silicon.
6. It can be applied and patterned with a single deposition and etching
process.
Metallization:
Aliminium (Al) certain limitations:
 During packaging operation if temperature goes too high, say
600°C, or if there is overheating due to current surge, Al can fuse
and can penetrate through the oxide to the silicon and may cause
short circuit in the connection.

 The silicon chip is usually mounted in the package by a gold die

backing that alloys with the silicon.
 Gold lead wires have been bonded to the aluminium film bonding pads on the chip,
since package lead are usually gold plated.
 At elevated temperatures, a reaction between the metal of such systems causes
formation of inter-metallic compounds, known as the purple plague. These voids
may result in weakened bonds or resistive bonds .

 Aluminium suffers from electro migration which can cause

considerable material transport in metals.
 It occurs because of the enhanced and directional mobility of atoms caused by the
direct influence of the electric field and the collision of electrons with atoms, which
leads to momentum transfer.
Doping Semiconductors
DIFFUSION
Diffusion:
Definition:
Diffusion is the net movement of molecules or atoms from a
region of high concentration to a region of low concentration as a
result of random motion of the molecules or atoms to change
electrical properties of material.
 
 It is an isotropic process.
 Can’t independently control dopant profile and dopant
concentration.

Dopant (impurities) diffusion in silicon is done from three

methods:
1. Diffusion from a chemical source in a vapor form at high
temperature.
2. Diffusion from a doped oxide source.
3. Diffusion and annealing from an ion implanted source
Types of diffusions:
They are two kinds of diffusion:
1. Diffusion from a constant source
2. Limited source diffusion

Diffusion from a constant source:

Diffusion from a constant source means that at the surface, the supply of the dopant
atoms will be infinite. It is also known as “Constant surface concentration diffusion”.

 Continuous supply of dopant leads to constant surface concentration at the surface.

 Pre deposition diffusion is controlled by error function diffusion.
 If there is a constant diffusion from a constant source then we get the solution:

N(x,t) = NB erfc(x/2 )
Where N(x,t) – Function of temperature and time, xDt– Temperature, N B – Background
concentration, D – Diffusion constant, t – Time, erfc – Complementary error function
 
 If we diffuse for longer time then the junction depth will be more.

 Increase the temperature then diffusion constant D will also increase.

Types of diffusions:
Limited source diffusion:
It is also known as “Constant Total Dopant” or “Gaussian
Diffusion”.

Constant total dopant means at the surface of the silicon the

supply of the dopant atoms are not infinite.

A fixed amount dopant is supplied then we can cut the

supply of impurity atom. As a result of which the constant
dopant lying on the surface, those dopant will go gradually
into deeper into the silicon layer and as a result of which
surface concentration goes down.

Drive in diffusion is controlled by Gaussian profile.

Methods of diffusions:

Note: Pre-deposition by diffusion can be replaced by a

shallow implantation step.
Ion Implantation
Ion Implantation:
Definition:
Ion implantation is a process of introduction of ionizes projectile
atoms (impurity) into target (Si substrate) with enough energy to
penetrate beyond surface region of a single crystal substrate in order
to change its electronic properties.
Ion Implantation:
Ion Implantation Process:
 Ion surface interaction depends on the ion beam energy:
 < 5 eV : Absorption or reflection
 5 – 10 eV : Surface damage and migration
 3 – 10 keV : Sputtering
 > 10 keV : Ion implantation

 Dopant atoms are vaporized, accelerated and directed at silicon substrate.

 Dopant (impurity) enter the crystal lattice, collide with silicon atoms, and
gradually lose energy and finally coming to rest at some depth within the lattice.

 Ion implantation is an indispensable technique in VLSI fabrication.

 Ultra shallow junctions for deep submicron CMOS and BICMOS technology or
RTA is essential.

 High energy, high dose O+, N+ implants are required for SOI fabrication.

 Recent trend is low energy, high dose and low temperature implant for the
submicron VLSI & ICs.
Features of Ion Implantation:
1. Precise control over the number of implanted dopants (control of impurity
in Ion implantation is ~±1% over the range of dose 10^11 to 10^17
ions/cm^2)
2. Low temperature process (<400 C).
3. More Expensive and Complex.
4. It is an anisotropic process and therefore does not spread the dopant
implant as must as diffusion.
5. A Non-Equilibrium process (Introduce impurity in excess solid solubility).
6. Wide variety of profiles can be obtained by controlling energy and dose.
7. Implantation is conducted in vacuum (It is clean and dry process).
8. Implantation energy rises from 1 KeV to 1 MeV resulting in ion
distribution with average depth from 100 A to 10μm.
9. Shallow depth junctions are made by ion implantation.
10. Resistivity and conductivity of the layer will be decided by the dose. Dose
range from 10^12 to 10^18 ions/cm^2.
11. Drawback: It results in damage of semiconductor. Annealing (solid phase
epitaxy) at elevated temperature is necessary to heal all of these damages.
Annealing:
 Ion implantation is followed by annealing for removing damages and
for re-crystallization.
 During implantation some minor damages will be created and those
damages will be removed by annealing technique which is solid
phase epitaxy.
 During the implantation process because of the damage, the material
may be amorphous in nature. But after annealing it will be re-
crystallized, so easily you can get the single crystal layer.
 Restoration of electrical activity like μ, σ, η all will be restore after
annealing.
 Two kinds of annealing:
1. Furnace annealing causes appreciable redistribution of impurities.
2. RTA (Rapid Thermal Annealing) suitable for shallow junctions.
 Compare
Diffusion & Ion Implantation
Compare Diffusion and Ion Implantation:

Diffusion Ion Implantation

Compare Diffusion and Ion Implantation:
Etching
Etching:
Definition:
Etching is a process by which patterns are transferred by selective
removal of unwanted portions of layer.
 
Two types of Etching:
1. Wet Etching:
◦ Removal of unmasked layer is done by selective liquid etchants.
◦ Unmasked areas are etched away by the chemical reactions (Oxidation and
Reduction)
2. Dry Etching (Plasma Assisted Etching):
Here plasma is used in the form of low pressure gaseous
discharges to remove selective layer.
Wet Etching:
Etchants :  KOH, HF, BF6, BCl3
Dry Etching (Plasma Etching):
 Etching Species are ions like Ar+ or CF3+ which
removes materials by ion-bombardment.
 Ion etching is much more directional
(anisotropic) due to directional acceleration of ion
by high E field.
Etch Process Properties:
Any etch process is characterized by certain properties:

Etch Rate:
The amount of material removed from the wafer over a defined period of
time.

Uniformity:
The evenness of the removal over the entire surface of the wafer.

Profile:
1. Isotropic – Etching proceeds at equal rates in both horizontal and vertical
direction.
2. Anisotropic – Etching proceeds faster in one plane than in another.

Selectivity:
The ability of the etch process to distinguish between the layer to be
etched and the material not to be etched
Wet Etching:
 Wet Etch is performed by immersing entire wafers in liquid
etchant solutions.
 Reaction is between surface layer exposed and etchant.
 Purely a chemical process.
 Oxidation-reduction equations often define wet etch processes.
 Silicon etch with HNO3 & HF
Si + HNO3 & HF → H2SiF6 + HNO2 + 2H2O
 Most Wet Etch Processes are Isotropic.
 Etch proceeds in both vertical and horizontal direction.
 Etch mixtures can change the etch rate or profile depending on
silicon crystal orientation.
 Wet Etch processes can be batch processes where multiple
wafers are etched at one time.
 Wet etch can be used to remove sacrificial layers present in
MEMS devices.
 Wet etch is also used for resist stripping.
Wet Etching:
Two basic wet etching techniques are:
1. Immersion Etching.
2. Spray Etching

Immersion Etching:
it is simple. Masked or unmasked wafer is submerged in etch solution.
Mechanical agitation ensure etch uniformity and constant etch rate.

Spray Etching:
 It requires less volume chemicals and is faster than the immersion
etching.
 Fresh etchants are constantly supplied to the wafer surface while etch
products are constantly removed.
 Good process control and etch uniformity are easily obtained from
spray etching.
 Recently, attention has been given to wet etching because plasma
etching fails to provide required etch selectivity, damage free interface
and particle contamination free wafer.
Wet Etching:
Advantages:
 Low Cost.
 Good throughput
 Good selectivity
 Batch Process

Disadvantages:
 Isotropic etch profiles.
 not usable for <3M features
Dry Etching:
 Dry etching is performed by placing the wafer in
a chamber and pumping in chemical vapors or
using plasma
 Dry Etching can be a physical or chemical
process (or both):
 Ion Beam Etch - a physical etch process
 Gaseous chemical etch
 Plasma enhanced etch
 Reactive Ion Etch
 Deep Reactive Ion Etch
Dry Etching:
 Plasma etch has low selectivity.
 Plasma etch tends to be anisotropic.
 High RF levels can cause damage to the wafer.

Advantages:
 Smaller features can be etched.
 anisotropic etch profiles are possible.
 Fewer liquid chemicals are required.

Disadvantage:
 Higher cost.
 More sophisticated equipment.
 Slow etch rate.
 RIE
Reactive Ion Etching
Reactive Ion Etching (RIE):
 In RIE, a combination of physical and
chemical etching occurs.

 In this case, both Ar and the chemical gas are

used.

 Ar performs an ion milling physical etch and

the chemical etch proceeds as well.

 RIE has the advantages of the physical ion

milling etching and those of the dry
chemical etch:
 Anisotropic Profile.
 Higher Etch Rate than either process.
 Higher selectivity ratio than physical etch.
 Smaller feature sizes possible.

 RIE has become the process of choice.

Deep Reactive Ion Etching (DRIE):
 High Aspect ratio features (narrow, tall) require
vertical sidewalls.

 Bosch DRIE process uses alternative etch and

passivation technique to etch vertically and protect
sidewalls with passivation coating.

 Cryrogenic process uses low temperatures and

simultaneously passivates and etches.
Isotropic & Anisotropic
Etching
Isotropic Etching:
 Etching proceeds at equal rates in both horizontal and vertical direction. i.e.
etch rate is independent of direction.

 Removes material equally in all crystallographic direction, results in

undercutting and uncontrolled etch feature.

 Isotropic Etchant for Si: Hydrofluoric Acid (HF)

Fig: Isotropic Etching (Af = 0)

Anisotropic Etching:
 No etching in lateral direction and the pattern is transferred with perfect fidelity.

 Crystallographic dependent etching, where etch rate vary according to the type of
crystal plane exposed to the etchant.

 Anisotropic Etchants for Si: EthylineDiamine Pryocatechol (EDP), Potassium

Hydroxide (KOH).

Fig: Anisotropic Etching (Af = 1)

Degree of Anisotropy:
Rl B
Af  1   1
Rv 2h f
 Rl – lateral etch rate
 Rv – Vertical etch rate
 B – Bias
 hf – Film Thickness

In general, degree of anisotropy is:

Bias:
Isotropic Etching:
 Vertical Etch Rate
(Rv) = Lateral
Etching Rate (Rl)
 B = 2×hf

Anisotropic Etching:
 Lateral Etch Rate
(Rl) = 0
 B=0
Etch Selectivity (S):
 The ability of the etch process to distinguish between the layer to be
etched and the material not to be etched.

 Suitable etch recipe is to searched so that the film etches much faster
than mask material or substrate.

Film-to-Mask selectivity:
Vf Etch rate of film
S fm  
Vm Etch rate of mask

Film-to- Substrate Selectivity:

Vf Etch rate of film

S fs  
V sub Etch rate of Substrate
.
 Micromachining
Technology for MEMS
Micromachining
Micromachining:

Micro + Machining
Removal of material at micro level

Definition:
Material removed in micro/ nano level with no restriction on the size of
the component to fabricate 3D and 2D structures (moving or static) in
miniature form.

 Micromachining has become a dominant and fundamental technology in

the fabrication of microsensors, micro-actuators and microstructure.

 Various Micromachining are:

 Surface Micromachining
 Bulk Micromachining
 High Aspect Ratio Microstructures (HARM)
 LIGA process
Si Micromachining Characteristics:
The process of getting 3D structures by removing
Si material in micro or nano level is known as
Micromachining of Silicon.

Etchant Characteristics:
 Direction Dependency. (Isotropic or anisotropic)
 Etch rate (0.25 to 40 m/min) and its variability.
 Anisotropic etch rate ratio (Only for anisotropic
etchants, 1:1 to 400:1 for 100/111 planes)
 Dopant Dependence / Selectivity
 Temperature of etching (20 to 100 C)
 Surface
Micromachining
Surface Micromachining:
 Surface micromachining builds microstructures by
depositing and etching structural and sacrificial layer over a
substrate.

 After deposition of structural layer, sacrificial layer is

etched away, leaving a complete assembled microstructures.
 Maximum possible thickness on the microstructure is
limited to that of the deposited film.
 Structures have low aspect ratios (short and wide) and are
sometimes referred as very thin structures and layers.
 Generally, polysilicon is used as one of the structural layers
while silicon dioxide is used as a sacrificial layer. 
 The sacrificial layer is removed or etched out to create any
necessary void in the thickness direction.
 Added layers tend to vary in size from 2-5 micrometres.
Surface Micromachining:
Surface Micromachining Process:
 Micro-machining starts with a silicon wafer or
other substrate upon which new layers are grown.
 These layers are selectively etched by photo-
lithography; either a wet etch involving an acid, or
a dry etch involving an ionized gas (or plasma).
Dry etching can combine chemical etching with
physical etching or ion bombardment.
 Surface micro-machining involves as many layers
as are needed with a different mask (producing a
different pattern) on each layer.
 Modern integrated circuit fabrication uses this
technique and can use as many as 100 layers.
Surface Micromachining Process:
 Micro-machining starts with a silicon wafer or
other substrate upon which new layers are grown.
 These layers are selectively etched by photo-
lithography; either a wet etch involving an acid, or
a dry etch involving an ionized gas (or plasma).
Dry etching can combine chemical etching with
physical etching or ion bombardment.
 Surface micro-machining involves as many layers
as are needed with a different mask (producing a
different pattern) on each layer.
 Modern integrated circuit fabrication uses this
technique and can use as many as 100 layers.
What is Sacrificial Layer?
 A sacrificial layer is used to build complicated
components, such as movable parts.
 Used to separate layers as the structure is being
constructed.
 Dissolved away at the end to free the structural
layers.
 Finally, the sacrificial layer is removed to release
the beams, using a selective etch process that does
not damage the structural layer.
 Good mechanical properties so that device does not
fail while fabrication.
 Good Adhesion
 Low residual Stress.
What is Structural Layer?
 A layer of thin film material with which the
microstructures are made of.
 Has mechanical properties such as high yield and
fracture stresses, minimal creep and fatigue and
good wear resistance.
 Has physical and chemical properties that are
suitable for the desired application.
 Polysilicon is usually used as structural material.
Surface Micromachining Process Steps:
Step-by-Step Approach of Polysilicon Surface Micromachining Process:
Problem in Surface Micromachining – Surface Stiction:
Surface Stiction:
Surface Tension of liquid during evaporation results
in capillary forces that causes the structures to stick
(adhere) to the substrate if the structures are not stiff
enough.

 It accounts for ~90% structural failures.

Methods to prevent surface stiction problems are:
1. If the bumps (dimples) are close, the central
portion will not touch the substrate.
2. Freeze drying (sublimation) of the final rinsing
solution.
3. Use of integrated polymer support structure during
release etching & ashing photoresist (PR).

Other Important Issues:

 Selectivity of structural, sacrificial and substrate
materials.
 Stress of structural material.
Advantages:
1. The main advantage of this machining process is
the possibility of realizing monolithic
microsystems in which the electronic and the
mechanical components (functions) are built in on
the same substrate.
2. The surface micromachined components are
smaller in thickness and mass.
3. The expensive Si wafer can be replaced by cheaper
substrates such as glass or plastic.
4. Fit well with in IC process.
5. It is cost effective.
Disadvantages:
1. Relatively New (1990)
2. Multiple deposition and etching required to build
structures.
3. Vertical dimensions are limited to the thickness of
the deposited layers leading to compliant
suspended structures with tendency to stick
support.
4. Cleanliness is critical at end of process.
5. Sawing, Packing and testing is difficult.
6. Less-rouged with respect to shock and vibration.
Applications:
1. Used in manufacturing of flat panel television
screen.
2. Used in production of thin solar cells.
3. Used in making bimetal cantilever.

Surface Micro-machining can be seen in action in the

following MEMS (Microelectromechanical) products:
4. Surface Micro-machined Accelerometers.
5. 3D Flexible Multichannel Neural Probe Array.
6. Nanoelectromechanical relays.
LIGA Process
LIGA Micromachining Technique:

• Developed in Germany in the early 1980s.

• LIGA is a German Acronym.
German English

LI Lithographie Lithography

G Galvanoformung Electroplating

A Abformung Molding

• In this particular technique we get the exact 3D structure

with high aspect ratio.
LIGA Micromachining Process:
LIGA Micromachining Process:
Step 1:
 Coat thick photoresist (300 μm to 500 μm) on a substrate
with an electrically conductive surface (metal plating).

 Normal photoresist cannot be used in LIGA process used

in VLSI..

 Need Very high viscous photoresist like PMMA

(Polymethyl methacrylate) and SU8 is used for LIGA
process.

Step 2:
 X-ray lithography with extended exposure from highly
collimated X-radiation to penetrate thick resist with well-
defined sidewalls.

Step 3:
 After development, desired structures are formed.
LIGA Micromachining Process:
Step 4:Electroplating
 Metal electroplated on the exposed conductive
substrate surface.

 By adjusting these parameters you can get the thick

layer:
 Concentration of these electroplating solution.
 Temperature
 Current - The current through that electroplating is
basically electrolysis process. So if you change the
current, so the rate of deposition will also change.

Step 5:
 After photoresist removal, metal structure formed
may be used as mold.
LIGA Micromachining Process:
 It is an Additive Process.

 HARMST – High Aspect Ratio Microstructure Technology

 Structures have precise dimensions and good surface roughness.

 Output – Finished parts, molds, or stamps.

 Sacrificial techniques are combined with the basic LIGA process to create partially freed
flexure suspended structures or completely freed devices.

 Mechanical structure that easily can be made.

 Thickness is a large and High aspect ratio.

 Do not need that mask aligning and conventional machine used in normal lithography
process.

 Some important feature which are different from normal lithography techniques and
etching process are
a. X-radiation lithography
b. Electroplating or Electroforming
c. Different kind photoresist.
LIGA Micromachining Process:
Process requirement:
• X-ray lithography and thick photoresist (PMMA or SU8).

• Electroplating with precious controls on current density.

• Because the deposition on the metal, on the base plate

depends on the current density, temperature, concentration
of the electrolyte solution, composition of the plating
solution to avoid hydrogen bubbles which may result fetal
defects.
 MSL
Microstereolithography
 Principle of Stereolithography (SL):
Basic principle is photopolymerization
process, where under exposure of UV
radiation small molecules (monomers) in a
resin or resists form larger
molecules(polymers).

 Chain reaction will take place and larger

molecules will form after irradiation or
ultraviolet or laser.

 Three main photopolymer solutions used in

SL are Acryl ate, Epoxy resign and Vinyl
ether.
Intensity Profile of the UV
beam and the spot cured within
photoresist  Two most critical parameters (curing depth
and line width) need to be carefully controlled
and are determined from the beam distribution
and adsorption of radiation in the resist.
Microstereolithography (MSL or SL):
 Microstereolithography is rapid
prototyping and manufacturing technology
that enables the generation of 3D physical
objects in micro size (micro parts) directly
from CAD data files.

 It is enabling technology to make parts for

MEMS devices in material other than
silicon.

 MSL is also called “Microphotoforming”.

 It was first introduced by Ikuta and

Hirowatari in 1993.

 The resolution of MSL is better than SL.

 Basic steps of making 3D structure using MSL:

Definition of Desired polymer object is The entire structure

a CAD model written into UV curable is obtained.
of 3D object resist layer by layer.

Slicing the 3D model into a

series of closely spaced 3D models are translated
horizontal planes that into numerical control code
represent the X-Y cross section and merged together into
of the 3D object each with build file to control the UV
different Z values. So X-Y light scanner and Z
cross section of the 3D object, translator.
each plane will have different
Z values.
Microstereolithography (MSL):
 Microstereolithography is an additive process.

 UV laser beam is focused down to a 1 to 2 μm-dia spot that solidifies a resin

layer of 1 to 10 μm thickness. Whereas in SL laser beam spot size and layer
thickness are ~ 100 to 1000 μm.

 Submicron control of both X-Y-Z translation stages and small UV beam spot
enables precise fabrication of complex 3D microstructures.

 Different MSL systems have been developed in recent year to improve upon
their precision and speed.

 Another research effort in MSL is the incorporation of a broad spectrum of

materials (polymers, metal, ceramic) to create MEMS with new specific
functions.

 Most widely used MSL equipment are based on the scanning method where a
well focused laser beam with beam spot size around 1 micron is directed onto
the resin surface to initiate the polymerization process.
Microstereolithography (MSL):
 A 3D microstructure is built up by repeated scanning of
either the light beam and work piece layer by layer.

 Several scanning methods are used in MSL technique which

are
 Classical MSL
 Integrated Harden (IH) process.
 Mass IH process.
 Super IH process.
 Ceramic MSL.
Integrated Harden (IH) Process:

Fig: Schematic Diagram of IH Process

Integrated Harden (IH) Process:
1. The light source is a UV lamp and the beam is focused onto the resin
surface through a glass window.

2. The focal point of the apparatus remains fixed during the fabrication
and work piece is in a container attached to an X-Y stage.

3. The glass window is attached to the Z-stage so that layer of precise

thickness can be prepared.

4. The Shutter is some acousto electro optic shutters.

5. The IH process is generally used to fabricate polymeric

microstructure.

6. Where as metal microstructures can be obtained by first making a

polymer micro mould, metal plating and finally removing the
polymer.
Specification of IH Process:
1. 5 micron spot size of the UV beam.

2. Positional accuracy is achieved to 0.25 micron and 1

micron in the Z-direction.

3. Minimum size of the unit of harden polymer is 5μm x 5μm

x 3μm in XYZ direction.

4. Maximum size of fabrication structure is 10 mm x10 mm

x 10 mm.
Characteristics of IH Process:
1. IH is capable of making two true 3D and high aspect ratio
microstructures.

2. Works with different materials is possible.

3. Does not require mask plates and is thus a cost effective

process.

4. Positional accuracy is 0.25 micron and 1 micron in Z direction.

5. Medium range accuracy is 3 to 5 micron of the IH process.

6. It permits desktop micro fabrication of parts.

7. Fabrication speed is slower than classical MSL.

Limitations of IH Process:
IH Process (Layer by Layer Fabrication):
1. The depth resolution is limited by the thickness of the
layer that is stacked up.

2. Viscosity of the UV curable monomers can deform and

hence damage the solidified microstructure.

3. A significant surface tension of the liquid monomer

decreases the precision of the fabrication process.

4. These limitations can work can be overcome by using

super IH process.
Etch Stop Techniques
Etch Stop Techniques :
Etch Stop:
A region where wet etching or dry etching tends to
slowdown or halt is called is “Etch stop”.

 Silicon membranes are usually fabricated using etch stop

technique of a thin heavily boron doped layer which can
be epitaxially grown or formed by diffusion or
implantation of boron into a lightly doped substrate.

 Etch stop layer created by epitaxially grown p-type layer

then that will give you good result compared to the
diffusion or implanted layer.
Etch Stop Techniques :
 Etch stop is a very important aspect in making
microstructure.

 While etching, somewhere we have to stop the etching

process. There are two ways:
1. Mechanical process (Time Etching):
 if you know the etch rate of that film basically silicon particular
etching solution, then you can note down time how much time you
will etch. Then after that you take out the wafer.
 Time etching after certain time you will stop it manually, some error
in stopping etch, continuously monitoring the etching process. So
there, lot of error are introduced.

2. Automatic Stopping (Continue Etching):

 But after certain point, that point has be has to be decided by
electronically or electrically. So automatically they will stop.
 There reproducibility is more and error will be less.
Etch Stop Techniques :
Automatic Etch Stop Mechanism are basically two kinds:
1. Doping Selective Etching (DSE).
2. Bias Dependent Etching or Bias Selective Etching (BSE) or Electrochemical
Etching (ECE).

1. Doping Selective Etching (DSE):

Heavily doped regions etch more slowly is known as “Doping Selective
Etching (DSE)”. It is the basic principle of doping selective etching.

 Because of heavily boron doping, then the lattice constant of silicon

decreases leading to highly strained layer that show some slip planes.

2. Bias Dependent Etching or Bias Selective Etching (BSE):

Etching may be stopped electrochemically when observing a sudden rise
in current through an etched n-p junction is known as “ Bias Dependent
Etching or Bias Selective Etching (BSE)”.

 It is also called “Electrochemical Etching” or “ ECE Etching”.

Doping Selective Etching (DSE):
Heavily doped regions etch more slowly is known as “Doping Selective Etching
(DSE)”. It is the basic principle of doping selective etching.

 Because of heavily boron doping, then the lattice constant of silicon decreases
leading to highly strained layer that show some slip planes.

Benefits:
1. High boron etch stop are independent of crystal orientation.
2. Smooth surface finish.
3. Possibilities of fabricating, a release structures with arbitrary lateral geometry in a
single etch step.

Limitations:
4. High levels of boron introduce mechanical stress into silicon and may cause
buckling or even fracture in a diaphragm or double clamped structure.
5. Not suited to stress sensitive microstructures that could lead to the movement of
structures without an external load.
6. Excessive boron doping prevents introduction of electrical components (eg.
Piezoresistors, Piezoresistive pressure sensors, piezoresistive accelerometer) for
sensing purpose into these microstructures.
Electrochemical Etching (ECE):
 This Technique is known as the ECE technique.

 Electrochemical etch stop technique, it’s another name

is Bias dependent etching or Bias selective etching
(BSE).

 Electrochemical passivation layer technique are used as

an attractive technique compared to heavy boron doping
to create diaphragms.
Electrochemical Etching (ECE):
Electrochemical Etching (ECE):
Process:
1. A Voltage is applied to the Si wafer (anode) and a counter electrode (Cathode - Pt)
in the etching solution.

2. In Bias dependent etching, oxidation is promoted by a positive voltage applied to

Si, causing an accumulation of holes at Si and Solution interface.

3. Oxidation at the surface proceeds rapidly while the oxide is readily dissolved by the
solution.

4. Because the hydrofluoric acid will not etch silicon, it will etch silicon dioxide.

5. So the silicon first automatically converted into layer of dielectric silicon dioxide
then it is etched by etching.

6. The normal etching of silicon is done.

7. So it is a bias dependent etching, means the whole process is depending on the bias.

8. So that is known as the bias dependent etching.

Limitations of Electrochemical Etching (ECE):
Bias Dependent Etching depends on:
 Application of positive bias voltage on the silicon.
 How much voltage you are applying.
 How much holes are accumulated at the surface, it dependents
on that.

 Hydrofluoric acid never used because it is an isotropic

agent and it is not crystallographic dependent agent.
 So normal in micromachining or MEMS we use the
anisotropic crystal etching which is crystallographic
dependent etching that is a KOH.
 A plot of electrochemical current density against applied
voltage reveals that the current density is very much
dependent on the type and the resistivity ( doping level)
of Si.