Scribd
Upload
153 views20 pages

Design of A Low Drop-Out Voltage Regulator For Soc Applications in A 130Nm Cmos Technology

This document summarizes the design of a low dropout voltage regulator for system-on-chip applications using a 130nm CMOS technology. It describes the classical structure of an LDO regulator including a power transistor, error amplifier, and feedback network. It discusses important issues for LDO regulators such as stability and fast transient response. The document presents the electrical specifications and describes the power transistor, error amplifier, and frequency compensation scheme used in the LDO design. It analyzes the stability and transient response through simulations of the circuit's poles and corners.

Uploaded by

Laude Fernández
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
153 views20 pages

Design of A Low Drop-Out Voltage Regulator For Soc Applications in A 130Nm Cmos Technology

This document summarizes the design of a low dropout voltage regulator for system-on-chip applications using a 130nm CMOS technology. It describes the classical structure of an LDO regulator including a power transistor, error amplifier, and feedback network. It discusses important issues for LDO regulators such as stability and fast transient response. The document presents the electrical specifications and describes the power transistor, error amplifier, and frequency compensation scheme used in the LDO design. It analyzes the stability and transient response through simulations of the circuit's poles and corners.

Uploaded by

Laude Fernández
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
You are on page 1/ 20

Design of a Low Drop-Out Voltage Regulator for SoC

Applications in a 130nm CMOS Technology.


The Classical Structure of a LDO
Regulator.
• Power transistor.
• Error amplifier.
• Feedback network.
Important LDO issues.
• Stability.
• Fast transient response.

O. I. R. Palacios, “A capacitor-free low drop-out regulator for low power system-on-chip applications," Master’s thesis, Dept. Elect. Eng., COPPE
Univ., RJ, Brazil, 2013.
Razavi. “Design of analog CMOS circuits ”.
Electrical specifications.

PARAMETER SPECIFICATION
Dropout voltage 200 mV
Output Voltage 1.2 V
Output Current 50mA
Cout 100 pF
Vref 700 mV
Quiescent Current Minimum
Settle Time Minimum
Power transistor.
• P-type transistor.
• It will be operating in the triode region.
• Low area.

= .
<<<

=
Error amplifier.
• It has a good output swing.
• It is a Two-stage amplifier.
• It is a relatively simple amplifier.
Stability.
• The transconductance, output resistance and lumped parasitic
capacitance of the ith stage are represented by gmi, Ri and Ci.

Annajirao Garimella, “Pole-Zero Analysis of Low-Dropout (LDO) Regulators: A Tutorial Overview”.


Frequency compensation scheme.
• It sets the dominant pole at the output of the first stage.
• It creates two LHP zeros.

A. Garimella, M. W. Rashid, and P. M. Furth, “Reverse nested miller compensation using current buffers in a three-stage ldo," IEEE Transactions on Circuits and
Systems II: Express Briefs, vol. 57, pp. 250{254, April 2010.
Frequency compensation scheme.
• It sets the dominant pole at the output of the first stage.
• It creates two LHP zeros.

A. Garimella, M. W. Rashid, and P. M. Furth, “Reverse nested miller compensation using current buffers in a three-stage ldo," IEEE Transactions on Circuits and
Systems II: Express Briefs, vol. 57, pp. 250{254, April 2010.
Frequency compensation scheme.
• It sets the dominant pole at the output of the first stage.
• It creates two LHP zeros.
Frequency compensation scheme.
Transfer Function (paper):

A. Garimella, M. W. Rashid, and P. M. Furth, “Reverse nested miller compensation using current buffers in a three-stage ldo," IEEE Transactions on Circuits and
Systems II: Express Briefs, vol. 57, pp. 250{254, April 2010.
Frequency compensation scheme.
Transfer Function (paper):

𝐶𝑐 1 𝑔𝑚3
𝑤𝑝 2=
𝐶𝑐 2 𝐶𝐿 𝐶𝑐 1>𝐶𝑐 2
A. Garimella, M. W. Rashid, and P. M. Furth, “Reverse nested miller compensation using current buffers in a three-stage ldo," IEEE Transactions on Circuits and
Systems II: Express Briefs, vol. 57, pp. 250{254, April 2010.
Troubles.
Frequency compensation scheme.
Transfer Function (Matlab):

A(s) =

𝑏2 ≈+…+ 𝑅1 𝑅 2 𝑅 3 𝑔𝑚2 ( 𝐶 𝑐2 𝐶 𝑔𝑑 − 𝐶 𝑐1 𝐶 𝑔𝑑 + 𝐶 𝑐2 𝐶 𝐿 +𝐶 𝑐 2 𝐶 𝑐1 )
𝑪𝒄𝟐>𝑪𝒄 𝟏
)

𝒈𝒎 𝑪𝑮 >𝒈𝒎𝑩𝑼

Annajirao Garimella, “Pole-Zero Analysis of Low-Dropout (LDO) Regulators: A Tutorial Overview”.


Frequency compensation scheme.
Transfer Function (Matlab):

A(s) =

𝑏2 ≈+…+ 𝑅1 𝑅 2 𝑅 3 𝑔𝑚2 ( 𝐶 𝑐2 𝐶 𝑔𝑑 − 𝐶 𝑐1 𝐶 𝑔𝑑 + 𝐶 𝑐2 𝐶 𝐿 +𝐶 𝑐 2 𝐶 𝑐1 )
𝑪𝒄𝟐>𝑪𝒄 𝟏
)

𝒈𝒎 𝑪𝑮 >𝒈𝒎𝑩𝑼

Annajirao Garimella, “Pole-Zero Analysis of Low-Dropout (LDO) Regulators: A Tutorial Overview”.


Frequency compensation scheme.
Transfer Function (Matlab):
Applying the assumption of widely-separated poles:
=
A(s) = >>
;

A(S) =

𝟐 𝒈𝒎𝑪𝑮 𝒈𝒎 𝟐 𝒈𝒎 𝑪𝑮
𝒘 𝒑𝟒 ≈
𝑪 𝟏(𝑪 𝟐+𝑪 𝒈𝒅 )
Transient response.
• A Large output capacitor improves the transient response.
• A large closed-loop bandwidth improves it as well.
• Low changes in the output current.
Transient response.
Transient response.
Corners simulations.

You might also like

pFad - Phonifier reborn

Pfad - The Proxy pFad of © 2024 Garber Painting. All rights reserved.

Note: This service is not intended for secure transactions such as banking, social media, email, or purchasing. Use at your own risk. We assume no liability whatsoever for broken pages.


Alternative Proxies:

Alternative Proxy

pFad Proxy

pFad v3 Proxy

pFad v4 Proxy