Chapter 4

MARIE: An Introduction to a Simple

Computer

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 Chapter 4 Objectives

• Learn the components common to every modern

computer system.
• Be able to explain how each component contributes to
program execution.
• Understand a simple architecture invented to illuminate
these basic concepts, and how it relates to some real
architectures.
• Know how the program assembly process works.

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 4.1 Introduction

• Chapter 1 presented a general overview of computer

systems.
• In Chapter 2, we discussed how data is stored and
manipulated by various computer system components.
• Chapter 3 described the fundamental components of
digital circuits.
• Having this background, we can now understand how
computer components work, and how they fit together to
create useful computer systems.

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 4.2 CPU Basics

• The computer’s CPU fetches, decodes, and executes program

instructions.
• The two principal parts of the CPU are the datapath and the
control unit.
• The datapath consists of an arithmetic-logic unit and storage
units (registers) that are interconnected by a data bus (where
the timing is controlled by clocks) that is also connected to
main memory.
– Various CPU components perform sequenced operations
according to signals provided by its control unit.

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 4.2 CPU Basics
• Registers hold data that can be readily accessed by the CPU.
• They can be implemented using D flip-flops.
• One D flip-flop is equivalent to a 1-bit register, so a
collection of D flip-flops is necessary to store multi-bit
values.
– A 32-bit register requires 32 D flip-flops.
• These collections of flip-flops must be clocked to work in
unison. At each pulse of the clock, input enters the register
and cannot be changed (and thus is stored) until the clock
pulses again.

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 4.2 CPU Basics
• Most computers have registers of a certain size.
(Common sizes include 16, 32, and 64 bits).
• The arithmetic-logic unit (ALU) carries out logical and
arithmetic operations as directed by the control unit.
• The control unit is the policeman” or “traffic manager”
of the CPU and determines which actions to carry out
according to the values in a program counter register
and a status register.

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 4.3 The Bus

• The CPU shares data with other system components by

way of a data bus.
– A bus is a set of wires that simultaneously convey a single
bit along each line.
• Two types of buses are commonly found in computer
systems: point-to-point, and multipoint buses.

This is a point-to-point
bus configuration:

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 4.3 The Bus

• A multipoint bus is shown below.

• Because a multipoint bus is a shared resource, access to it
is controlled through protocols, which are built into the
hardware.

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 4.3 The Bus
• Buses consist of data lines, control lines, and address lines.
• While the data lines convey bits from one device to another (are
bidirectional allowing the transfer of data in either direction),
• control lines determine the direction of data flow, and when
each device can access the bus and for what purpose (reading or
writing from memory or from an I/O device, for example).
• Address lines determine the location of the source or destination
of the data (are unidirectional from processor to memory)
• *The power lines provide the electrical power necessary

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The next slide shows a model bus configuration.
4.3 The Bus

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 4.3 The Bus
• In a master-slave configuration, where more than one
device can be the bus master, concurrent bus master
requests must be arbitrated.
• Bus arbitration schemes must provide priority to certain
master devices while, at the same time, making sure
lower priority devices are not starved out.
• Four categories of bus arbitration are:
– Daisy chain: Permissions – Distributed using self-detection:
are passed from the highest- Devices decide which gets the bus
priority device to the among themselves.
lowest. – Distributed using collision-
– Centralized parallel: Each detection: Any device can try to
device is directly connected use the bus. If its data collides
to an arbitration circuit. with the data of another device,
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it tries again.
 4.4 Clocks

• Every computer contains at least one clock that synchronizes the

activities of its components.
• A fixed number of clock cycles are required to carry out each
data movement or computational operation.
• The clock frequency, measured in megahertz or gigahertz,
determines the speed with which all operations are carried out.
• Clock cycle time is the reciprocal of clock frequency.
• 1MHz is equal to 1 million cycles per second (so 1 hertz is 1
cycle per second).
– An 800 MHz clock has a cycle time of 1.25 ns.

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 4.4 Clocks

• Clock speed should not be confused with CPU

performance.
• The CPU time required to run a program is given by the
general performance equation:

– We see that we can improve CPU throughput when we

reduce the number of instructions in a program, reduce the
number of cycles per instruction, or reduce the number of
nanoseconds per clock cycle.

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4.5 The Input/Output Subsystem

• A computer communicates with the outside world through its input/output

(I/O) subsystem.
• I/O devices connect to the CPU through various interfaces.
• This interface converts the system bus signals to and from a format that is
acceptable to the given device.
• The CPU communicates to these external devices via input/output registers.
This exchange of data is performed in two ways
• I/O can be memory-mapped-- where the I/O device behaves like main
memory from the CPU’s point of view.
• Or I/O can be instruction-based, where the CPU has a specialized I/O
instruction set.

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 4.6 Memory Organization

• Computer memory consists of a linear array of addressable

storage cells that are similar to registers.
• Memory can be byte-addressable, or word-addressable,
where a word typically consists of two or more bytes.
• Memory is constructed of RAM chips, often referred to in
terms of length  width.
• If the memory word size of the machine is 16 bits, then a
4M  16 RAM chip gives us 4 megabytes of 16-bit
memory locations.

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 4.6 Memory Organization

• How does the computer access a memory location

corresponds to a particular address?
• We observe that 4M can be expressed as 2 2  2 20 = 2 22
words.
• The memory locations for this memory are numbered 0
through 2 22 -1.
• Thus, the memory bus of this system requires at least 22
address lines.
– The address lines “count” from 0 to 222 - 1 in binary. Each
line is either “on” or “off” indicating the location of the
desired memory element.
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 4.7 MARIE

• We can now bring together many of the ideas that we have

discussed to this point using a very simple model
computer.
• Our model computer, the Machine Architecture that is
Really Intuitive and Easy, MARIE, was designed for the
singular purpose of illustrating basic computer system
concepts.
• While this system is too simple to do anything useful in
the real world, a deep understanding of its functions will
enable you to comprehend system architectures that are
much more complex.
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 4.7 MARIE

The MARIE architecture has the following

characteristics:
• Binary, two's complement data representation.
• Stored program, fixed word length data and instructions.
• 4K words of word-addressable main memory.
• 16-bit data words.
• 16-bit instructions, 4 for the opcode and 12 for the address.
• A 16-bit arithmetic logic unit (ALU).
• Seven registers for control and data movement.

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 4.7 MARIE

MARIE’s seven registers are:

• Accumulator, AC, a 16-bit register that holds a conditional
operator (e.g., "less than") or one operand of a two-operand
instruction.
• Memory address register, MAR, a 12-bit register that holds the
memory address of an instruction or the operand of an instruction.

• Memory buffer register, MBR, a 16-bit register that holds the data
after its retrieval from, or before its placement in memory.
• MBR - holds either the data just read from memory or the data
ready to be written to memory.

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 4.7 MARIE

MARIE’s seven registers are:

• Program counter, PC, a 12-bit register that holds the address
of the next program instruction to be executed.
• Instruction register, IR, part of a CPU's Control unit that
holds the instruction currently being executed or decoded.
(16 bit register)
• Input register, InREG, an 8-bit register that holds data read
from an input device.
• Output register, OutREG, an 8-bit register, that holds data
that is ready for the output device.

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 4.7 MARIE

This is the MARIE architecture shown graphically.

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 4.7 MARIE

• The registers are interconnected, and connected with main

memory through a common data bus.
• Each device on the bus is identified by a unique number that is
set on the control lines whenever that device is required to
carry out an operation.
• Separate connections are also provided between the
accumulator and the memory buffer register, and the ALU and
the accumulator and memory buffer register.
• This permits data transfer between these devices without use of
the main data bus.

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 4.7 MARIE

This is the MARIE data

path shown graphically.

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 4.7 MARIE
Instruction set architecture
• computer’s instruction set architecture (ISA) specifies the format of its
instructions and the primitive operations that the machine can perform.
•The ISA is an interface between a computer’s hardware and its software.
•Some ISAs include hundreds of different instructions for processing
data and controlling program execution.
•Opcode-specifies the instruction to be executed (which allows for a total
of 16 instructions).
•The least significant 12 bits, bits 0–11, form an address, which allows
for a maximum memory size of 212–1.

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 4.7 MARIE

• This is the format

of a MARIE instruction:

• The fundamental MARIE instructions are:

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 4.7 MARIE

• This is a bit pattern for a LOAD instruction as it would

appear in the IR:

• We see that the opcode is 1 and the address from

which to load the data is 3.

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 4.7 MARIE

• This is a bit pattern for a SKIPCOND instruction as it

would appear in the IR:

• We see that the opcode is 8 and bits 11 and 10 are

10, meaning that the next instruction will be skipped if
the value in the AC is greater than zero.

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 4.7 MARIE

• Each of our instructions actually consists of a sequence of

smaller instructions(mini instructions) called microoperations.
• The symbolic notation used to describe the behavior of
microoperations is called register transfer notation (RTN)
or register transfer language (RTL).OR it specifies the
exact sequence of microoperations that are carried out by an
instruction.
• In the MARIE RTL, we use the notation M[X] to indicate the
actual data value stored in memory location X, and  to
indicate the transfer of bytes to a register or memory location.

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 4.7 MARIE

• The RTL for the LOAD instruction is:

MAR  X
MBR  M[MAR]
AC  MBR

• Similarly, the RTL for the ADD instruction is:

MAR  X
MBR  M[MAR]
AC  AC + MBR

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 4.7 MARIE

• Recall that SKIPCOND skips the next instruction

according to the value of the AC.
• The RTL for the this instruction is the most complex in our
instruction set:
If IR[11 - 10] = 00 then
If AC < 0 then PC  PC + 1
else If IR[11 - 10] = 01 then
If AC = 0 then PC  PC + 1
else If IR[11 - 10] = 10 then
If AC > 0 then PC  PC + 1

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 4.8 Instruction Processing

• The fetch-decode-execute cycle is the series of steps that a

computer carries out when it runs a program.
• We first have to fetch an instruction from memory, and
place it into the IR.
• Once in the IR, it is decoded to determine what needs to be
done next.
• If a memory value (operand) is involved in the operation, it
is retrieved and placed into the MBR.
• With everything in place, the instruction is executed.

The next slide shows a flowchart of this process.

4.8 Instruction Processing

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 4.8 Instruction Processing
Interrupt
•All computers provide a way of interrupting the fetch-decode-
execute cycle.
•Interrupt is a signal to the processor generated by the
software/hardware indicating an immediate attention needed by an
event.
•Typically, the input or output device sends an interrupt by using a
special register, the status or flag register.
•A special bit is set to indicate an interrupt has occurred. For
example, as soon as input is entered from the keyboard, this bit is
set. The CPU checks this bit at the beginning of every machine
cycle.

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4.8 Instruction Processing
When it is set, the CPU processes an interrupt. When it is not
set, the CPU performs a normal fetch-decode-execute cycle,
processing instructions in the program it is currently executing.
•Interrupts can be : hardware interrupts and software interrupts.
Hardware interrupts: are used by devices to communicate that
they require attention from the operating system.
software interrupt is caused either by an exceptional condition in
the processor itself, or a special instruction in the instruction set
which causes an interrupt when it is executed.
e.g. divide-by-zero exception

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Software interrupts are also called traps.
 4.8 Instruction Processing

• Interrupt processing involves adding another step to the

fetch-decode-execute cycle as shown below.

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 4.8 Instruction Processing

• For general-purpose systems, it is common to disable all

interrupts during the time in which an interrupt is being
processed.
– Typically, this is achieved by setting a bit in the flags
register.
• Interrupts that are ignored in this case are called maskable.
• Nonmaskable interrupts are those interrupts that must be
processed in order to keep the system in a stable condition.
(e.g. types of internal system chipset errors, memory
corruption problems, parity errors)

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 4.8 Instruction Processing

• Interrupts are very useful in processing I/O.

• MARIE, being the simplest of simple systems, uses a
modified form of programmed I/O.
• All output is placed in an output register, OutREG, and
the CPU polls the input register, InREG, until input is
sensed, at which time the value is copied into the
accumulator.

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 4.9 A Simple Program

• Consider the simple MARIE program given below. We

show a set of mnemonic instructions stored at addresses
100 - 106 (hex):

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 4.9 A Simple Program

• Let’s look at what happens inside the computer when our

program runs.
• This is the LOAD 104 instruction:

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 4.9 A Simple Program

• Our second instruction is ADD 105:

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4.9 A Simple Program

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4.10 A Discussion on Assemblers

• Mnemonic instructions, such as LOAD 104, are easy for

humans to write and understand.
• They are impossible for computers to understand.
• Assemblers translate instructions that are comprehensible to
humans into the machine language that is comprehensible to
computers
– We note the distinction between an assembler and a
compiler: In assembly language, there is a one-to-one
correspondence between a mnemonic instruction and its
machine code. With compilers, this is not usually the case.

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4.10 A Discussion on Assemblers

•An assembler is a program that accepts a symbolic language

program and produces its binary machine language
equivalent. The input symbolic program is called the source
program and the resulting binary program is called the object
program .
•Assemblers create an object program file (the machine code)
from mnemonic source code(assembly program) in two
passes.
•The translation of the symbolic program into an equivalent binary
code may be done by scanning the program and replacing the
symbols by their machine code binary equivalent.
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 4.10 A Discussion on Assemblers

• No translation is done during the first scan. we will assign a

memory location to each machine instruction and operand.
The location assignment will define the address value of
labels and facilitate the translation process during the second
scan.
• During the first pass, the assembler assembles as much of the
program is it can, while it builds a symbol table that contains
memory references for all symbols in the program.
• During the second pass, the instructions are completed using
the values from the symbol table.

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4.10 A Discussion on Assemblers

• Consider our example program

(top).
– Note that we have included two
directives HEX and DEC that
specify the radix of the constants.
• During the first pass, we have a
symbol table and the partial
instructions shown at the
bottom.

45
4.10 A Discussion on Assemblers

• After the second pass, the

assembly is complete.

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 4.10 A Discussion on Assemblers
• Assembly language puts the programmer closer to the architecture.
• As a programmer, the closest you can come to the processor of a
machine is by using assembly language. Here, you can write code
to access the registers and even deal with memory addresses
directly for retrieving values and pointers.
• e.g, embedded systems. These are systems in which the computer
is integrated into a device that is typically not a computer.
• These systems are designed to perform either a single instruction
or a very specific set of instructions. (cameras, medical
instruments (such as heart monitors))
*Assembly language puts the programmer closer to the architecture,
and thus, in firmer control.

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4.11 Extending Our Instruction Set

• So far, all of the MARIE instructions that we have

discussed use a direct addressing mode.
• This means that the address of the operand is explicitly
stated in the instruction.
• It is often useful to employ a indirect addressing, where the
address of the operand is given in the instruction.
– If you have ever used pointers in a program, you are
already familiar with indirect addressing.

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4.11 Extending Our Instruction Set

• To help you see what happens at the machine level, we

have included an indirect addressing mode instruction to
the MARIE instruction set.
• The ADDI instruction specifies the address of the
operand. The following RTL tells us what is happening
at the register level:
MAR  X
MBR  M[MAR]
MAR  MBR
MBR  M[MAR]
AC  AC + MBR
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 4.11 Extending Our Instruction Set

• Instead of using the value found at location X as the actual

address, we use the value found in X as a pointer to a new
memory location that contains the data we wish to use in the
instruction.
• For example, if we have the instruction AddI 400, we would go
to location 400, and assuming we found the value 240 stored at
location 400, we would go to location 240 to get the actual
operand for the instruction.
• CLEAR instruction set the contents of the accumulator to all
zeroes.
• This is the RTL for CLEAR:

AC  0 50
4.12 A Discussion on Decoding

HARDWIRED VS. MICROPROGRAMMED CONTROL

•A computer’s control unit keeps things synchronized, making
sure that bits flow to the correct components as the components
are needed.
•There are two general ways in which a control unit can be
implemented: hardwired control and microprogrammed
control. (ways in which control signals can be generated)
– With microprogrammed control, a small program is
placed into read-only memory in the microcontroller.
– Hardwired controllers implement this program using
digital logic components.
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 4.12 A Discussion on Decoding
• When the control signals are generated by hardware using
conventional logic design techniques, the control unit is said to be
hardwired.
• The control unit is implemented using hardware (with simple
NAND gates, flip-flops, and counters)
• The advantage of hardwired control is that it is very fast.
• The disadvantage is the complexity of the instruction set it can
implement is limited.
• the physical components in the computer must be changed.(which
is expensive)
• RISC is preferred for the hardwired because it is simple to design.

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4.12 A Discussion on Decoding

53
Fig. Hardwired Control Unit
 4.12 A Discussion on Decoding
• Microprogramming, uses software for control.(storing the
control signals in memory)
• In microprogrammed control, instruction microcode
produces control signal changes.
• All machine instructions are input into a special program,
the microprogram, to convert the instruction into the
appropriate control signals.
• The microprogram is essentially an interpreter, written in
microcode, that is stored in firmware (ROM, PROM, or
EPROM), which is often referred to as the control store.

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 4.12 A Discussion on Decoding

• This program converts machine instructions of zeros and

ones into control signals.
• A microcode instruction is retrieved during each clock
cycle.
• The advantage of this approach is that if the instruction
set requires modification, the microprogram is simply
updated to match.
*no change is required in the actual hardware.
• Microprogramming is flexible, simple in design,

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 4.12 A Discussion on Decoding

• Disadvantage is that all instructions must go through

an additional level of interpretation, slowing down the
program execution.
• Cost in time, there is a cost associated with the actual
development, because appropriate tools are required.
* For CISC architecture(preferable)

56
4.12 A Discussion on Decoding

57
Fig. microprogrammed control unit
 4.13 Real World Architectures

• MARIE shares many features with modern architectures

but it is not an accurate depiction of them.
• We will look at an Intel architecture, which is a CISC
machine and MIPS, which is a RISC machine.

– CISC is an acronym for complex instruction set

computer.
– RISC stands for reduced instruction set computer.
(this ISA allows to have fewer cycles per instruction)

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 4.13 Real World Architectures

RISC
•A reduced instruction set computer is a computer which
only uses simple commands that can be divided into several
instructions which achieve low-level operation within a
single CLK cycle.
•It is a CPU design plan based on simple orders and acts
fast.
•every instruction is expected to attain very small jobs. In
this machine, the instruction sets are modest and simple,
•Execution time is very less

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 4.13 Real World Architectures

CISC
•It is a CPU design plan based on single commands,
which are skilled in executing multi-step operations.
•CISC computers have small programs. It has a huge
number of compound instructions, which takes a long
time to perform.
•It has a memory unit to implement complex
instructions.

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 4.13 Real World Architectures

• The classic Intel architecture, the 8086, was developed

in 1979. It is a CISC architecture.
• It was adopted by IBM for its famed PC, which was
released in 1981.
• The 8086 operated on 16-bit data words and supported
20-bit memory addresses.
• Later, to lower costs, the 8-bit 8088 was introduced.
Like the 8086, it used 20-bit memory addresses.

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 4.13 Real World Architectures

• The 8086 had four 16-bit general-purpose registers that

could be accessed by the half-word.
• It also had a flags register, an instruction register, and a
stack accessed through the values in two other registers,
the base pointer and the stack pointer.
• The 8086 had no built in floating-point processing.
• In 1980, Intel released the 8087 numeric coprocessor,
but few users elected to install them because of their
cost.

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 4.13 Real World Architectures

• In 1985, Intel introduced the 32-bit 80386.

• It also had no built-in floating-point unit.
• The 80486, introduced in 1989, was an 80386 that had
built-in floating-point processing and cache memory.
• The 80386 and 80486 offered downward compatibility
with the 8086 and 8088.
• Software written for the smaller word systems was
directed to use the lower 16 bits of the 32-bit registers.

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 4.13 Real World Architectures

• Currently, Intel’s most advanced 32-bit microprocessor is

the Pentium 4.
• It can run as fast as 3.8 GHz. This clock rate is nearly 800
times faster than the 4.77 MHz of the 8086.
• Speed enhancing features include multilevel cache and
instruction pipelining.
• Intel, along with many others, is marrying many of the
ideas of RISC architectures with microprocessors that are
largely CISC.

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 4.13 Real World Architectures

• The MIPS family of CPUs has been one of the most

successful in its class.
• In 1986 the first MIPS CPU was announced.
• It had a 32-bit word size and could address 4GB of
memory.
• Over the years, MIPS processors have been used in
general purpose computers as well as in games.
• The MIPS architecture now offers 32- and 64-bit
versions.

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 4.13 Real World Architectures

• MIPS was one of the first RISC microprocessors.

• The original MIPS architecture had only 55 different
instructions, as compared with the 8086 which had over
100.
• MIPS was designed with performance in mind: It is a
load/store architecture, meaning that only the load and
store instructions can access memory.
• The large number of registers in the MIPS architecture
keeps bus traffic to a minimum.

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 Chapter 4 Conclusion

• The major components of a computer system are its

control unit, registers, memory, ALU, and data path.
• A built-in clock keeps everything synchronized.
• Control units can be microprogrammed or hardwired.
• Hardwired control units give better performance,
while microprogrammed units are more adaptable to
changes.

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 Chapter 4 Conclusion

• Computers run programs through iterative fetch-

decode-execute cycles.
• Computers can run programs that are in machine
language.
• An assembler converts mnemonic code to machine
language.
• The Intel architecture is an example of a CISC
architecture; MIPS is an example of a RISC
architecture.

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