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Instruction Set of 8085

Instruction Set of 8085

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36 views25 pages

Instruction Set of 8085

Instruction Set of 8085

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vijayalakshmis
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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INSTRUCTION SET OF

8085
Presented By
S.Vijayalakshmi B.E,
Assistant Professor,
Department of Computer Science,
Sri Sarada Niketan College for Women, Karur.
INSTRUCTION SET OF 8085
 An Instruction is a command given to the computer to
perform a specified operation on given data.
 The instruction set of a microprocessor is the collection

of the instructions that the microprocessor is designed


to execute.
 The instructions described here are of Intel 8085. These

instructions are of Intel Corporation.


 They cannot be used by other microprocessor

manufactures. The programmer can write a program in


assembly language using these instructions.
GROUPS
These instructions have been classified into the
following groups:
 Data Transfer Group
 Arithmetic Group
 Logical Group
 Branch Control Group
 I/O and Machine Control Group
Data Transfer Group
 Instructions, which are used to transfer data from one
register to another register, from memory to register or
register to memory, come under this group.
 Examples are: MOV, MVI, LXI, LDA, STA etc. When an
instruction of data transfer group is executed, data is
transferred from the source to the destination without
altering the contents of the source.
 For example, when MOV A, B is executed the content of
the register B is copied into the register A, and the content
of register B remains unaltered.
 Similarly, when LDA 2500 is executed the content of the
memory location 2500 is loaded into the accumulator. But
the content of the memory location 2500 remains unaltered.
Arithmetic Group
 The instructions of this group perform arithmetic operations such
as addition, subtraction; increment or decrement of the content of
a register or memory.

 Examples are: ADD, SUB, INR, DAD etc.

Logical Group
 The Instructions under this group perform logical operation such
as AND, OR, compare, rotate etc.

 Examples are: ANA, XRA, ORA, CMP, and RAL etc.


Branch Control Group

 This group includes the instructions for conditional and


unconditional jump, subroutine call and return, and
restart.

 Examples are: JMP, JC, JZ, CALL, CZ, RST etc.


I/O And Machine Control Group

 This group includes the instructions for input/output


ports, stack and machine control.

 Examples are: IN, OUT, PUSH, POP, and HLT etc.


Intel 8085 Instructions

Data Transfer Group

 MOV r1, r2 (Move Data; Move the content of the one


register to another). [r1] <-- [r2]
 MOV r, m (Move the content of memory register). r <-- [M]
 MOV M, r. (Move the content of register to memory). M <--
[r]
 MVI r, data. (Move immediate data to register). [r] <-- data.
 MVI M, data. (Move immediate data to memory). M <--
data.
Arithmetic Group

 ADD r. (Add register to accumulator) [A] <-- [A] + [r].


 ADD M. (Add memory to accumulator) [A] <-- [A] + [[H-
L]].
 ADC r. (Add register with carry to accumulator). [A] <--
[A] + [r] + [CS].
 ADC M. (Add memory with carry to accumulator) [A] <--
[A] + [[H-L]] [CS].
 ADI data (Add immediate data to accumulator) [A] <-- [A]
+ data.
 ACI data (Add with carry immediate data to accumulator).
[A] <-- [A] + data + [CS].
Logical Group
 ANA r. (AND register with accumulator) [A] <-- [A] ^ [r].
 ANA M. (AND memory with accumulator). [A] <-- [A] ^
[[H-L]].
 ANI data. (AND immediate data with accumulator) [A] <--
[A] ^ data.
 ORA r. (OR register with accumulator) [A] <-- [A] v [r].
 ORA M. (OR memory with accumulator) [A] <-- [A] v [[H-
L]]
 ORI data. (OR immediate data with accumulator) [A] <--
[A] v data.
 XRA r. (EXCLUSIVE – OR register with accumulator) [A]
<-- [A] v [r]
Branch Group
 JMP addr (label). (Unconditional jump: jump to the
instruction specified by the address). [PC] <-- Label.
 Conditional Jump addr (label)
 JZ addr (label). (Jump if the result is zero)
 JNZ addr (label) (Jump if the result is not zero)
 JC addr (label). (Jump if there is a carry)
 JNC addr (label). (Jump if there is no carry)
 JP addr (label). (Jump if the result is plus)
 JM addr (label). (Jump if the result is minus)
 JPE addr (label) (Jump if even parity)
 JPO addr (label) (Jump if odd parity)
Stack, I/O And Machine Control Group
◦ IN port-address. (Input to accumulator from I/O port) [A] <-- [Port]
◦ OUT port-address (Output from accumulator to I/O port) [Port] <-- [A]
◦ PUSH rp (Push the content of register pair to stack)
◦ PUSH PSW (PUSH Processor Status Word)
◦ POP rp (Pop the content of register pair, which was saved, from the
stack)
◦ POP PSW (Pop Processor Status Word)
◦ HLT (Halt)
◦ XTHL (Exchange stack-top with H-L)
◦ SPHL (Move the contents of H-L pair to stack pointer)
◦ EI (Enable Interrupts)
◦ DI (Disable Interrupts)
◦ SIM (Set Interrupt Masks)
◦ RIM (Read Interrupt Masks)
◦ NOP (No Operation)
Instruction and Data Formats
 The various techniques to specify data for instructions are:
 8-bit or 16-bit data may be directly given in the instruction itself.
 The address of the memory location, I/O port or I/O device,
where data resides, may be given in the instruction itself.
 In some instructions, only one register is specified. The content
of the specified register is one of the operands.
 Some instructions specify two registers. The contents of the
registers are the required data.
 In some instructions, data is implied. The most instructions of
this type operate on the content of the accumulator.
 Due to different ways of specifying data for instructions, the
machine codes of all instructions are not of the same length. It
may 1-byte, 2-byte or 3-byte instruction.
One-byte instructions
 A one-byte instruction includes an opcode and an
operand in the same byte.
 Operand(s) are internal registers and are in the

instruction in the codes.


 If there is no numeral present in the instruction then

that instruction will be of one-byte.


 For example, MOV C, A, RAL, and ADD B, etc.
Two-byte instructions
 In a two-byte instruction, the first byte specifies the
operation code and the 2nd byte specifies the operand.
The source operand is a data byte and immediately
following the opcode.
 If an 8-bit numeral is present in the instruction then that
instruction will be of two-byte. Here, the numeral may
be a data or an address. For example, in MVI A, 35H and
IN 29H, etc.
 In a two-byte instruction, the first byte will be the
opcode and the second byte will be for the numeral
present in the instruction.
Three-byte instructions
 In a three-byte instruction, the first byte specifies the
opcode, and the following two bytes specify the 16-bit
operand.
 The second byte is the low-order operand and the third

byte is the high-order operand. If a 16-bit numeral is


present in the instruction then that instruction will be of
three-byte.
 Here, the numeral may be a data or an address, for

example, in LXI H,3500H and STA 2500H, etc.


Addressing modes in Intel 8085
 The 8085 microprocessor has several addressing
modes that are used to access memory locations.
 Types of addressing modes –

In 8085 microprocessor there are 5 types of addressing


modes:
1.Immediate Addressing Mode
2. Register Addressing Mode
3. Direct Addressing Mode
4. Register Indirect Addressing Mode
5. Implied/Implicit Addressing Mode
Immediate Addressing Mode
 In immediate addressing mode the source operand is
always data. If the data is 8-bit, then the instruction will
be of 2 bytes, if the data is of 16-bit then the instruction
will be of 3 bytes.
 Examples:

MVI B 45 (move the data 45H immediately to


register B)
JMP address (jump to the operand address
immediately)
Register Addressing Mode
 In register addressing mode, the data to be operated is
available inside the register(s) and register(s) is(are)
operands.
 Therefore the operation is performed within various

registers of the microprocessor.

 Examples:
MOV A, B (move the contents of register B to
register A)
INR A (increment the contents of register A by one)
Direct Addressing Mode
 In direct addressing mode, the data to be operated is
available inside a memory location and that memory
location is directly specified as an operand. The
operand is directly available in the instruction itself.

 Examples:
LDA 2050 (load the contents of memory location
into accumulator A)
IN 35 (read the data from port whose address is 35)
Register Indirect Addressing Mode
 In register indirect addressing mode, the data to be
operated is available inside a memory location and that
memory location is indirectly specified by a register
pair.
 Examples:

MOV A, M (move the contents of the memory location


pointed by the H-L pair to the accumulator)
LDAX B (move contents of B-C register to the
accumulator)
Implied/Implicit Addressing Mode
 In implied/implicit addressing mode the operand is
hidden and the data to be operated is available in the
instruction itself.

 Examples:
RRC (rotate accumulator A right by one bit)
RLC (rotate accumulator A left by one bit)
Features of the addressing modes
 Immediate addressing
 Direct addressing
 Indirect addressing
 Register addressing
 Indexed addressing
 Relative addressing
 Memory-mapped I/O addressing
Advantages & Disadvantages
Advantages:
 Versatility
 Efficient memory usage
 Easy to use
 Improved performance

Disadvantages:
 Complexity
 Overhead
 Debugging difficulties
 Limitations
THANK YOU

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