Contents:

Introduction
Block Diagram and Pin Description of the 8051
Registers
Some Simple Instructions
Structure of Assembly language and Running
an 8051 program
Memory mapping in 8051
8051 Flag bits and the PSW register
Addressing Modes
16-bit, BCD and Signed Arithmetic in 8051
Stack in the 8051
LOOP and JUMP Instructions
CALL Instructions
I/O Port Programming
 Introduction
General-purpose microprocessor
• CPU for Computers
• No RAM, ROM, I/O on CPU chip itself
• Example ： Intel’s x86, Motorola’s 680x0

Many chips on mother’s board

Data Bus
CPU
General-
Serial
Purpose RAM ROM I/O Timer COM
Micro- Port
Port
processor

Address Bus

General-Purpose Microprocessor System

 Microcontroller :
• A smaller computer
• On-chip RAM, ROM, I/O ports...
• Example ： Motorola’s 6811, Intel’s 8051, Zilog’s Z8 and PIC 16X

CPU RAM ROM

A single chip
Serial
I/O Timer COM
Port
Port
Microcontroller
Microprocessor vs. Microcontroller

Microprocessor Microcontroller
• CPU is stand-alone, RAM, • CPU, RAM, ROM, I/O and
ROM, I/O, timer are separate timer are all on a single chip
• designer can decide on the • fix amount of on-chip ROM,
amount of ROM, RAM and RAM, I/O ports
I/O ports. • for applications in which cost,
• expansive power and space are critical
• versatility • single-purpose
• general-purpose
 Embedded System
• Embedded system means the processor is embedded into that
application.
• An embedded product uses a microprocessor or microcontroller to
do one task only.
• In an embedded system, there is only one application software that
is typically burned into ROM.
• Example ： printer, keyboard, video game player
 Three criteria in Choosing a Microcontroller

1. meeting the computing needs of the task efficiently and cost

effectively
• speed, the amount of ROM and RAM, the number of I/O ports
and timers, size, packaging, power consumption
• easy to upgrade
• cost per unit
2. availability of software development tools
• assemblers, debuggers, C compilers, emulator, simulator,
technical support
3. wide availability and reliable sources of the microcontrollers.
 Block Diagram
External interrupts
On-chip Timer/Counter

Interrupt ROM for

On-chip Timer 1 Counter
Control program
RAM Timer 0 Inputs
code

CPU

Bus Serial
4 I/O Ports
OSC Control Port

P0 P1 P2 P3 TxD RxD
Address/Data
 Comparison of the 8051 Family Members

Feature 8051 8052 8031

ROM (program space in bytes) 4K 8K 0K
RAM (bytes) 128 256 128
Timers 2 3 2
I/O pins 32 32 32
Serial port 1 1 1
Interrupt sources 6 8 6
 Pin Description of the 8051
PDIP/Cerdip
P1.0 1 40 Vcc
P1.1 2 39 P0.0(AD0
P1.2 3 38 )P0.1(AD1)
P1.3
P1.4
4
5
8051 37
36
P0.2(AD2
P
) 0.3(AD3)
P1.5 6 (8031) 35 P0.4(AD4)
P1.6 7 34 P0.5(AD5)
P1.7 8 33 P0.6(AD6)
RST 9 32 P0.7(AD7)
(RXD)P3.0 10 31 EA/VPP
(TXD)P3.1 11 30 ALE/PROG
(INT0)P3.2 12 29 PSEN
(INT1)P3.3 13 28 P2.7(A15)
(T0)P3.4 14 27 P2.6(A14
(T1)P3.5 15 26 )P2.5(A13
(WR)P3.6 16 25 P
) 2.4(A12
(RD)P3.7 17 24 )P2.3(A11)
XTAL2 18 23 P2.2(A10)
XTAL1 19 22 P2.1(A9)
GND 20 21 P2.0(A8) 
 Pins of 8051 （ 1/4 ）

• Vcc （ pin 40 ）：
– Vcc provides supply voltage to the chip.
– The voltage source is +5V.
• GND （ pin 20 ）： ground
• XTAL1 and XTAL2 （ pins 19,18 ）：
– These 2 pins provide external clock.
– Way 1 ： using a quartz crystal oscillator 
– Way 2 ： using a TTL oscillator 
– Example 4-1 shows the relationship between XTAL and the
machine cycle. 
 Pins of 8051 （ 2/4 ）

• RST （ pin 9 ）： reset

– It is an input pin and is active high （ normally low ） .
• The high pulse must be high at least 2 machine cycles.
– It is a power-on reset.
• Upon applying a high pulse to RST, the microcontroller will
reset and all values in registers will be lost.
• Reset values of some 8051 registers 
– Way 1 ： Power-on reset circuit 
– Way 2 ： Power-on reset with debounce 
 Pins of 8051 （ 3/4 ）

• /EA （ pin 31 ）： external access

– There is no on-chip ROM in 8031 and 8032 .
– The /EA pin is connected to GND to indicate the code is stored
externally.
– /PSEN ＆ ALE are used for external ROM.
– For 8051, /EA pin is connected to Vcc.
– “/” means active low.
• /PSEN （ pin 29 ）： program store enable
– This is an output pin and is connected to the OE pin of the ROM.
– See Chapter 14.
 Pins of 8051 （ 4/4 ）

• ALE （ pin 30 ）： address latch enable

– It is an output pin and is active high.
– 8051 port 0 provides both address and data.
– The ALE pin is used for de-multiplexing the address and data by
connecting to the G pin of the 74LS373 latch.
• I/O port pins
– The four ports P0, P1, P2, and P3.
– Each port uses 8 pins.
– All I/O pins are bi-directional.
 Figure 4-2 (a). XTAL Connection to 8051

• Using a quartz crystal oscillator

• We can observe the frequency on the XTAL2 pin.

C2
XTAL2
30pF

C1
XTAL1
30pF

GND


Figure 4-2 (b). XTAL Connection to an External Clock Source

N XTAL2
C
• Using a TTL oscillator
• XTAL2 is unconnected. EXTERNAL
OSCILLATOR
SIGNAL XTAL1

GND


 Example :

Find the machine cycle for

(a) XTAL = 11.0592 MHz
(b) XTAL = 16 MHz.

Solution:

(a) 11.0592 MHz / 12 = 921.6 kHz;

machine cycle = 1 / 921.6 kHz = 1.085  s
(b) 16 MHz / 12 = 1.333 MHz;
machine cycle = 1 / 1.333 MHz = 0.75  s


 RESET Value of Some 8051 Registers:

Register Reset Value

PC 0000
ACC 0000
B 0000
PSW 0000
SP 0007
DPTR 0000
RAM are all zero.

 Figure 4-3 (a). Power-On RESET Circuit
Vcc

10 uF 31
EA/VPP
30 pF X1
19
11.0592 MHz
8.2 K
X2
18
30 pF
9 RST


Figure 4-3 (b). Power-On RESET with Debounce

Vcc

31
EA/VPP
X1
10 uF 30 pF

X2
RST
9
8.2 K


 Pins of I/O Port

• The 8051 has four I/O ports

– Port 0 （ pins 32-39 ）： P0 （ P0.0 ～ P0.7 ）
– Port 1 （ pins 1-8 ） ： P1 （ P1.0 ～ P1.7 ）
– Port 2 （ pins 21-28 ）： P2 （ P2.0 ～ P2.7 ）
– Port 3 （ pins 10-17 ）： P3 （ P3.0 ～ P3.7 ）
– Each port has 8 pins.
• Named P0.X （ X=0,1,...,7 ） , P1.X, P2.X, P3.X
• Ex ： P0.0 is the bit 0 （ LSB ） of P0
• Ex ： P0.7 is the bit 7 （ MSB ） of P0
• These 8 bits form a byte.
• Each port can be used as input or output (bi-direction).

 Registers
A

R0
DPTR DPH DPL
R1

R2 PC PC
R3

R4 Some 8051 16-bit Register

R5

R6

R7

Some 8-bitt Registers of

the 8051
 Some Simple Instructions
MOV dest,source ; dest = source

MOV A,#72H ;A=72H

MOV A, #’r’ ;A=‘r’ OR 72H
MOV R4,#62H ;R4=62H
MOV B,0F9H ;B=the content of F9’th byte of RAM

MOV DPTR,#7634H
MOV DPL,#34H
MOV DPH,#76H

MOV P1,A ;mov A to port 1

Note 1:
MOV A,#72H ≠ MOV A,72H
After instruction “MOV A,72H ” the content of 72’th byte of RAM will replace in Accumulator.

8086 8051
MOV AL,72H MOV A,#72H
MOV AL,’r’ MOV A,#’r’
MOV BX,72H
MOV AL,[BX] MOV A,72H
Note 2:
MOV A,R3 ≡ MOV A,3
ADD A, Source ;A=A+SOURCE

ADD A,#6 ;A=A+6

ADD A,R6 ;A=A+R6

ADD A,6 ;A=A+[6] or A=A+R6

ADD A,0F3H ;A=A+[0F3H]

SETB bit ; bit=1
CLR bit ; bit=0

SETB C ; CY=1
SETB P0.0 ;bit 0 from port 0 =1
SETB P3.7 ;bit 7 from port 3 =1
SETB ACC.2 ;bit 2 from ACCUMULATOR =1
SETB 05 ;set high D5 of RAM loc. 20h

Note: Bit Addressable

Page 359,360
CLR instruction is as same as SETB
i.e:
CLR C ;CY=0

But following instruction is only for CLR:

CLR A ;A=0
SUBB A,source ;A=A-source-CY

SETB C ;CY=1
SUBB A,R5 ;A=A-R5-1

ADC A,source ;A=A+source+CY

SETB C ;CY=1
ADC A,R5 ;A=A+R5+1
DEC byte ;byte=byte-1
INC byte ;byte=byte+1

INC R7
DEC A
DEC 40H ; [40]=[40]-1

CPL A ;1’s complement

Example:
MOV A,#55H ;A=01010101 B
L01: CPL A
MOV P1,A
ACALL DELAY
SJMP L01  CALL
NOP & RET & RETI
All are like 8086 instructions.
ANL - ORL - XRL
EXAMPLE:
MOV R5,#89H
ANL R5,#08H

RR – RL – RRC – RLC A
EXAMPLE:
RR A
 Structure of Assembly language
and Running an 8051 program
EDITOR
PROGRAM
ORG 0H Myfile.asm
MOV R5,#25H ASSEMBLER

MOV R7,#34H PROGRAM

Myfile.lst
MOV A,#0 Myfile.obj
Other obj file

ADD A,R5 LINKER

PROGRAM
ADD A,#12H
HERE: SJMP HERE Myfile.abs

END OH
PROGRAM

Myfile.hex
 Memory mapping in 8051

• ROM memory map in 8051 family

4k 8k 32k
0000H 0000H 0000H

0FFFH
DS5000-32

1FFFH
8751
AT89C51
8752
AT89C52 7FFFH

from Atmel Corporation

from Dallas Semiconductor
• RAM memory space allocation in the 8051

7FH

Scratch pad RAM

30H

2FH
Bit-Addressable RAM

20H
1FH Register Bank 3
18H
17H
Register Bank 2
10H
0FH Register Bank 1 )Stack(
08H
07H
Register Bank 0
00H
 8051 Flag bits and the PSW register
• PSW Register
CY AC F0 RS1 RS0 OV -- P

Carry flag PSW.7 CY

Auxiliary carry flag PSW.6 AC
Available to the user for general purpose PSW.5 --
Register Bank selector bit 1 PSW.4 RS1
Register Bank selector bit 0 PSW.3 RS0
Overflow flag PSW.2 OV
User define bit PSW.1 --
Parity flag Set/Reset odd/even parity PSW.0 P

RS1 RS0 Register Bank Address

0 0 0 00H-07H

0 1 1 08H-0FH

1 0 2 10H-17H

1 1 3 18H-1FH
Instructions that Affect Flag Bits:

Note: X can be 0 or 1
Example:
MOV A,#88H
ADD A,#93H

88 10001000
+93 +10010011
---- --------------
11B 00011011 Example:
CY=1 AC=0 P=0 MOV A,#9CH
ADD A,#64H

9C 10011100
Example: +64 +01100100
MOV A,#38H ---- --------------
ADD A,#2FH 100 00000000
CY=1 AC=1 P=0
38 00111000
+2F +00101111
---- --------------
67 01100111
CY=0 AC=1 P=1
 Addressing Modes
• Immediate
• Register
• Direct
• Register Indirect
• Indexed
 Immediate Addressing Mode
MOV A,#65H
MOV A,#’A’
MOV R6,#65H
MOV DPTR,#2343H
MOV P1,#65H

Example :

Num EQU 30
…
MOV R0,Num
MOV DPTR,#data1
…
ORG 100H
data1: db “IRAN”
 Register Addressing Mode
MOV Rn, A ;n=0,..,7
ADD A, Rn
MOV DPL, R6

MOV DPTR, A
MOV Rm, Rn
 Direct Addressing Mode
Although the entire of 128 bytes of RAM can be accessed using direct
addressing mode, it is most often used to access RAM loc. 30 – 7FH.

MOV R0, 40H

MOV 56H, A
MOV A, 4 ; ≡ MOV A, R4
MOV 6, 2 ; copy R2 to R6
; MOV R6,R2 is invalid !

SFR register and their address

Bit Addressable
MOV 0E0H, #66H ; ≡ MOV A,#66H Page 359,360
MOV 0F0H, R2 ; ≡ MOV B, R2
MOV 80H,A ; ≡ MOV P1,A
 Register Indirect Addressing Mode
• In this mode, register is used as a pointer to the data.

MOV A,@Ri ; move content of RAM loc.Where address is held by Ri into

A
( i=0 or 1 )
MOV @R1,B

In other word, the content of register R0 or R1 is sources or target in MOV, ADD and SUBB
insructions.
Example:
Write a program to copy a block of 10 bytes from RAM location sterting at 37h to RAM
location starting at 59h.

Solution:
MOV R0,#37h ; source pointer
MOV R1,#59h ; dest pointer
MOV R2,#10 ; counter
L1: MOV A,@R0
MOV @R1,A
INC R0  jump
INC R1
DJNZ R2,L1
 Indexed Addressing Mode And On-Chip
ROM Access
• This mode is widely used in accessing data elements
of look-up table entries located in the program (code)
space ROM at the 8051

MOVC A,@A+DPTR
A= content of address A +DPTR from ROM
Note:
Because the data elements are stored in the program
(code ) space ROM of the 8051, it uses the instruction
MOVC instead of MOV. The “C” means code.
• Example:
Assuming that ROM space starting at 250h contains “Hello.”, write a program to transfer the
bytes into RAM locations starting at 40h.
Solution:
ORG 0
MOV DPTR,#MYDATA
MOV R0,#40H
L1: CLR A
MOVC A,@A+DPTR
JZ L2
MOV @R0,A
INC DPTR
INC R0
SJMP L1
L2: SJMP L2
;-------------------------------------
ORG 250H
MYDATA:DB “Hello”,0

END

Notice the NULL character ,0, as end of string and how we use the JZ instruction to
detect that.
• Example:
Write a program to get the x value from P1 and send x 2 to P2, continuously .
Solution:
ORG 0
MOV DPTR, #TAB1
MOV A,#0FFH
MOV P1,A
L01:
MOV A,P1
MOVC A,@A+DPTR
MOV P2,A
SJMP L01
;----------------------------------------------------
ORG 300H
TAB1: DB 0,1,4,9,16,25,36,49,64,81

END
 16-bit, BCD and Signed
Arithmetic in 8051
Exercise:

 Write a program to add n 16-bit number. Get n

from port 1. And sent Sum to LCD
a) in hex
b) in decimal

 Write a program to subtract P1 from P0 and

send result to LCD
(Assume that “ACAL DISP” display A to LCD )
 MUL & DIV
• MUL AB ;B|A = A*B
MOV A,#25H
MOV B,#65H
MUL AB ;25H*65H=0E99
;B=0EH, A=99H
• MUL AB ;A = A/B, B = A mod B
MOV A,#25
MOV B,#10
MUL AB ;A=2, B=5
 Stack in the 8051
• The register used to access
7FH
the stack is called SP (stack
pointer) register. Scratch pad RAM

30H
• The stack pointer in the 2FH
8051 is only 8 bits wide, Bit-Addressable RAM

which means that it can take 20H

1FH
value 00 to FFH. When 18H
Register Bank 3

8051 powered up, the SP 17H

Register Bank 2
10H
register contains value 07. 0FH Register Bank 1 )Stack(
08H
07H
Register Bank 0
00H
Example:
MOV R6,#25H
MOV R1,#12H
MOV R4,#0F3H
PUSH 6
PUSH 1
PUSH 4

0BH 0BH 0BH 0BH

0AH 0AH 0AH 0AH F3

09H 09H 09H 12 09H 12

08H 08H 25 08H 25 08H 25

Start SP=07H SP=08H SP=09H SP=08H

 LOOP and JUMP Instructions
 DJNZ:

Write a program to clear ACC, then

add 3 to the accumulator ten time

Solution:
MOV A,#0;
MOV R2,#10
AGAIN: ADD A,#03
DJNZ R2,AGAING ;repeat until R2=0 (10 times)
MOV R5,A
• Other conditional jumps :

JZ Jump if A=0

JNZ Jump if A/=0

DJNZ Decrement and jump if A/=0

CJNE A,byte Jump if A/=byte

CJNE reg,#data Jump if byte/=#data

JC Jump if CY=1

JNC Jump if CY=0

JB Jump if bit=1

JNB Jump if bit=0

JBC Jump if bit=1 and clear bit

SJMP and LJMP:

LJMP(long jump)
LJMP is an unconditional jump. It is a 3-byte instruction in
which the first byte is the opcode, and the second and third
bytes represent the 16-bit address of the target location. The
20byte target address allows a jump to any memory location
from 0000 to FFFFH.
SJMP(short jump)
In this 2-byte instruction. The first byte is the opcode and the
second byte is the relative address of the target location. The
relative address range of 00-FFH is divided into forward and
backward jumps, that is , within -128 to +127 bytes of
memory relative to the address of the current PC.
 CJNE , JNC
Exercise:

Write a program that compare R0,R1.

If R0>R1 then send 1 to port 2,
else if R0<R1 then send 0FFh to port 2,
else send 0 to port 2.
 CALL Instructions
Another control transfer instruction is the CALL
instruction, which is used to call a subroutine.

• LCALL(long call)
In this 3-byte instruction, the first byte is the opcode
an the second and third bytes are used for the address
of target subroutine. Therefore, LCALL can be used
to call subroutines located anywhere within the 64K
byte address space of the 8051.
• ACALL (absolute call)

ACALL is 2-byte instruction in contrast to LCALL,

which is 13 bytes. Since ACALL is a 2-byte instruction,
the target address of the subroutine must be within 2K
bytes address because only 11 bits of the 2 bytes are used
for the address. There is no difference between ACALL
and LCALL in terms of saving the program counter on
the stack or the function of the RET instruction. The only
difference is that the target address for LCALL can be
anywhere within the 64K byte address space of the 8051
while the target address of ACALL must be within a 2K-
byte range.
 I/O Port Programming
Port 1 （ pins 1-8 ）


• Port 1 is denoted by P1.

– P1.0 ~ P1.7
• We use P1 as examples to show the operations on ports.
– P1 as an output port (i.e., write CPU data to the external pin)
– P1 as an input port (i.e., read pin data into CPU bus)
 A Pin of Port 1

Read latch Vcc

TB2
Load(L1)

Internal CPU D Q P1.X

bus P1.X pin

Write to latch Clk Q M1

TB1
Read pin P0.x
8051 IC
 Hardware Structure of I/O Pin
• Each pin of I/O ports
– Internal CPU bus ： communicate with CPU
– A D latch store the value of this pin
• D latch is controlled by “Write to latch”
– Write to latch ＝ 1 ： write data into the D latch
– 2 Tri-state buffer ：
• TB1: controlled by “Read pin”
– Read pin ＝ 1 ： really read the data present at the pin
• TB2: controlled by “Read latch”
– Read latch ＝ 1 ： read value from internal latch
– A transistor M1 gate
• Gate=0: open
• Gate=1: close
 Tri-state Buffer

Output Input

Tri-state control
(active high)

L L H H Low

H H Highimpedance
(open-circuit)


 Writing “1” to Output Pin P1.X

Read latch Vcc

TB2
Load(L1) 2. output pin is
1. write a 1 to the pin Vcc
Internal CPU D Q 1 P1.X
bus P1.X pin

Clk Q 0 M1
output 1
Write to latch

TB1
Read pin

8051 IC
 Writing “0” to Output Pin P1.X

Read latch Vcc

TB2
Load(L1) 2. output pin is
1. write a 0 to the pin ground
Internal CPU D Q 0 P1.X
bus P1.X pin

Clk Q 1 M1
output 0
Write to latch

TB1
Read pin

8051 IC
 Port 1 as Output （ Write to a Port ）
• Send data to Port 1 ：

MOV A,#55H
BACK: MOV P1,A
ACALL DELAY
CPL A
SJMP BACK

– Let P1 toggle.
– You can write to P1 directly.
 Reading Input v.s. Port Latch
• When reading ports, there are two possibilities ：
– Read the status of the input pin. （ from external pin value ）
• MOV A, PX
• JNB P2.1, TARGET ; jump if P2.1 is not set
• JB P2.1, TARGET ; jump if P2.1 is set
• Figures C-11, C-12
– Read the internal latch of the output port.
• ANL P1, A ; P1 ← P1 AND A
• ORL P1, A ; P1 ← P1 OR A
• INC P1 ; increase P1
• Figure C-17
• Table C-6 Read-Modify-Write Instruction (or Table 8-5)
• See Section 8.3
 Reading “High” at Input Pin

Read latch Vcc 2. MOV A,P1

TB2 external pin=High
1. write a 1 to the pin MOV Load(L1)
P1,#0FFH

1 1 P1.X pin
Internal CPU bus D Q
P1.X
0 M1
Write to latch Clk Q

TB1
Read pin
3. Read pin=1 Read latch=0
Write to latch=1
8051 IC
 Reading “Low” at Input Pin

Read latch Vcc 2. MOV A,P1

TB2
1. write a 1 to the pin Load(L1) external pin=Low
MOV P1,#0FFH
1 0 P1.X pin
Internal CPU bus D Q
P1.X
0 M1
Write to latch Clk Q

TB1
Read pin
3. Read pin=1 Read latch=0
Write to latch=1
8051 IC
 Port 1 as Input （ Read from Port ）
• In order to make P1 an input, the port must be programmed by writing 1 to
all the bit.

MOV A,#0FFH ;A=11111111B

MOV P1,A ;make P1 an input port
BACK: MOV A,P1 ;get data from P0
MOV P2,A ;send data to P2
SJMP BACK

– To be an input port, P0, P1, P2 and P3 have similar methods.

 Instructions For Reading an Input Port
• Following are instructions for reading external pins of ports:

Mnemonics Examples Description

Bring into A the data at P2
MOV A,PX MOV A,P2
pins
JNB PX.Y,.. JNB P2.1,TARGET Jump if pin P2.1 is low

JB PX.Y,.. JB P1.3,TARGET Jump if pin P1.3 is high

MOV C,PX.Y MOV C,P2.4 Copy status of pin P2.4 to CY

 Reading Latch
• Exclusive-or the Port 1 ：
MOV P1,#55H ;P1=01010101
ORL P1,#0F0H ;P1=11110101
1. The read latch activates TB2 and bring the data from the Q latch into
CPU.
• Read P1.0=0
2. CPU performs an operation.
• This data is ORed with bit 1 of register A. Get 1.
3. The latch is modified.
• D latch of P1.0 has value 1.
4. The result is written to the external pin.
• External pin (pin 1: P1.0) has value 1.
 Reading the Latch
1. Read pin=0 Read latch=1 Write to
latch=0 (Assume P1.X=0 initially)

Read latch Vcc

TB2
2. CPU compute P1.X OR 1 Load(L1)
0 4. P1.X=1

0 1 P1.X pin
Internal CPU bus D Q
1 P1.X
0
Write to latch Clk Q M1
3. write result to latch Read
pin=0 Read latch=0
Write to latch=1

TB1
Read pin

8051 IC
 Read-modify-write Feature
• Read-modify-write Instructions
– Table C-6
• This features combines 3 actions in a single instruction ：
1. CPU reads the latch of the port
2. CPU perform the operation
3. Modifying the latch
4. Writing to the pin
– Note that 8 pins of P1 work independently.
 Port 1 as Input （ Read from latch ）

• Exclusive-or the Port 1 ：

MOV P1,#55H ;P1=01010101
AGAIN: XOR P1,#0FFH ;complement
ACALL DELAY
SJMP AGAIN
– Note that the XOR of 55H and FFH gives AAH.
– XOR of AAH and FFH gives 55H.
– The instruction read the data in the latch (not from the pin).
– The instruction result will put into the latch and the pin.
Read-Modify-Write Instructions
Mnemonics Example

ANL ANL P1,A

ORL ORL P1,A
XRL XRL P1,A
JBC PX.Y, TARGET JBC P1.1, TARGET
CPL CPL P1.2
INC INC P1
DEC DEC P1
DJNZ PX, TARGET DJNZ P1,TARGET
MOV PX.Y,C MOV P1.2,C
CLR PX.Y CLR P1.3
SETB PX.Y SETB P1.4
 You are able to answer this Questions:

• How to write the data to a pin ？

• How to read the data from the pin ？
– Read the value present at the external pin.
• Why we need to set the pin first ？
– Read the value come from the latch （ not from the external
pin ） .
• Why the instruction is called read-modify write?
 Other Pins
• P1, P2, and P3 have internal pull-up resisters.
– P1, P2, and P3 are not open drain.
• P0 has no internal pull-up resistors and does not connects to
Vcc inside the 8051.
– P0 is open drain.
– Compare the figures of P1.X and P0.X. 
• However, for a programmer, it is the same to program P0, P1,
P2 and P3.
• All the ports upon RESET are configured as output.
 A Pin of Port 0

Read latch
TB2

Internal CPU D Q P0.X

bus P1.X pin

Write to latch Clk Q M1

TB1
Read pin P1.x
8051 IC
 Port 0 （ pins 32-39 ）
• P0 is an open drain.
– Open drain is a term used for MOS chips in the same way
that open collector is used for TTL chips. 
• When P0 is used for simple data I/O we must connect it to
external pull-up resistors.
– Each pin of P0 must be connected externally to a 10K ohm
pull-up resistor.
– With external pull-up resistors connected upon reset, port 0
is configured as an output port.
 Port 0 with Pull-Up Resistors

Vcc
10 K

Port 0
P0.0
DS5000 P0.1
P0.2
8751 P0.3
8951 P0.4
P0.5
P0.6
P0.7
 Dual Role of Port 0
• When connecting an 8051/8031 to an external memory, the 8051
uses ports to send addresses and read instructions.
– 8031 is capable of accessing 64K bytes of external memory.
– 16-bit address ： P0 provides both address A0-A7, P2 provides
address A8-A15.
– Also, P0 provides data lines D0-D7.
• When P0 is used for address/data multiplexing, it is connected to the
74LS373 to latch the address.
– There is no need for external pull-up resistors as shown in
Chapter 14.
 74LS373
PSEN OE
ALE 74LS373 OC
G
P0.0 A0
D
P0.7 A7

D0
D7
EA

P2.0 A8
P2.7 A15

8051 ROM
 Reading ROM (1/2)
2. 74373 latches the
1. Send address to
PSEN address and send to
ROM OE
ALE ROM
G 74LS373 OC
P0.0 A0
D
P0.7 A7
Address

D0
D7
EA

P2.0 A8
P2.7 A12

8051 ROM
 Reading ROM (2/2)
2. 74373 latches the
address and send to
PSEN ROM OE
ALE 74LS373 OC
G
P0.0 A0
D
P0.7 Address A7

D0
D7
EA 3. ROM send the
instruction back
P2.0 A8
P2.7 A12

8051 ROM
 ALE Pin
• The ALE pin is used for de-multiplexing the
address and data by connecting to the G pin of
the 74LS373 latch.
– When ALE=0, P0 provides data D0-D7.
– When ALE=1, P0 provides address A0-A7.
– The reason is to allow P0 to multiplex address and
data.
 Port 2 （ pins 21-28 ）
• Port 2 does not need any pull-up resistors
since it already has pull-up resistors internally.
• In an 8031-based system, P2 are used to
provide address A8-A15.
 Port 3 （ pins 10-17 ）
• Port 3 does not need any pull-up resistors since it already
has pull-up resistors internally.
• Although port 3 is configured as an output port upon reset,
this is not the way it is most commonly used.
• Port 3 has the additional function of providing signals.
– Serial communications signal ： RxD, TxD （ Chapter
10 ）
– External interrupt ： /INT0, /INT1 （ Chapter 11 ）
– Timer/counter ： T0, T1 （ Chapter 9 ）
– External memory accesses in 8031-based
system ： /WR, /RD （ Chapter 14 ）
Port 3 Alternate Functions
P3 Bit Function Pin

P3.0 RxD 10
P3.1 TxD 11
P3.2 INT0 12
P3.3 INT1 13
P3.4 T0 14
P3.5 T1 15
P3.6 WR 16
P3.7 RD 17 
 Contents:
I/O Programming; Bit
Manipulation
Time delay Generation and
calculation
Timer/Counter Programming
-Timers
- Counters
Interrupts Programming
Serial Communication
 I/O Programming; Bit Manipulation
• To toggle every bit of P1 continuously, 3 ways exists:
• Way 1: Send data to Port 1 through ACC ：
BACK: MOV A,#55H ;A=01010101B
MOV P1,A
ACALL DELAY
MOV A,#0AAH ;A=10101010B
MOV P1,A
ACALL DELAY
SJMP BACK
• Way 2: Access Port 1 directly ：
BACK: MOV P1,#55H ;P1=01010101B
ACALL DELAY
MOV P1,#0AAH ;P1=10101010B
ACALL DELAY
SJMP BACK
• Read-modify-write feature ：
MOV P1,#55H ;P1=01010101B
AGAIN: XRL P1,#0FFH
ACALL DELAY
SJMP AGAIN

– The instruction XRL P1,#0FFH do EX-OR P1 and FFH （ That is, to toggle P1. ）
 Bit Manipulation
• Sometimes we need to access only 1 or 2 bits of the port instead of the entire 8
bits.
• This table shows how to name each pin for each I/O port. 
• Example:

Write a program to perform the following.

(a) Keep monitoring the P1.2 bit until it becomes high,
(b) When P1.2 becomes high, write value 45H to port 0, and
(c) Send a high-to-low (H-to-L) pulse to P2.3.

Solution:
SETB P1.2 ;make P1.2 an input
MOV A,#45H ;A=45H
AGAIN:JNB P1.2,AGAIN;get out when P.2=1
MOV P0,A ;issue A to P0
SETB P2.3 ;make P2.3 high
CLR P2.3 ;make P2.3 low for H-to-L
Note ：
1. JNB: jump if no bit （ jump if P1.2 = 0 ）
2. a H-to-L pulse by the sequence of instructions SETB and CLR.
Single-Bit Addressability of Ports
P0 P1 P2 P3 Port Bit
P0. P1. P2. P3. D0
P0.
0 P1.
0 P2.
0 P3.
0 D1
P0.
1 P1.
1 P2.
1 P3.
1 D2
P0.
2 P1.
2 P2.
2 P3.
2 D3
P0.
3 P1.
3 P2.
3 P3.
3 D4
P0.
4 P1.
4 P2.
4 P3.
4 D5
P0.
5 P1.
5 P2.
5 P3.
5 D6
P0.
6 P1.
6 P2.
6 P3.
6 D7
7 7 7 7

 Time delay Generation and
calculation
• Machine cycle

• For the CPU to execute an instruction takes a certain

number of block cycles. In the 8051 family, these clock
cycles are referred to as machine cycles.

• The frequency of the crystal connected to the 8051

family ca vary from 4MHz to 30 MHz, depending on the
chip rating and manufacturer. Very often the 11.0592
MHz crystal oscillator is used to make the 8051-based
system compatible with the serial port of the IBM PC.

• In the 8051, one machine cycle lasts 12 oscillator

periods.
Example:
Find the time delay for the following subroutine,
assuming a crystal frequency of 11.0592 MHz

DELAY: MOV R3,#250 ; 1 MC

HERE: NOP ; 1 MC
NOP ; 1 MC
NOP ; 1 MC
NOP ; 1 MC
DJNZ R3,HERE ; 2 MC
RET ; 1 MC

Solution:
250x(1+1+1+1+2)+2x1.085 us=1627.5 us
 Timers /Counters Programming
• The 8051 has 2 timers/counters:
timer/counter 0 and timer/counter 1. They
can be used as
1. The timer is used as a time delay
generator.
– The clock source is the internal crystal
frequency of the 8051.
2. An event counter.
– External input from input pin to count the
number of events on registers.
– These clock pulses cold represent the
 Timer
• Set the initial value of registers
• Start the timer and then the 8051 counts
up.
• Input from internal system clock
8051
(machine cycle)
• When the registers equal to 0 and the
P2 P1 to
8051 sets a bit toSet denote time out LCD
Timer 0 TH0

TL0
 Counter
• Count the number of events
– Show the number of events on registers
– External input from T0 input pin (P3.4) for
Counter 0
– External input from T1 input 8051
pin (P3.5) for
Counter 1 TH0
– External input from Tx input pin.P1 to
TL0
– We use Tx to denote T0 or T1. LCD
P3.4
a switch T0
 Registers Used in
Timer/Counter
• TH0, TL0, TH1, TL1
• TMOD (Timer mode register)
• TCON (Timer control register)
• You can see Appendix H (pages 413-415)
for details.
• Since 8052 has 3 timers/counters, the
formats of these control registers are
different.
– T2CON (Timer 2 control register), TH2 and
TL2 used for 8052 only.
 Basic Registers of the Timer
• Both timer 0 and timer 1 are 16 bits wide.
– These registers stores
• the time delay as a timer
• the number of events as a counter
– Timer 0: TH0 & TL0
• Timer 0 high byte, timer 0 low byte
– Timer 1: TH1 & TL1
• Timer 1 high byte, timer 1 low byte
– Each 16-bit timer can be accessed as two
separate registers of low byte and high byte.
 Timer Registers

TH0 TL0

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

Timer 0

TH1 TL1

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

Timer 1
 TMOD Register
• Timer mode register: TMOD
MOV TMOD,#21H
– An 8-bit register
– Set the usage mode for two timers
• Set lower 4 bits for Timer 0 (Set to 0000 if not
used)
• Set upper 4 bits for Timer 1 (Set to 0000 if not
(MSB) used) (LSB)
– NotC/T
GATE bit-addressable
M1 M0 GATE C/T M1 M0
Timer 1 Timer 0
 Figure 9-3. TMOD Register
GATE Gating control when set. Timer/counter is
enabled only while the INTx pin is high and
the TRx control pin is set. When cleared, the
timer is enabled whenever the TRx control
bit is set.
C/T Timer or counter selected cleared for timer
operation (input from internal system clock).
Set for counter operation (input from Tx
input pin).
(MSB) (LSB)
M1 GATE Mode
C/T
bitM11 M0 GATE C/T M1 M0
M0 Mode bit1 0
Timer Timer 0
 C/T (Clock/Timer)
• This bit is used to decide whether the
timer is used as a delay generator or an
event counter.
• C/T = 0 : timer
• C/T = 1 : counter
 Gate
• Every timer has a mean of starting and
stopping.
– GATE=0
• Internal control
• The start and stop of the timer are controlled by
way of software.
• Set/clear the TR for start/stop timer.
– GATE=1
• External control
• The hardware way of starting and stopping the
timer by software and an external source.
• Timer/counter is enabled only while the INT pin is
 M1, M0
• M0 and M1 select the timer mode for timers
0 & 1.

M1 M0 Mode Operating Mode

0 0 0 13-bit timer mode

8-bit THx + 5-bit TLx (x= 0 or 1)
0 1 1 16-bit timer mode
8-bit THx + 8-bit TLx
1 0 2 8-bit auto reload
8-bit auto reload timer/counter;
 Example 9-3
Find the value for TMOD if we want to program timer
0 in mode 2,
use 8051 XTAL for the clock source, and use
instructions to start
and stop
timerthe
1 timer.
timer 0
Solution:

TMOD= 0000 0010 Timer 1 is not used.

Timer 0, mode 2,
C/T = 0 to use XTAL clock
 TCON Register (1/2)
• Timer control register: TMOD
– Upper nibble for timer/counter, lower nibble
for interrupts
• TR (run control bit)
– TR0 for Timer/counter 0; TR1 for
Timer/counter 1.
– TR is set by programmer to turn timer/counter
(MSB) (LSB)
on/off.
TF1 • TR1 TF0 TR0 IE1 IT1 IE0 IT0
TR=0: off (stop)
Timer 1 onTimer0
• TR=1: (start)
for Interrupt
 TCON Register (2/2)
• TF (timer flag, control flag)
– TF0 for timer/counter 0; TF1 for timer/counter
1.
– TF is like a carry. Originally, TF=0. When TH-
TL roll over to 0000 from FFFFH, the TF is set
to 1.
• TF=0 : not reach
(MSB)• TF=1: reach (LSB)
TF1 • IfTR1 TF0 interrupt,
we enable TR0 TF=1IE1 willIT1
trigger IE0
ISR. IT0
Timer 1 Timer0 for Interrupt
 Equivalent Instructions for the
Timer Control Register
For timer
0
SETB TR0 = SETB TCON.4
CLR TR0 = CLR TCON.4

SETB TF0 = SETB TCON.5

CLR TF0 = CLR TCON.5
For timer
1
SETB TR1 = SETB TCON.6
CLR TR1 = CLR TCON.6
TCON: Timer/Counter Control Register
TF1 TR1SETB TF1 TR0
TF0 = SETB
IE1 TCON.7
IT1 IE0 IT0
CLR TF1 = CLR TCON.7
 Timer Mode 1
• In following, we all use timer 0 as an
example.
• 16-bit timer (TH0 and TL0)
• TH0-TL0 is incremented continuously
when TR0 is set to 1. And the 8051 stops
to increment TH0-TL0 when TR0 is
cleared.
• The timer works with the internal system
clock. In other words, the timer counts up
each machine cycle.
 Steps of Mode 1 (1/3)
1. Chose mode 1 timer 0
– MOV TMOD,#01H
2. Set the original value to TH0 and TL0.
– MOV TH0,#FFH
– MOV TL0,#FCH
3. You had better to clear the flag to
monitor: TF0=0.
– CLR TF0
4. Start the timer.
– SETB TR0
 Steps of Mode 1 (2/3)
5.The 8051 starts to count up by
incrementing the TH0-TL0.
– TH0-TL0=
TR0=1 FFFCH,FFFDH,FFFEH,FFFFH,0000H TR0=0
Start timer TH0 TL0
Stop timer

FFFC FFFD FFFE FFFF 0000

TF = 0 TF = 0 TF = 0 TF = 0 TF = 1

TF Monitor TF until TF=1

 Steps of Mode 1 (3/3)
6. When TH0-TL0 rolls over from FFFFH
to 0000, the 8051 set TF0=1.
– TH0-TL0= FFFEH, FFFFH, 0000H (Now
TF0=1)
7. Keep monitoring the timer flag (TF) to
see if it is raised.
– AGAIN: JNB TF0, AGAIN
8. Clear TR0 to stop the process.
– CLR TR0
9. Clear the TF flag for the next round.
 Mode 1 Programming

XTAL
oscillator 12 ÷

C/T = 0

TH TL TF

overflow
TF goes high
TR flag
when FFFF 0
 Timer Delay Calculation for
XTAL = 11.0592 MHz
(a) in hex (b) in decimal

(FFFF – YYXX + 1) × Convert YYXX values of

1.085 s where YYXX are the TH, TL register to
TH, TL initial values decimal to get a NNNNN
respectively. decimal number, then
Notice that values YYXX (65536 – NNNNN) ×
are in hex. 1.085 s
 Example 9-4 (1/3)
In the following program, we are creating a square
wave of 50% duty cycle (with equal portions high
and low) on the P1.5 bit. Timer 0 is used to
generate the time delay.
Analyze the program.

;each loop is a half clock

MOV TMOD,#01 ;Timer 0,mode
P1.5
1(16-bit)
HERE: MOV TL0,#0F2H ;Timer 50% value 50% =
FFF2H whole clock
MOV TH0,#0FFH
 Example 9-4 (2/3)
;generate delay using timer 0
DELAY:
SETB TR0 ;start the timer
0
AGAIN:JNB TF0,AGAIN
CLR TR0 ;stop timer 0
CLR TF0 ;clear timer 0
flag
FFF2 RET FFF3 FFF4 FFFF 0000

TF0 = 0 TF0 = 0 TF0 = 0 TF0 = 0 TF0 = 1

 Example 9-4 (3/3)
Solution:
In the above program notice the following steps.
1. TMOD = 0000 0001 is loaded.
2. FFF2H is loaded into TH0 – TL0.
3. P1.5 is toggled for the high and low portions of the pulse.
4. The DELAY subroutine using the timer is called.
5. In the DELAY subroutine, timer 0 is started by the “SETB
TR0”
instruction.
6. Timer 0 counts up with the passing of each clock, which is
provided by the crystal oscillator.
As the timer counts up, it goes through the states of FFF3,
FFF4, FFF5, FFF6, FFF7, FFF8, FFF9, FFFA, FFFB,
FFFC, FFFFD, FFFE, FFFFH. One more clock rolls it to 0,
raising the timer flag (TF0 = 1). At that point, the JNB
instruction falls through.
7. Timer 0 is stopped by the instruction “CLR TR0”. The
DELAY subroutine ends, and the process is repeated.
 Example 9-9 (1/2)
The following program generates a square wave on
pin P1.5
continuously using timer 1 for a time delay. Find the
frequency of
the square wave if XTAL = 11.0592 MHz. In your
calculation do
not include the overhead due to instructions in the
loop.
MOV TMOD,#10H ;timer 1, mode 1
AGAIN:MOV TL1,#34H ;timer
value=3476H
MOV TH1,#76H
 Example 9-9 (2/2)
Solution:
In mode 1, the program must reload the TH1, TL1
register every timer if we want to have a
continuous wave.
FFFFH – 7634H + 1 = 89CCH = 35276 clock
count
Half period = 35276 × 1.085 s = 38.274 ms
Whole period = 2 × 38.274 ms = 76.548 ms
Frequency = 1/ 76.548 ms = 13.064 Hz.

Also notice that the high portion and low portion of

 Find Timer Values
• Assume that we know the amount of timer
delay and XTAL = 11.0592 MHz .
• How to find the inter values needed for the
TH, TL?
– Divide the desired time delay by 1.085 s.
– Perform 65536 –n, where n is the decimal
value we got in Step 1.
– Convert th result of Step 2 to hex, where yyxx
is the initial hex value to be loaded into the
timer’s registers.
–
 Example 9-12 (1/2)
Assuming XTAL = 11.0592 MHz, write a program to
generate a
square wave of 50 Hz frequency on pin P2.3.

Solution:
Look at the following steps.
(a) The period of the square wave = 1 / 50 Hz = 20
ms.
(b) The high or low portion of the square wave = 10
ms.
(c) 10 ms / 1.085 s = 9216
 Example 9-12 (2/2)
MOV TMOD,#10H ;timer 1, mode
1
AGAIN: MOV TL1,#00 ;Timer value =
DC00H
MOV TH1,#0DCH
SETB TR1 ;start
BACK: JNB TF1,BACK
CLR TR1 ;stop
CPL P2.3
CLR TF1 ;clear timer
flag 1
 Generate a Large Time Delay
• The size of the time delay depends on
two factors:
– They crystal frequency
– The timer’s 16-bit register, TH & TL
• The largest time delay is achieved by
making TH=TL=0. What if that is not
enough?
• Example 9-13 show how to achieve large
time delay.
 Example 9-13
Examine the following program and find the time
delay in seconds.
Exclude the overhead due to the instructions in the
loop.
MOV TMOD,#10H
MOV R3,#200
AGAIN: MOV TL1,#08
MOV TH1,#01
SETB TR1
BACK: JNB TF1,BACK
CLR TR1
CLR TF1
DJNZ R3,AGAIN
Solution:
TH – TL = 0108H = 264 in decimal
 Timer Mode 0
• Mode 0 is exactly like mode 1 except that
it is a 13-bit timer instead of 16-bit.
– 8-bit TH0 + 5-bit TL0
• The counter can hold values between
0000 to 1FFF in TH0-TL0.
– 213-1= 2000H-1=1FFFH
• We set the initial values TH0-TL0 to count
up.
• When the timer reaches its maximum of
1FFFH, it rolls over to 0000, and TF0 is
 Timer Mode 2
• 8-bit timer.
– It allows only values of 00 to FFH to be
loaded into TH0.
• Auto-reloading
• TL0 is incremented continuously when
TR0=1.
• In the following example, we want to
generate a delay with 200 MCs on timer 0.
• See Examples 9-14 to 9-16
 Steps of Mode 2 (1/2)
1. Chose mode 2 timer 0
– MOV TMOD,#02H
2. Set the original value to TH0.
– MOV TH0,#38H
3. Clear the flag to TF0=0.
– CLR TF0
4. After TH0 is loaded with the 8-bit value,
the 8051 gives a copy of it to TL0.
– TL0=TH0=38H
5. Start the timer.
 Steps of Mode 2 (2/2)
6. The 8051 starts to count up by
incrementing the TL0.
– TL0= 38H, 39H, 3AH,....
7. When TL0 rolls over from FFH to 00, the
8051 set TF0=1. Also, TL0 is reloaded
automatically with the value kept by the
TH0.
– TL0= FEH, FFH, 00H (Now TF0=1)
– The 8051 auto reload TL0=TH0=38H.
– Go to Step 6 (i.e., TL0 is incrementing
Timer 1 Mode 2 with External
Input
XTAL
oscillator 12 ÷

C/T = 0

overflow
TL1 TF1 flag

reload

TR1 TH1

TF goes high
when FF 0
 Example 9-15
Find the frequency of a square wave generated on
pin P1.0.
Solution:
MOV TMOD,#2H ;Timer 0,mode 2
MOV TH0,#0
AGAIN:MOV R5,#250 ;count 250 times
ACALL DELAY
CPL P1.0
SJMP AGAIN
DELAY:SETB TR0 ;start
BACK: JNB TF0,BACK
CLR TR0 ;stop
CLR TF0 ;clear TF
 Example 9-16
Assuming that we are programming the timers for
mode 2, find the
value (in hex) loaded into TH for each of the
following cases.
(a) MOV TH1,#-200 (b) MOV TH0,#-60 (c) MOV
TH1,#-3
(d) MOV TH1,#-12 (e) MOV TH0,#-48
Decimal 2’s complement (TH
Solution: value)
Some 8051
-200 =assemblers
- C8H 38H provide this way.
-200 = --C8H
60 = 
- 2’s
3CH C4H
complement of –200 = 100H –
C8H -= 338 H FDH
- 12 F4H
 Example 9-17 (1/2)
Find (a) the frequency of the square wave
generated in the
following code, and (b) the duty cycle of this wave.

Solution:
“MOV TH0,#-150” uses 150 clocks.
The DELAY subroutine = 150 × 1.085 s = 162 s.
The high portion of the pulse is twice tat of the low
portion (66% duty cycle).
The total period = high portion + low portion
= 325.5 s + 162.25 s = 488.25 s
 Example 9-17 (2/2)
MOV TMOD,#2H ;Timer 0,mode 2
MOV TH0,#-150 ;Count=150
AGAIN:SETB P1.3 high
ACALL DELAY period
ACALL DELAY low
CLR P1.3 period
ACALL DEALY
SJMP AGAIN

DELAY:SETB TR0 ;start

BACK: JNB TF0,BACK
CLR TR0 ;stop
CLR TF0 ;clear TF
 Counter
• These timers can also be used as
counters counting events happening
outside the 8051.
• When the timer is used as a counter, it is a
pulse outside of the 8051 that increments
the TH, TL.
• When C/T=1, the counter counts up as
pulses are fed from
– T0: timer 0 input (Pin 14, P3.4)
– T1: timer 1 input (Pin 15, P3.5)
 Port 3 Pins Used For Timers 0
and 1
Pin PortPin Function Description
14 P3.4 T0 Timer/Counter 0 external
input
15 P3.5 T1 Timer/Counter 1 external
(MSB) input (LSB)
GATE C/T=1 M1 M0 GATE C/T=1 M1 M0
Timer 1 Timer 0
 Counter Mode 1
• 16-bit counter (TH0 and TL0)
• TH0-TL0 is incremented when TR0 is set
to 1 and an external pulse (in T0) occurs.
• When the counter (TH0-TL0) reaches its
maximum of FFFFH, it rolls over to 0000,
and TF0 is raised.
• Programmers should monitor TF0
continuously and stop the counter 0.
• Programmers can set the initial value of
TH0-TL0 and let TF0=1 as an indicator to
 Timer 0 with External Input
(Mode 1)

overflow
Timer 0 flag
external TH0 TL0 TF0
input
Pin 3.4
TF0 goes high
C/T = 1 TR0 when FFFF 0
 Counter Mode 2
• 8-bit counter.
– It allows only values of 00 to FFH to be
loaded into TH0.
• Auto-reloading
• TL0 is incremented if TR0=1 and external
pulse occurs.
• See Figure 9.6, 9.7 for logic view
• See Examples 9-18, 9-19
 Example 9-18 (1/2)
Assuming that clock pulses are fed into pin T1, write
a program for
counter 1 in mode 2 to count the pulses and display
the state of the
TL 1 count on P2.
Solution:
MOV TMOD,#01100000B ;mode 2,
counter 1
MOV TH1,#0
SETB P3.5 ;make T1
input port
AGAIN:SETB TR1 ;start
BACK: MOV A,TL1
MOV P2,A ;display in
 Example 9-18 (2/2)
We use timer 1 as an event counter where it counts
up as clock pulses are fed into pin3.5.
Notice in the above program the role of the
instruction “SETB
P3.5”. Since ports are set up for output when the
8051 is powered 8051
up , we must make P3.5
P2 is connected to 8 LEDs
an input port by making it
high. P2 to
and input T1 to pulse.
LEDs
P3.5
T1
 Example 9-19 (1/3)
Assume that a 1-Hz frequency pulse is connected
to input pin 3.4.
Write a program to display counter 0 on an LCD.
Set the initial
value of TH0 to -60.
Solution:
Note that on the first round, it starts from 0 and
counts 256 events, since on RESET,8051 TL0=0. To
solve this problem, load TH0 with -60 at the
beginning of the program. P1 to
LCD
P3.4
1 Hz clock T0
 Example 9-19 (2/3)
ACALL LCD_SET_UP ;initialize
the LCD
MOV TMOD,#00000110B ;Counter
0,mode2
MOV TH0,#-60
SETB P3.4 ;make T0 as
input
AGAIN:SETB TR0 ;starts the
counter
BACK: MOV A,TL0 ; every 60
events
ACALL CONV ;convert in
 Example 9-19 (3/3)
;converting 8-bit binary to ASCII
CONV: MOV B,#10 ;divide by 10
DIV AB
MOV R2,B ;save low digit
MOV B,#10 ;divide by 10
once more
DIV AB
ORL A,#30H ;make it ASCII
MOV R4,A R4 R3 R2
MOV A,B
ORL A,#30H
MOV R3,A
MOV A,R2
 A Digital Clock
• Example 9-19 shows a simple digital
clock.
– If we feed an external square wave of 60 Hz
frequency into the timer/counter, we can
generate the second, the minute, and the
hour out of this input frequency and display
the result on an LCD.
• You might think that the use of the
instruction “JNB TF0,target” to monitor
the raising of the TF0 flag is a waste of the
microcontroller’s time.
 GATE=1 in TMOD
• All discuss so far has assumed that
GATE=0.
– The timer is stared with instructions “SETB
TR0” and “SETB TR1” for timers 0 and 1,
respectively.
• If GATE=1, we can use hardware to
control the start and stop of the timers.
– INT0 (P3.2, pin 12) starts and stops timer 0
– INT1 (P3.3, pin 13) starts and stops timer 1
– This allows us to start or stop the timer
 Example for GATE=1
• The 8051 is used in a product to sound an
alarm every second using timer 0.
• Timer 0 is turned on by the software
method of using the “SETB TR0”
instruction and is beyond the control of the
user of that product.
• However, a switch connected to pin P3.2
can be used to turn on and off the timer,
thereby shutting down the alarm.
 Timer/Counter 0

XTAL
oscillator 12 ÷
C/T = 0

C/T = 1
T0 Pin
Pin 3.4 TR0

Gate

INT0 Pin
Pin 3.2
 Interrupts Programming
• An interrupt is an external or internal event that interrupts
the microcontroller to inform it that a device needs its
service.

Interrupts vs. Polling

• A single microcontroller can serve several
devices. That are two ways to do that: interrupts
or polling.
• The program which is associated with the
interrupt is called the interrupt service routine
(ISR) or interrupt handler.
 Steps in executing an interrupt:
• it finishes the instruction it is executing and serves
the address of the next instruction (PC) on the
stack.
• It also saves the current status of all the interrupts
internally (i.e. not on the stack)
• It jumps to a fixed location in memory called the
interrupt vector table that holds the address of the
interrupt service routine.
• The microcontroller gets the address of the ISR from
the interrupt vector table and jumps to it. It starts to
execute the interrupt service routine until it reaches
the last instruction of the subroutine which is RETI
(return from interrupt)
• Upon executing the RETI instruction, the
 Six interrupts in 8051
SJMP FIRST

ORG 13H ;TSR FOR INT1

MOV A,P1 ;read data
ACALL ;MUL39
;R3R2R1=A*39
MOV A,R3
FCAL PUTH
MOV A,R2
FCAL PUTH
MOV A,R1
FCAL PUTH ;DISP
VOLTAGE IN mV
SETB P3.0 ;RD=1 FOR
NEXT

CLR P3.1 ;WR=0

SETB P3.1 ;WR=1 ,start
conversion

ORG 30H
 Enabling and disabling an interrupt:

Example:
Write a program using interrupts to simultaneously create 7
kHz and 500 Hz square waves on P1.7 and P1.6.
 Solution:
ORG 0
LJMP MAIN
ORG 000BH
LJMP T0ISR 8051 143s
ORG 001BH 71s
LJMP T1ISR P1.7
ORG 0030H
MAIN: MOV TMOD,#12H
MOV TH0,#-71
SETB TR0
SETB TF1 2ms
MOV IE,#8AH 1ms
P1.6
MOV IE,#8AH
SJMP $
T0ISR: CLR P1.7
RETI
T1ISR: CLR TR1
MOV TH1,#HIGH(-1000)
MOV TL1,#LOW(-1000)
SETB TR1
CPL P1.6
RETI
END
External Interrupts:

Level-triggered (default)
INT0
)Pin 3.2( 0
0003
IT0
1 IE0
2 (TCON.3)
Edge-triggered

Level-triggered (default)
INT0
)Pin 3.3( 0 0013
IT1
1 IE1
2 (TCON.3)
Edge-triggered
 Exercise
• We have a motor that send pulses to
micro proportional to it’s r.p.m. write a
program that if the number of pulses per
10-second are less than 100, send 1 to
P1.0, and if more than 200, send 1 to P1.1
• Write a program and design hardware that
connect key-pad to micro and identifies
which key is pressed.
 Serial
Communication
Basics of serial communication
• Baud Rate
Start and stop bits
 RxD and TxD pins in the 8051
• TxD pin 11 of the 8051 (P3.1)
• RxD pin 10 of the 8051 (P3.0)

SBUF register
MOV SBUF,#’D’ ;load SBUF=44H, ASCII for ‘D’
MOV SBUF,A ;copy accumulator into SBUF
MOV A,SBUF ;copy SBUF into accumulator
MAX232