PRESIDENCY UNIVERISTY, BENGALURU

School of Engineering

Microprocessors and Microcontroller

CSE 206

IV Semester 2018-19
 Module - 2

Department Of Computer Science 2

Presidency
 Introduction
 Programming Languages
 Addressing Modes
 Naming Data and Addresses
 Instruction Set
 Assembly Language Program Development Tools
Introduction
 Microprocessor is single chip microcomputer, i.e., all the functional
components of a computer are inbuilt on a single chip using VLSI
technology.
 It consists of an arithmetic logic unit, register unit and control
unit.
 Each family of processors has its own set of instructions for
handling various operations
Programming Languages

Computer languages are the languages which a computer can

understand. Computer languages can be classified as high-level
language and low-level language.
Low Level Language
Low Level languages are machine dependent language.
They cannot be easily converted to run on a computer with different
CPU.
Low-level languages can further be classified as
a) machine language.
b) assembly language.
Low Level Languages

Machine Language
Machine language consists of strings of binary numbers (i.e. 0s and 1s) and it is
the only one language, the processor directly understands. Machine language has
Merits of very fast execution speed and efficient use of primary memory.
Merits:
• It is directly understood by the processor so has faster execution time since the
programs written in this language need not to be translated.
• It doesn’t need larger memory.
Demerits:
• It is very difficult to program using 1GL since all the instructions are to be
represented by 0s and 1s.
• Use of this language makes programming time consuming.
• It is difficult to find error and to debug.
• It can be used by experts only.
Low Level Languages

Assembly Language
This language uses mnemonics code (symbolic operation code like ‘ADD’ for
addition) in place of 0s and 1s. The program is converted into machine code by
assembler. The resulting program is referred to as an object code.
Merits:
• It is makes programming easier than 1GL since it uses mnemonics code for
programming. Eg: ADD for addition, SUB for subtraction, DIV for division, etc.
• It makes programming process faster.
• It is easier to debug than machine language.
Demerits:
• Programs written in this language is not directly understandable by computer so
translators should be used.
• It is hardware dependent language.
High Level Language
• High level languages are machine independent languages. Programs written for
a particular machine can run on other machines also.

• High level languages are program oriented languages.

• HLL are designed to solve particular problems.

• HLL are easier to read, write and maintain.

• Programs written in HLL are converted into machine language by an interpreter

or a compiler.
Programming Languages
 Program
 A program is a set of instructions that a computer follows in order to
perform a particular task. A Program is a set of instructions written to solve a
problem.
 Instruction
 Instructions are clear and detailed information on how to do something.
Instructions are the directions which a microprocessor follows to execute a
task or part of a task
 Mnemonic
 In computer assembler (or assembly) language, a mnemonic is an
abbreviation for an operation. It's entered in the operation code field of each
assembler program instruction. For example, inc ("increase by one") is a
mnemonic.
Addressing Modes
 When 8086 executes an instruction, it performs the specified operation on the
data (operands) specified in the instruction, operated data is stored in the
memory location.
 Addressing modes are the ways of specifying an operand in an instruction.
“ It is the different ways in which a processor can access data are
referred to as its addressing modes”.
 In 8086 the addressing modes are broadly categorized into two groups
 Data Addressing Mode
 Address Addressing Mode
 Data addressing modes are for defining operand in the instruction whereas
address addressing modes are the ways of specifying a branch address in
control transfer instructions.
Data Addressing Modes
 8086 introduces many techniques to access the memory, these addressing
modes provide flexibility to the processor to access memory, which in turn
allows the user to access variables, arrays, records, pointers and other complex
data types in a more flexible manner. 8086 supports,
 Implied addressing mode
 Immediate addressing mode
 Register addressing mode
 Direct addressing mode
 Register indirect addressing mode
Data Addressing Modes
 Apart from these data addressing modes, 8086 has five more addressing
modes.
 Base addressing mode
 Index addressing mode
 Based indexed addressing mode
 Based indexed with displacement addressing mode
 String addressing mode
 Different addressing modes may take different amounts of time to compute the
effective address.
 Complex addressing modes takes more time to compute the effective address
than the simpler addressing modes.
Data Addressing Modes
 Implied Addressing Mode (Implicit Addressing Mode)
 In this mode, no operand is specified in the instruction.
 CMA – Complement accumulator
 RLC – (Rotate Left through Carry) Rotate the content of accumulator
 Immediate Addressing Mode
 In immediate addressing mode the operands are specified within the
instruction itself. The immediate operand can only be the source operand.
 ADD 05 – Add 05 to the content of accumulator
 MOV AX, 2500H - Here the immediate data is 2500H
Data Addressing Modes
 Register Addressing Mode
 In this mode, instruction operate on general purpose register set. The
content of a register can be accessed by specifying the name of the register
as an operand to the instruction.
 MOV AX, BX
 MOV DL, AL
 Direct Addressing Mode (Displacement only addressing mode)
 In this mode, the address of the memory is specified in the instruction itself.
Here instruction consists of a 16-bit memory address or an 8-bit IO address.
 MOV BL, [2000H] – transfers the content of the memory location 2000H
into BL reg.
 MOV [1234H], DL – content of DL register is transferred to memory
location 1234H.
Data Addressing Modes
 Register Indirect Addressing Mode
 This addressing mode is also used in concern with memory and IO.
 In this addressing mode, the memory address is specified by some pointer,
index or base register.
 These registers are written inside the square brackets. There are four forms
of this addressing mode on the 8086,
 MOV DX, [BX]
 MOV DX, [BP]
 MOV DX, [SI]
 MOV DX, [DI]
 These four addressing modes refer the word at the offset in the BX, BP, SI or
DI registers respectively. The [BX], [SI] and [DI] modes use the DS segment
by default. The [BP] addressing mode uses the stack segment (SS) by
default.
Data Addressing Modes
 Base Addressing Mode
 In this mode 8-bit or 16-bit displacement is added to the contents of a base
register (BX or BP); the resulting value is a pointer to location where the
data resides.
 In this addressing mode, the memory location is calculated by adding the
signed 8-bit or 16-bit displacement to either BX or BP register.
BX 8-bit
displacement
Memory location = +
BP 16-bit
displacement
 MOV AL, [BX + 15] – the content of the memory location 200FH (2000H +
0FH (equivalent to decimal 15)) is transferred to AL register.
Data Addressing Modes
 Index Addressing Mode
 This addressing mode is similar to base addressing mode with the difference
that in this mode 8-bit or 16-bit displacement is added to the content of an
index register (SI or DI).
 In this addressing mode, the memory location is calculated by adding the
signed 8-bit or 16-bit displacement to either SI or DI register.
SI 8-bit
displacement
Memory location = +
DI 16-bit
displacement
 MOV AL, CS: DISP [SI]
 MOV AL, SS: DISP [DI]
Data Addressing Modes
 Based Indexed Addressing Mode
 In this addressing mode, the contents of a base register (BX or BP) are
added to the contents of an index register (SI or DI), the resulting value is a
pointer to location where data resides
SI BX
The allowable forms for
Memory location = +
these addressing modes are:
DI BP
MOV AL, [BX][SI]
 MOV AL, [BX][SI] MOV AL, [BX][DI]
 If BX = 2000H and SI = 5400H, the instruction is MOV AL, [BP][SI]
MOV AL, [BP][DI]
MOV AL, [BX + SI]
Data Addressing Modes
 Based Indexed with Displacement Addressing Mode
 In this addressing mode, the offset address is generated by the sum of Base
Register and Index registers along with 8-bit or 16-bit displacement. Here, 8-
bit or 16-bit displacement is added to the contents of a base register (BX or
BP) and index register (SI or DI); the resulting value is a pointer to location
where data resides.
SI BX 8-bit displacement
Memory location = + +
DI BP 16-bit displacement
 MOV AL, DISP [BX][SI], MOV AL, DISP [BX + DI]
 MOV AL, [BP + SI + DISP], MOV AL, [BP][DI][DISP]
Data Addressing Modes
 String Addressing Mode
 This mode uses index registers.
 The string instructions automatically assume SI to point to the first byte or
word of the source operand and DI to the first byte or word of the
destination operand.
 In this mode the value of SI and DI are auto incremented or decremented
depending upon the value of directional flag.
 MOVS B
 MOVS W
Address Addressing Modes
 These addressing modes indicate the branch address in the call and jump
instructions.
 In 8086 there are four types of address addressing modes
 Intrasegment direct
 Intrasegment indirect
 Intersegment direct
 Intersegment indirect
 In intrasegment the branching is within the segment and in intersegment the
branching is outside the segment
 Intersegment is a synonym for far, intrasegment is a synonym for near.
Address Addressing Modes
 Intrasegment Direct
 In this addressing mode the effective branch address will be the sum of the
signed 8-bit or 16-bit displacement and the content of the IP.
 When the displacement is of 8-bit, then this is referred to as short jump or
short call, otherwise long jump or long call.
 JMP 8-bit displacement; direct intrasegment, 8-bit displacement
 JMP 16-bit displacement; direct intrasegment, 16-bit displacement
Address Addressing Modes
 Intrasegment Indirect
 In this addressing mode the effective address is
specified by any of the register or memory content.
The memory location can be specified by any of the
memory related data addressing modes.
 In this addressing mode the content of the IP is
replaced by the effective branch address.
 This addressing mode is used only for unconditional
branch instructions.
 JMP DISP [BX]; Displacement is an array of
word
Address Addressing Modes
 Intersegment Direct
 In this addressing mode the contents of IP are replaced by a part of the
instruction and the contents of the CS is replaced by another part of the
instruction.
 The 32-bit operand is loaded into the IP and CS register. The direct
intersegment jump or call is five byte long, the last four bytes contains a
segmented address. This instruction copies the offset into the IP register
and the segment into the CS register.
Address Addressing Modes
 Intersegment Indirect
 In this addressing mode the contents of IP and CS are replaced by the
contents of the four consecutive memory locations pointed by any of the
memory related data addressing modes except the immediate and register
addressing mode.
Assembler Directives
 Assembler directives are the directions or instructions to the assembler rather
than the processor. These are also called pseudo instructions.
 Assembler directives tell the assembler how to translate a program in machine
codes.
 These directives may be classified as,
 Data defining directives
 Segment defining directives
 Segment combining directives
 Processor directives, etc.
Assembler Directives
 Data Defining Assembler Directives
 DB (Define Byte):
 The define byte directive is used to allocate and initialize one or more bytes
of data. Here name is the symbol assigned to the variable which represents
the address of the memory where the data is stored in a particular segment.
 Syntax:
 Name DB data1, data2, data3 . . . .
 Example:
 MEM DB 35H, 0FH, 6DH
 In
this example MEM is the name given to
memory location from where three data are stored
Assembler Directives
 DW (Define Double Byte or Define Word):
 This directive is used to allocate or initialize one or more data in word (16-
bit) format.
 Syntax:
 Name DW data1, data2, data3 . . . .
 Example:
 MEM DW 0F35H, 456DH
 Thesetwo words will be stored in memory as
shown in figure.
Assembler Directives
 DD (Define Double Word):
 This directive is used to allocate or initialize one or more data in double
words (4-byte) format. This directive is used to show that the data stored in
memory is a double word.
 Syntax:
 Name DD double word1, double word2 . . . .
 Example:
 MEM DD 465D0F35H, ?
 The double word will be stored in memory as
shown in figure.
Assembler Directives
 DD (Define Double Word):
 This directive is used to allocate or initialize one or more data in double
words (4-byte) format. This directive is used to show that the data stored in
memory is a double word.
 Syntax:
 Name DD double word1, double word2 . . . .
 Example:
 MEM DD 465D0F35H, ?
 The double word will be stored in memory as
shown in figure.
 Similar Directives: DQ (Define Quad Words)
DT (Define Ten Bytes)
Assembler Directives
 ? (Uninitialized Value):
 It is used as an initializer in data declarations. It indicates a value that the
assembler allocates but does not initialize.
 Syntax: ?
 Example: MEM DW ?; Allocate one uninitialized word
 PTR (Pointer):
 The PTR (Pointer) directive is used to define the size of an operand or the
distance a reference has. It is alos used tp enable instructions to access
variables that would otherwise generate errors.
 Syntax: Type PTR expression
 Example: JMP WORD PTR
[BX]; legal near jump
CALL
DWORD PTR [BX]; legal far call
Assembler Directives
 OFFSET: The OFFSET directive is used to load the offset of memory location to
a pointer register.
 EQU (Equate): This directive is used to assign a constant or a variable or an
expression to a variable. The syntax is
Variable EQU: variable or constant or expression
EX: ASCII_ADJ EQU AAA
 DUP (Duplicate): The DUP directive can be used to initialize several locations
and to assign values to these locations. The syntax is
Name Data_Type Num DUP (value)
Ex: Table DW 10 DUP (0)
Assembler Directives
 LABEL: It creates a new variable or label of a given size (type) at a specified
location by assigning the current location-counter value and the given type to
name. it can be used to define a second entry point into a procedure.
name LABEL type
 ALIGN: The align directive aligns the next variable or instruction on an offset
address that is a multiple of a number. Data segment is padded with a zero
and each skipped code segment is padded with NOP
 EVEN: The even directive aligns next variable or instruction on an even offset
address. Data segments are padded with zeros. Code segments are padded
with special two-byte NOP instructions wherever possible.
Assembler Directives
 ORG: ORG directive is used to begin an assembly program at a specific offset
address. The assembler implements this directive by adjusting the location
counter.
ORG expression
Ex: ORG 2000H
 DOSSEG: This directive arranges segments according to the standard DOS
convention.
DOSSEG
 STRUCT: The STRUCT or STRUC directive tells the assembler that a user
defined uninitialized data structure follows.
STRUCT
structure_sunil DB 23H, 44H, ?
Assembler Directives
 Segment Defining Directives
These directives are used to define a memory segment. Segments, in
assembly language source file, are defined with the segment and end directives.
 SEGMENT: It defines a program segment called name. The statements are the
body of the program or data within the segment.
The SEGMENT directive can also have some optional segment attributes.
name SEGMENT [align] [combine] [‘class’]
statements
 ENDS: The ENDS directive marks the end of a segment name or a structure
name previously begun with SEGMENT.
name ENDS
Assembler Directives
 END: The END directive marks the end of a module and optionally indicates the
address where execution will begin when the program is loaded.
END [start_address]
 ASSUME: It is used to tell the assembler, which segment is to be used as an
active segment at any instant, and with respect to which it has to calculate the
offsets of the variables or instructions.
ASSUME seg register: name
 .CODE: This directive indicates the start of a code segment and ends previous
segment, if any. Before using the .CODE, the .MODEL directive must have
previously been used.
.CODE [name]
Assembler Directives
 .STACK: The .STACK defines the program stack segment (STACK) and ends
previous segment, if any. Before using the .STACK, the .MODEL directive must
have previously been used.
.STACK [size]
 .DATA: The .DATA starts the initialized data segment (_DATA) and ends
previous segment, if any. Before using the .DATA, the .MODEL directive must
have previously been used. This segment contains all global data that have
initial values.
 .DATA?: The .DATA starts the uninitialized data segment (_BSS) and ends
previous segment, if any. Before using the .DATA?, the .MODEL directive must
have previously been used. This segment contains all global data that have no
initial values.
.DATA?
Assembler Directives
Initialization of Program Memory Models
 .MODEL: This directive initializes the program memory model. It should be
placed at the beginning of the source file before any other simplified segment
directive. .MODEL can occur only once.
.MODEL memorymodel [,langtype] [,stacktype]
The MODEL directive is of five types, these are:
 SMALL MODEL (.MODEL SMALL): In this model the maximum size of the
code and data segment are of 64 KB. This model is the most widely used model
and is sufficient for all the programs.
 MEDIUM MODEL (.MODEL MEDUIM): In this model the size of the data
segment is maximum of 64 KB whereas the code segment size can exceed 64
KB.
Assembler Directives
Initialization of Program Memory Models
 COMPACT MODEL (.MODEL COMPACT): In this model the size of the data
segment is maximum of 64 KB whereas the code segment size can exceed 64
KB.
 LARGE MODEL (.MODEL LARGE): In this model both code and data
segments size can exceed 64 KB. But single data set (i.e., array) can not
exceed 64 KB.
 HUGE MODEL (.MODEL HUGE): In this model both code and data segments
size can exceed 64 KB. In this model a single data set can be more than 64 KB.
Assembler Directives
 STARTUP:
 This directive is used to generate startup code for the given model and
stack type which is defined by the .MODEL directive.
 It initializes data segment (DS), stack segment (SS) and stack pointer (SP)
as and when required.
 It defines a start address label, so that you don’t need to give a start
address with END.
 It is used in stand-alone programs only.
.STARTUP
Assembler Directives
 EXIT:
 The .EXIT directive is used to end a program which is initiated with
the .STARTUP directive.
 In fact this directive generates the type 21H interrupt, to exit from the
program.
 This directive is used only when the .MODEL directive has been used earlier
and a .STARTUP directive must have been used in that model.
.EXIT [exitcode]
8086 – Instruction Set
 The 8086 microprocessor supports 8 types of instructions −
 Data Transfer Instructions
 Arithmetic Instructions
 Bit Manipulation Instructions
 String Instructions
 Program Execution Transfer Instructions (Branch & Loop Instructions)
 Processor Control Instructions
 Iteration Control Instructions
 Interrupt Instructions
8086 – Instruction Set
Instruction Format
The instruction of 8086 microprocessor may be one to six byte long. These
instructions have different formats.
8086 – Instruction Set
Instruction Format
Data Transfer Instructions
Instruction to transfer a word
 MOV − Used to copy the byte or word from the provided source to the provided
destination.
 The MOV instruction copies the second operand (source) to the first operand
(destination) without modifying the contents of the source.
 The following types of operands are supported
 MOV REG, memory  MOV SREG, memory
 MOV memory, REG  MOV memory, SREG
 MOV REG, REG  MOV REG, SREG
 MOV memory, immediate  MOV SREG, REG
 MOV REG, immediate
Data Transfer Instructions
 PUSH − PUSH the content on to stack top
 Used to put a word at the top of the stack.
 Operands REG, SREG, memory
 PUSH instruction pushes the source operand onto the stack. After the PUSH
instruction, the content of SP is decreased by 2 and the source value is
copied to SS:SP. The PUSH instruction always operates on words. The
operands in the PUSH instruction can be a memory location, a general
purpose 16-bit register, or a segment register. PUSH SP copies the value of
SP after the push.
 Example: If the content of the AX register is 1234H, then after the PUSH
AX instruction the 12H is loaded on SP and 34H is loaded on [SP-1] and SP is
further decremented by 1 and becomes SP = SP-2. The flag register remains
unchanged after this instruction.
Data Transfer Instructions
 POP − POP of content from top of stack
 Used to get a word from the top of the stack to the provided location.
 Operands REG, SREG, memory
 This instruction pops the top of the stack into the destination operand. This
means that the value at SS:SP is copied to the destination operand and SP is
increased by 2. the destination operand can be a memory location, a
general purpose 16-bit register, or a segment register except CS.
 Example: If the top of the stack contains 12H and 34H, then after the
instruction POP BX, the SP is increased by 1 and the content of that
location is loaded into BL and SP is again incremented by 1 and the content
of that location is loaded into BH. The flag register remains unchanged after
this instruction.
Data Transfer Instructions
 XCHG - Exchange
 Used to exchange the data from two locations.
 Operands Rd, M; M, Rs; Rd, Rs;
 Exchange values of two operands. The order of the XCHG’s operands does
not matter but both operands should be of the same size. The flag register
remains unchanged after this instruction.
 Example: If BL = 15 and AH = 20, then after the instruction XCHG BL, AH
the content of BL will be 20 and AH will be 15.
Data Transfer Instructions
 XLAT - Translate
 Used to translate a byte in AL using a table in the memory.
 This is the translate instruction which is used to translate a value from one
coding system to another with the help of a lookup table. This instruction do
not require any operand.
 XLAT instruction will perform the operation AL = DS:[BX + unsigned AL]
 Example: LEA BX, 2000H
MOV AL, 20
XLAT
In this program AL will be loaded with the content of the memory location
pointed by [2000+20]. The flag register remain unchanged after this
instruction.
Data Transfer Instructions
Instructions for input and output port transfer
 IN − Input data from input port
 Used to read a byte or word from the provided port to the accumulator.
 Operands: AL, 8-bit port address; AL, DX;
AX, 8-bit port address; AX, DX;
 This instruction transfers a byte or word from a port to the accumulator
register. The port address is specified by the source operand, which can be
DX or 8-bit constant. If the port address is of 8-bit then direct addressing will
be used.
 Example: IN AX, 04H; Move the content of port number 04H and 05H to AL and
AH
IN AL, 70H; Move the content of the port number 70H
to AL
IN AX, DX; Move the content of port number specified in DX & DX+1 to
AL & AH
IN AL, DX; Move the content of the port number
specified in DX to AL
Data Transfer Instructions
 OUT − Output data to output port
 Used to send out a byte or word from the accumulator to the provided port.
 Operands: AL, 8-bit port address; AL, DX;
AX, 8-bit port address; AX, DX;
 This instruction transfers a byte or word to an output port from the
accumulator register. The port address is specified by the destination
operand. Port number may be of 8-bit or 16-bit. For 16-bit port address DX
register will be used and for 8-bit port address an 8-bit constant will be
used.
 Example: OUT 04H, AX; Transfer the contents of the AX to the port 04H and 05
OUT 70H, AL; Transfer the contents of the AL register to port
70H
OUT DX, AX; Transfer the contents of AX to ports specified by
DX & DX+1
OUT DX, AL; Transfer the contents of AL to port specified by
DX
Data Transfer Instructions
Instructions to transfer the address
 LEA − Load Effective Address
 Used to load the address of operand into the provided register.
 This instruction is used to load the effective address (offset) of the source
memory operand into the specified destination register.
 Example: LEA DI, 3[SI]
 This instruction copies the address of the memory location 3[SI] into the DI
register, i.e., it adds three with the value in the SI register and moves the
sum into DI. So, LEA instruction can be used to do a MOV operation and an
addition with single instruction. In this instruction the flag remains
unchanged.
Data Transfer Instructions
 LDS − Load pointer using DS register
 Used to load DS register and other provided register from the memory
 This instruction is used to load the double word stored in memory into
specified register and DS register. The general purpose register is loaded
from lower order word of the memory operand and the segment register DS
from the higher order word. The memory may be specified by any of the
memory related addressing mode. This instruction is very useful in string
instructions where the source is always DS:SI.
 Example: LDS SI, [BX];
 SI is set to [BX:BX+1] and
 DS is set to [BX+2:BX+3]
Data Transfer Instructions
 LES − Load pointer using ES register
 Used to load ES register and other provided register from the memory
 This instruction is used to load the double word stored in memory into
specified register and ES register. The general purpose register is loaded
from lower order word of the memory operand and the segment register ES
from the higher order word. The source M can be specified by any of the
memory related addressing mode. This instruction is can be used to
initialize the string destination ES:DI.
 Example: LES DI, [BX+15];
 DI is set to [BX+15:BX+16] and
 ES is set to [BX+17:BX+18]
Data Transfer Instructions
Instructions to transfer flag registers
 LAHF − No operands Load Flag
 Used to load AH with the low byte of the flag register.
 Load the AH register by the lower byte of the flag register which contains
the status flag, i.e., carry, parity, auxiliary carry, zero and sign flag. By this
instruction we see the contents of the status flag.
 SAHF − No operands Store Flag
 Used to store AH with the low byte of the flag register.
 store the AH register by the lower byte of the flag register which contains
the status flag, i.e., carry, parity, auxiliary carry, zero and sign flag. By this
instruction we modify the contents of the status flag.
Data Transfer Instructions
 PUSHF - No operands, Push flag on top of stack
 The flag register is pushed onto the stack. The higher byte of the flag
register is pushed at [SP]. SP is then decremented by 1 and then lower byte
of flag is pushed on the [SP]. The SP is again decremented by 1. The flag
register remains unchanged after this instruction.
 POPF - No operands, Pop off flag from top of stack
 This instruction pops the value on the top of the stack into the flags register.
First SP is incremented by 1 then the byte of the top of the stack will be
dropped into the lower byte of the flag register. Again SP will increase by 1
and the next byte from the stack will be loaded into the higher byte of the
flag register. The flag register remains unchanged after this instruction.
Arithmetic Instructions
Instructions to perform addition
 ADD − Addition operation
 Used to add the provided byte to byte/word to word.
 Operands: REG, memory; memory, REG; REG, REG;
memory, immediate; REG, immediate;
 These instructions add a data from source operand to a data from destination and
save the result in the destination operand. The source and destination must be of
same type, means they must be a byte type or word type. If a byte is to be added to
a word, then the byte must be converted to a word by extending the D7 bit of the
byte in the upper byte of the word. Segment registers cannot be used as an operand
in ADD instruction. Memory to memory and IO to memory addition is not permitted.
Flag bits are modified as the result of the operation
 Example: F = X+Y+Z  MOV AX, X

ADD AX, Y

ADD AX, Z
Arithmetic Instructions
 ADC − ADD with carry
 Operands: REG, memory; memory, REG; REG, REG;
memory, immediate; REG, immediate;
 This instruction adds the source operand to the destination operand along
with the carry flag. The result is stored in the destination operand. This
instruction is used to add the data which are of large in size, i.e., double
word type. Both ADD and ADC instructions affect the flags identically.
 Example: addition of the two numbers 12345678H with FEDB4321H with the
help of ADC Instruction.
MOV AX, 5678H
ADD AX, 4321H
MOV BX, 1234H
ADC BX, FEDBH
Arithmetic Instructions
 INC − Increment
 Used to increment the provided byte/word by 1.
 Operand: REG; memory;
 Increment the operand by 1. This instruction increments the destination
operand by 1.
 This instruction differs with the ADD by 1 instruction in the way that the INC
instruction does not affect the carry flag whereas the ADD instruction
modifies the carry flag.
 The INC instruction is more compact and often faster than the comparable
ADD instruction because it is one byte instruction
 In INC all flags, except the carry flag, changes.
Arithmetic Instructions
 AAA − no operands ASCII Adjust after Addition
 Used to adjust ASCII after addition.
 AAA converts the result of the addition of two valid unpacked BCD digits to a
valid packed BCD number. AL register is the implied operand.
 The decimal numbers in ASCII have a code from 30H (“0”) to 39H (“9”).
When we add two ASCII numbers, the result will not be in ASCII. The AAA
instruction will adjust the result of addition to a BCD digit. The instruction
assumes that the odd operands are proper ASCII values.
 If the addition produces carry (AF=1), the AH register is incremented and
the carry CF and auxiliary carry flags are set to 1. If the addition did not
produce a decimal carry, CF and AF are cleared to 0 and AH is not altered.
In both cases the higher 4-bits of AL are cleared to 0.
Arithmetic Instructions
 DAA − no operands, Decimal adjust after accumulation
 Used to adjust the decimal after the addition/subtraction operation.
 The DAA instruction adjusts the result of an addition to a packed BCD
number. DAA converts the binary sum to packed BCD format. If the sum is
greater than 99H after adjustment, then the carry and auxiliary carry flag
are set. Otherwise, the carry and auxiliary carry flags are cleared.
 For example, two BCD values are added as if they were binary numbers and
the result will be in binary and then to convert this binary sum the DAA
instruction is executed to correct the result in BCD. The DAA instruction is
executed to correct the result in BCD. The DAA functions like AAA except it
handles packed BCD values rather than unpacked. All flag bits are modified
as per the result.
Arithmetic Instructions
Instructions to perform subtraction
 SUB − Used to subtract the byte from byte/word from word.
 SBB − Used to perform subtraction with borrow.
 DEC − Used to decrement the provided byte/word by 1.
 NPG − Used to negate each bit of the provided byte/word and add 1/2’s
complement.
 CMP − Used to compare 2 provided byte/word.
 AAS − Used to adjust ASCII codes after subtraction.
 DAS − Used to adjust decimal after subtraction.
Arithmetic Instructions
Instructions to perform subtraction
 SUB − subtraction
 Used to subtract the byte from byte/word from word.
 Operands: REG, memory; memory, REG; REG, REG;
memory, immediate; REG,
immediate;
 This instruction subtracts the source operand from the destination operand
and stores in the result in the destination operand. Segment registers
cannot be used as an operand in ADD instruction. Memory to memory and
IO to memory addition is not permitted. Flag bits are modified as per the
result of the operation.
 Example: MOV AL, 05H; SUB AL, 02H;
After the execution of the SUB instruction AL with 03H.
Arithmetic Instructions
 SBB − Subtract with borrow.
 Used to perform subtraction with borrow.
 Operands: REG, memory; memory, REG; REG, REG;
memory, immediate; REG, immediate;
 This instruction subtracts the source from the destination along with the
value of the carry flag. The result is stored in the destination. This
instruction is used to subtract data which are of large in size, i.e. double
word type.
 DEST operand = DEST operand – SRC operand – Carry flag.
 The carry flag will set if an unsigned overflow occurs during the SUB and
SBB instructions.
Arithmetic Instructions
 DEC − Decrement
 Used to decrement the provided byte/word by 1.
 Operand: REG
memory
 This instruction decrements the destination operand by 1. This instruction
differs with the SUB by 1 instruction in the way that the DEC instruction
does not affect the carry flag whereas the SUB instruction affects the carry
flag. The DEC instruction is more compact and often faster than the
comparable ADD instruction because it is a one-byte instruction. In DEC
except the carry flag all other flag changes as that of in SUB and SBB
instructions.
Arithmetic Instructions
 NEG − Negate
 Used to negate each bit of the provided byte/word and add 1/2’s
complement.
 Operand: REG
memory
 This instruction produces the two’s complement of the specified operand
and stored the result in the same operand. Microprocessor performs the
negate (NEG) operation by subtracting the operand from 0. This is done to
represent a negative number. All the flags are modified as per the result.
 Example: MOV AL, 15H
NEG AL;
AL = 0EBH (2’s complement of 15H)
Arithmetic Instructions
 CMP −
 Used to compare 2 provided byte/word.
 Operands: REG, memory; memory, REG; REG, REG;
memory, immediate; REG,
immediate;
 This instruction compares the source operand with the destination operand.
Microprocessor executes this CMP instruction by subtracting the source from
destination, but none of the operand is modified. The result is reflected by
flag bits. Generally the result of this instruction is used for conditional
control transfer instructions. The comparison may be signed or unsigned
operation. Unsigned comparison reflects carry and zero flag whereas signed
comparison reflects zero, sign and overflow flag.
Arithmetic Instructions
 AAS − no operands, ASCII adjustment after subtraction
 Used to adjust ASCII codes after subtraction.
 AAS converts the result of the subtraction of two valid unpacked BCD digits
to a single valid BCD number. AL register is an implicit operand.
 The two operands of the subtraction must have its lower 4-bit contain
number in the range of 0-9. The AAS instruction then adjust AL so that it
contains a correct BCD digit.
 The AAS instruction operates on strings of ASCII numbers with one decimal
digit per byte. This instruction used after a SUB or SBB on the ASCII value.
Except carry and auxiliary carry flag bite, all other flag bits are undefined.
Arithmetic Instructions
 DAS − no operands,
 Used to adjust decimal after subtraction.
 The DAS instruction adjusts the result of a subtraction to a BCD packed
number (less than 100 decimal).
 DAS converts the binary result of subtraction into packed BCD.
 If the sum is greater than 99H after adjustment, then the carry and auxiliary
carry flags are set. Otherwise, carry and auxiliary carry flags are cleared.
 All flag bits are modified as per the result.
Arithmetic Instructions
Instruction to perform multiplication
 MUL − Used to multiply unsigned byte by byte/word by word.
 IMUL − Used to multiply signed byte by byte/word by word.
 AAM − Used to adjust ASCII codes after multiplication.
Arithmetic Instructions
Instruction to perform multiplication
 MUL − Multiplication
 Used to multiply unsigned byte by byte/word by word.
 Operands: REG; memory;
 The instruction multiplies the content of AL or AX by a specified source
operand. The AL and the AX are the implied destination operands for 8-bit or
16-bit multiplication. This is an unsigned operation, hence both the
operands are treated as unsinged operands. Both the operands should of
same size.
 For a 16-bit multiplication, the implied operand will be AX register, the
product which is of 32-bit will be stored in DX:AX register pair. For an 8-boit
multiplication, the implied operand will be AL register, the product which is
of 16-bit will be stored in AX register.
Arithmetic Instructions
 MUL − Multiplication
 After multiplication, if DX is not 0 for 16-bit operands or AH is not 0 for 8-bit
operands, then the carry and overflow flags will set. The A, P, S and Z flags
are undefined, i.e. the value of these flag bits may be 0 or 1.
 Example: MOV AL, 0FDH
MOV CL, 05H
MUL CL;
Ans: AX = 04F1H
CF = OF = 0,
when high section of the result is zero.
Arithmetic Instructions
 IMUL − signed multiplication
 Used to multiply signed byte by byte/word by word.
 Operands: REG; memory;
 This instruction is exactly same as that of MUL except that here both
operands are signed numbers. The source operand cannot be immediate
data or a segment register. If the product sign is extended into DX for 16-bit
operand and AH for 8-bit operand, then the carry and overflow flags are set
and remaining flags remain undefined.
 Example: MOV AL, -03H
MOV CL, -05H
IMUL CL ; AX = 000FH
CF = OF = 0 when result fits into operand of IMUL
Arithmetic Instructions
 AAM − no operands, ASCII adjustment after multiplication
 Used to adjust ASCII codes after multiplication.
 AAM converts the result of the multiplication of two valid unpacked BCD
digits into a valid unpacked BCD number. AX is the implicit operand in AAM.
 AAM unpacks the result by dividing AX by 10, placing the quotient (Most
Significant Digit) in AH and the reminder (Least Significant Digit) in AL.
 In AAM, except carry and auxiliary carry flag bits, all other flag bits are
undefined.
Arithmetic Instructions
Instructions to perform division
 DIV − Used to divide the unsigned word by byte or unsigned double word by
word.
 IDIV − Used to divide the signed word by byte or signed double word by word.
 AAD − Used to adjust ASCII codes after division.
 CBW − Used to fill the upper byte of the word with the copies of sign bit of the
lower byte.
 CWD − Used to fill the upper word of the double word with the sign bit of the
lower word.
Arithmetic Instructions
Instructions to perform division
 DIV − unsigned division
 Used to divide the unsigned word by byte or unsigned double word by word.
 Operands: REG; memory;
 The instruction divides the content of AX or DX:AX by a specified source
operand. The AX and DX:AX are the implied destination operands for 8-bit or
16-bit division. This is an unsigned operation, hence both the operands are
treated as unsinged operands. Both the operands should of same size.
 If the divisor is 16-bit wide, then the dividend is the DX:AX register pair.
After the division the quotient will be stored into AX and the reminder into
DX. When the divisor is of 8-bits, the dividend is AX, in this case quotient will
be stored in AL and the reminder in AH.
Arithmetic Instructions
 DIV − unsigned division
 Example: MOV AX, 00C8H
MOV CL, 06H
DIV CL
The result is available in AL = 21H and the reminder in AH = 02H
Arithmetic Instructions
 IDIV − Signed Division
 Used to divide the signed word by byte or signed double word by word.
 Operands: REG; memory;
 This instruction is exactly same as that of DIV except that here both
operands are signed numbers. In bot DIV and IDIV instructions, the source
operand cannot be immediate data or a segment register. All the flag bits
are undefined.
 Example: MOV AX, -200 ; AX = 0FF38H
MOV CL, 6
IDIV CL
The result is available in AL (= DFH = -33) and the reminder in AH (= FEH =
02).
Arithmetic Instructions
 AAD − no operands, ASCII adjustment before Division
 Used to adjust ASCII codes before division.
 AAD converts unpacked BCD digits in the AH and AL register into a single
binary number in the AX register in preparation for a division operation.
 The most significant BCD digit is stored in the Ah register and the last
significant BCD digit is stored in AL register before the execution of AAD.
The two unpacked BCD digits are combined into a single binary number by
the AAD instruction by setting AL = (AH*10) + AL and clearing AH to 0.
 The carry and overflow flag bits are modified as per the result and all other
flag bits remain undefined.
Arithmetic Instructions
 CBW − no operand, Convert Byte to Word
 Used to fill the upper byte of the word with the copies of sign bit of the lower
byte.
 CBW converts the signed value in the AL register into an equivalent 16-bit
signed value in the AX register by extending the sign bit to the left.
 This instruction copies the sign of a byte in AL to all the bits in AH. AH is
then said to be sign extension of AL. The flags are not modified and remains
unchanged.
 Example: MOV AX, 0 ; AH = 0, AL = 0
MOV AL, F5H
CBW ; AX = 0FFF5H
In this example, F5H is equivalent to 11110101B, this means the sign bit is 1.
After the CBW, the sign bit will be extended into AX register
Arithmetic Instructions
 CWD − no operand, Convert Word to Double word
 Used to fill the upper word of the double word with the sign bit of the lower
word.
 CWD converts the 16-bit signed value in the AX register into an equivalent
32-bit signed value in DX:AX register pair by duplicating the sign bit to the
left.
 CWD instruction sets all the bits in the DX register to the same sign bit of
the AX register. The effect is to create a 32-bit signed result that has the
same integer value as the original 16-bit operand. The flags are not
modified and remain unchanged.
 Example: MOV DX, 0
MOV AX, 0
MOV AX, -14H ; DX:AX =
0000H:0FFECH
CWD ; DX:AX
= 0FFFFH:0FFECH
Bit Manipulation Instructions
Instructions to perform logical operation
 NOT − Used to invert each bit of a byte or word.
 AND − Used for adding each bit in a byte/word with the corresponding bit in
another byte/word.
 OR − Used to multiply each bit in a byte/word with the corresponding bit in
another byte/word.
 XOR − Used to perform Exclusive-OR operation over each bit in a byte/word
with the corresponding bit in another byte/word.
 TEST − Used to and operands to update flags, without affecting operands.
Bit Manipulation Instructions
Instructions to perform logical operation
 NOT − Logically NOT
 Used to invert each bit of a byte or word.
 Operands: REG; memory;
 This instruction complements the individual bits of the operand and save the
result in the same operand. In other words, we can say it generated the 1’s
compliment or the NOT operation of the operand. After this instruction the
flag register remains unchanged.
 Example: MOV AL, 39H
NOT AL ; AL = C6H
Bit Manipulation Instructions
 AND − logically AND
 Used to multiply each bit in a byte/word with the corresponding bit in
another byte/word.
 Operands: REG, memory; memory, REG; REG, REG;
memory, immediate; REG,
immediate;
 This instruction performs a bitwise logical AND of destination operand and
the source operand. The result is stored in destination operand. The Z, S and
P flag bits are modified as per the result. The carry and overflow flag bits
are 0 and auxiliary carry is undefined.
 Example: MOV AL, 61H ; AL = 01100001
AND AL, CFH ; AL = 01000001
Bit Manipulation Instructions
 OR − Logically OR
 Used to add each bit in a byte/word with the corresponding bit in another
byte/word.
 Operands: REG, memory; memory, REG; REG, REG;
memory, immediate; REG,
immediate;
 This instruction performs a bitwise logical OR operation between the source
and destination operand. The result is stored in destination operand.
 The Z, S and P flag bits are modified as per the result. The carry and
overflow flag bits are 0 and auxiliary carry is undefined.
Bit Manipulation Instructions
 XOR − logically EX-OR
 Used to perform Exclusive-OR operation over each bit in a byte/word with
the corresponding bit in another byte/word.
 Operands: REG, memory; memory, REG; REG, REG;
memory, immediate; REG,
immediate;
 This instruction performs a bitwise exclusive OR operation between the
source and destination operand. The result is stored in destination operand.
 The Z, S and P flag bits are modified as per the result. The carry and
overflow flag bits are 0 and auxiliary carry is undefined.
Bit Manipulation Instructions
 TEST − Test
 Used to add operands to update flags, without affecting operands.
 Operands: REG, memory; memory, REG; REG, REG;
memory, immediate; REG,
immediate;
 This instruction perform logical AND operation between all bits of the source
and destination operands, but none of the operand is modified. Only Z, S
and P flags are modified. The carry and overflow flags are cleared.
 This instruction is used to test specified bits of an operand set the flags for a
subsequent conditional jump or set instruction.
 Example: MOV AL, 25H
TEST AL, 05H ; ZF = 0
TEST AL, 20H ; ZF = 0
Bit Manipulation Instructions
Instructions to perform shift operations
 SHL/SAL − Used to shift bits of a byte/word towards left and put zero(S) in
LSBs.
 SHR − Used to shift bits of a byte/word towards the right and put zero(S) in
MSBs.
 SAR − Used to shift bits of a byte/word towards the right and copy the old MSB
into the new MSB.
Bit Manipulation Instructions
Instructions to perform shift operations
 SHL/SAL − Arithmetic / Logical Shift Left
 Used to shift bits of a byte/word towards left and put zero(S) in LSBs.
 Operands: memory, immediate; REG, immediate;
memory, CL; REG, CL;
 The SHL (shift logically left) and SAL (shift arithmetically left) are used to
shift the content of the first operand towards left. The second operand may
be an immediate data or the counter register CL and represents the number
of times the shifting takes place. While each bit of the operand shifts to left,
the zeros fill vacated positions at the lower order bits.
SHL example
mov ax, 0A ; set AX to 0A (1010 in binary)
shl ax, 2 ; shifts 2 bits left in AX, now equal to 028 (101000 in binary)
shl ax, 1 ;Equivalent to AX*2
shl ax, 2 ;Equivalent to AX*4
shl ax, 3 ;Equivalent to AX*8
shl ax, 4 ;Equivalent to AX*16
shl ax, 5 ;Equivalent to AX*32
shl ax, 6 ;Equivalent to AX*64
shl ax, 7 ;Equivalent to AX*128
shl ax, 8 ;Equivalent to AX*256
Bit Manipulation Instructions
 SHR − logically shift right
 Used to shift bits of a byte/word towards the right and put zero(S) in MSBs.
 Operands: memory, immediate; REG, immediate;
memory, CL; REG,
CL;
 Shift, logically, the content of the first operand right by the number of times
specified by the second operand. The second operand may be an immediate
data or the counter register CL. In SHR while each bit is shifted right and
goes to the carry flag, a zero bit is inserted from the MSB side.
SHR Example
mov ax, 0xA ; set AX to 0xA (1010 in binary)
shr ax, 2 ; shifts 2 bits to the right in AX, now equal to 0x2 (0010 in binary)
shr ax, 1 ;Signed division by 2
shr ax, 2 ;Signed division by 4
shr ax, 3 ;Signed division by 8
shr ax, 4 ;Signed division by 16
shr ax, 5 ;Signed division by 32
shr ax, 6 ;Signed division by 64
shr ax, 7 ;Signed division by 128
shr ax, 8 ;Signed division by 256
Bit Manipulation Instructions
 SAR − Arithmetically shift right
 Used to shift bits of a byte/word towards the right and copy the old MSB into
the new MSB.
 Operands: memory, immediate; REG, immediate;
memory, CL; REG,
CL;
 Shift, arithmetically, the content of the first operand right by the number of
times specified by the second operand. The second operand may be an
immediate data or the counter register CL. In SAR while each bit is shifted
right and goes to the carry flag, the sign bit is inserted from the MSB side.
SAR Example
 Example:
If we execute
SAR AX,2
If Ax=1010 (10)
1st shift: 1101 (13)
2nd shift: 1110 (14)
Bit Manipulation Instructions
Instructions to perform rotate operations
 ROL − Used to rotate bits of byte/word towards the left, i.e. MSB to LSB and to
Carry Flag [CF].
 ROR − Used to rotate bits of byte/word towards the right, i.e. LSB to MSB and
to Carry Flag [CF].
 RCR − Used to rotate bits of byte/word towards the right, i.e. LSB to CF and CF
to MSB.
 RCL − Used to rotate bits of byte/word towards the left, i.e. MSB to CF and CF
to LSB.
Bit Manipulation Instructions
Instructions to perform rotate operations
 ROL − Rotate Left
 Used to rotate bits of byte/word towards the left, i.e. MSB to LSB and to
Carry Flag [CF].
 Operands: memory, immediate; REG, immediate;
 memory, CL; REG, CL;
 The ROL instruction is used to rotate the operand 1 left. In this instruction
the second operand may be an immediate value or the counter register CL.
This second operand decides the number of times the rotation will take
place.
Bit Manipulation Instructions
 ROR − Rotate Right
 Used to rotate bits of byte/word towards the right, i.e. LSB to MSB and to
Carry Flag [CF].
 Operands: memory, immediate; REG, immediate;
 memory, CL; REG, CL;
 The ROR instruction is used to rotate the operand 1 right. In this instruction
the second operand may be an immediate value or the counter register CL.
This second operand decides the number of times the rotation will take
place.
Bit Manipulation Instructions
 RCR − Rotate right through carry
 Used to rotate bits of byte/word towards the right, i.e. LSB to CF and CF to
MSB.
 Operands: memory, immediate; REG, immediate;
memory, CL; REG,
CL;
 This instruction performs the rotation of the contents of operand 1 right
through carry flag. The second operand may be an immediate value or the
counter register CL. This second operand decides the number of times the
rotation will takes place.
 RCR (Rotate Right through Carry Byte or Word):
 Syntax: RCR Destination, Count
 This inst rotates the data bits right within the destination operand through carry.
 The bit that gets rotated out of the LSB goes into the carry flag and the bit that was in
carry flag gets rotated into the MSB.
 Example: . RCR AL, 1; if AL = CDH and Carry = 1
 RCL AL, 1; if AL = 9EH and Carry = 1
Bit Manipulation Instructions
 RCL − Rotate Left Through Carry
 Used to rotate bits of byte/word towards the left, i.e. MSB to CF and CF to
LSB.
 Operands: memory, immediate; REG, immediate;
memory, CL; REG,
CL;
 This instruction performs the rotation of the contents of operand 1 right
through carry flag. The second operand may be an immediate value or the
counter register CL. This second operand decides the number of times the
rotation will takes place.
 RCL (Rotate Left through Carry Byte or Word): 
 Syntax: RCL Destination, Count  The operation of RCL is similar to ROL except that RCL
rotates bits through carry flag. 
 The bit that gets rotated out of the MSB goes into the carry flag and the bit that was in
carry flag gets rotated into the LSB.

 Example: RCL AL, 1; if AL = 9EH and Carry = 0

 RCL AL, 1; if AL = 9EH and Carry = 1
String Instructions
 REP − Used to repeat the given instruction till CX ≠ 0.
 REPE/REPZ − Used to repeat the given instruction until CX = 0 or zero flag ZF = 1.
 REPNE/REPNZ − Used to repeat the given instruction until CX = 0 or zero flag ZF = 1.
 MOVSB/MOVSW − Used to move the byte/word from one string to another.
 CMPSB/CMPSW − Used to compare two string bytes/words.
 STOSB/STOSW − Used to store a string data available in AL to the memory location.
 SCASB/SCASW − Used to scan a string and compare its byte with a byte in AL or string
word with a word in AX.
 LODSB/LODSW − Used to store the string byte into AL or string word into AX.
String Instructions
 REP − Repeat Unconditionally
 Used to repeat the given instruction till CX ≠ 0.
 This is a prefix instruction to a string instruction. This instruction repeats the
string instruction by the number of times indicated by CX.
 The execution of the string instruction stops when CX is decremented to 0.
 the REP instruction is generally used with MOVS and STOS string instruction.
 Except zero all other flags are undefined.
String Instructions
 REPE/REPZ − Repeat till equal / repeat till zero
 Used to repeat the given instruction until CX = 0 or zero flag ZF = 1.
 REPE / REPZ instructions are used to repeat a string instruction till the zero flag
is set. These two instructions are used with the SCAS and CMPS instructions as
these are the only instructions that modify the zero flag.
 REPNE/REPNZ − Repeat till not equal / repeat if no zero
 Used to repeat the given instruction until CX = 0 or zero flag ZF = 1.
 These instructions are used to repeat a string instruction till zero flag is not
zero or till CX becomes zero.
String Instructions
 MOVSB/MOVSW − no operand Move String / Move String Byte / Move String Word
 Used to move the byte/word from one string to another.
 MOVS is an excellent instruction with the help of which we can transfer data directly
from one memory location to another memory location.
 MOVSB and MOVSW instructions used to transfer byte or word source pointed by DS:SI
to the destination location pointed by ES:DI
 After the execution of the instruction, the SI and SI is incremented by one (string byte)
or two (string word) if the direction flag is zero, other wise SI and DI will decremented by
the same value for the byte and word string.
 Example: LEA SI, 2000H
LEA DI, 3000H
MOV CL, 15H
This program transfers 15H string
REP MOVSB
bytes from DS:2000H to ES:3000H
String Instructions
 CMPSB/CMPSW − no operand, compare string byte / word
 Used to compare two string bytes/words.
 These instructions are used to compare the two string bytes or string words
stored in memory. The source string is always pointed by SI in the data
segment and the destination string is pointed by the ES in the extra segment.
 To perform this operation destination string is subtracted from the source
string.
 After the operation none of the operands are modified, only the flags are
modified to reflect the result. The SI and DI registers are incremented if the
directional flag is zero, and decremented if directional flag is one.
String Instructions
 SCASB/SCASW − no operands, Scan String Byte / Scan String Word
 Used to scan a string and compare its byte with a byte in AL or string word
with a word in AX.
 These instructions are used to scan a string stored in memory to find a
value specified in the accumulator register. These instructions compare the
string present in AL or AX with the stored in memory pointed by ES:DI. The
SCAS instruction if performed by subtracting each element of the
destination from the accumulator contents.
 After the operation the flags are updated to show the comparison result,
none of the operand is modified. DI register is incremented if the directional
flag is zero or decremented if the direction flag is one.
String Instructions
 STOSB/STOSW − no operands, Store String Byte / Store String Word
 Used to store a string data available in AL in to the memory location.
 These instructions are used to store the string data available in the AL or AX
in the memory specified location by ES:DI. After the operation the flags are
updated to show the comparison result, none of the operand is modified. DI
register is incremented if the directional flag is zero or decremented if the
direction flag is one.
 Example: LEA DI, 2000H; MOV AX, 25FEH; MOV CX, 5; REP STOSW
 Here DI is initialized to point to the memory location 2000H in data
segment, then AX is loaded with the string value and counter CX is
initialized with 5. The REP STOSW instruction will store AX content (25FEH)
in the memory location ES:2000H onwards till CX is zero.
String Instructions
 LODSB/LODSW − Load String Byte / Load String Word
 Used to load the string byte into AL or string word into AX.
 Load AL or AX by the string byte or string word pointed by SI in data
segment. After execution of the instruction, the SI is incremented by one (in
case of string byte) or two (in case of string word) if the direction flag is
zero, otherwise the SI will be decremented by the same value for byte and
word string. The flag register will remain unmodified.
Transfer Instructions (Branch and Loop Instructions)
The control transfers instructions are used to transfer the control from one
memory location to another location. Control transfer instructions may be
conditional or unconditional. In case of conditional control transfer instruction, the
control will be transferred if the condition is true.

Instructions to transfer the instruction during an execution without any condition

−

 CALL − Used to call a procedure and save their return address to the stack.

 RET − Used to return from the procedure to the main program.

 JMP − Used to jump to the provided address to proceed to the next instruction.
Control Transfer Instructions without any condition
 CALL − Call subroutine / procedure
 This instruction is used to transfer the control of execution to a subroutine or
procedure. There are two basic types of CALL instruction, the Near CALL and Far Call.
 A CALL instruction is called Near CALL if the procedure is in the same code segment
as the main program. When the procedure is stored in a code segment different from
where the main program is stored, the CALL instruction is called Far CALL.
 When microprocessor executes the CALL instruction, the control is transferred to the
procedure, but before it goes to the subroutine it saves the returning address on the
top of the stack. The stack pointer is decremented by two and copies the offset of
the next instruction after CALL on the stack.
 The control is again transferred to main program when microprocessor comes across
RET instruction at end of the procedure. This is done by popping up the offset saved
on the stack back to IP
Control Transfer Instructions without any condition
 RET − no operand, Return

 Used to return from the procedure to the main program.

 This is the last instruction of a procedure. When microprocessor executes

this instruction, transfer the control from the subroutine to the main
program, in doing so it popped the returning address from the top of the
stack.

 A near return is specified by RETN and far return is specified by RETF. A near
return works by popping a word into IP. A far return works by popping a word
into IP and then popping a word into CS.
Control Transfer Instructions without any condition
 JMP − Jump Unconditionally
 Operands: label; 4-byte address;
 Used to jump to the provided address to proceed to the next instruction.
 This is an unconditional jump instruction. By this instruction, the control is
transferred from one memory location to another location within the
program. The 4-byte address specified as 234h:5678H. Here the first value
denotes the segment and the second value shows the offset.
 The jump instruction may be conditional also. The control will be transferred
to the label or 4-byte address only when the condition is true. Condition may
be logical or arithmetic and it may be signed or unsigned.
Control Transfer Instructions with some condition
Instructions to transfer the instruction during an execution with some conditions −
 JA/JNBE − Used to jump if above/not below/equal instruction satisfies.
 JAE/JNB − Used to jump if above/not below instruction satisfies.
 JBE/JNA − Used to jump if below/equal/ not above instruction satisfies.
 JC − Used to jump if carry flag CF = 1
 JE/JZ − Used to jump if equal/zero flag ZF = 1
 JG/JNLE − Used to jump if greater/not less than/equal instruction satisfies.
 JGE/JNL − Used to jump if greater than/equal/not less than instruction satisfies.
 JL/JNGE − Used to jump if less than/not greater than/equal instruction satisfies.
 JLE/JNG − Used to jump if less than/equal/if not greater than instruction satisfies.
Control Transfer Instructions with some condition
 JA/JNBE − Jump if above/ Jump if not below or equal
 Description: Jumps to the destination label mentioned in the instruction if the result of
previous instruction (generally compare) causes both CF and ZF to have value equal to
0, else no action is taken.
 Usage: JA dest, JNBE dest
 [dest: address in the range of -128 bytes to +127 bytes from the address of instruction
after JA/JNBE]
 Flags: the instruction has no effect on any flags.
 Example:
CMP AX, 0030H; compares by subtracting 0030H from the value in AX register
JA LABEL1; jumps to the address specified by LABEL1 if value in register AX is above
the value 0030H
Control Transfer Instructions with some condition
 JAE/JNB − Jump if above or equal/ Jump if not below
 Description: Jumps to the destination label mentioned in the instruction if the result of
previous instruction (generally compare) causes CF to have value equal to 0, else no
action is taken.
 Usage: JAE dest, JNB dest
 [dest: address in the range of -128 bytes to +127 bytes from the address of instruction
after JAE/JNB]
 Flags: the instruction has no effect on any flags.
 Example:
CMP AX, 0030H; compares by subtracting 0030H from the value in AX regsiter
JAE LABEL1; jumps to the address specified by LABEL1 if value in register AX is
above or equal to the value 0030H
Control Transfer Instructions with some condition
 JBE/JNA − Jump if below or equal/ Jump if not above
 Description: Jumps to the destination label mentioned in the instruction if the result of
previous instruction (generally compare) causes either the CF or ZF to have value equal
to 1, else no action is taken.
 Usage: JBE dest, JNA dest
 [dest: address in the range of -128 bytes to +127 bytes from the address of instruction
after JBE/JNA]
 Flags: the instruction has no effect on any flags.
 Example:
CMP AX, 0030H; compares by subtracting 0030H from the value in AX regsiter
JBE LABEL1; jumps to the address specified by LABEL1 if value in register AX is
below or equal to the value 0030H
Control Transfer Instructions with some condition
 JC −Jump if carry
 Description: Jumps to the destination label mentioned in the instruction if the value of
CF is 1, else no action is taken.
 Usage: JC dest
 [dest: address in the range of -128 bytes to +127 bytes from the address of instruction
after JC]
 Flags: the instruction has no effect on any flags.
 Example:
JC LABEL1; jumps to the address specified by LABEL1 if CF is set
Control Transfer Instructions with some condition
 JE/JZ − Jump if equal/ Jump if zero
 Description: Jumps to the destination label mentioned in the instruction if the ZF is set,
else no action is taken.
 Usage: JE dest, JZ dest
 [dest: address in the range of -128 bytes to +127 bytes from the address of instruction
after JE/JZ]
 Flags: the instruction has no effect on any flags.
 Example:
JZ LABEL1; jumps to the address specified by LABEL1 if ZF=1
Control Transfer Instructions with some condition
 JG/JNLE − Jump if greater/ Jump if not less than or equal
 Description: Jumps to the destination label mentioned in the instruction if the result of
previous instruction (generally compare) causes ZF to have value equal to 0 and CF and
OF to have same values, else no action is taken.
 Usage: JG dest, JNLE dest
 [dest: addressin the range of -128 bytes to +127 bytes from the address of instruction
after JG/JNLE]
 Flags: the instruction has no effect on any flags.
 Example:
CMP AX, 0030H; compares by subtracting 0030H from the value in AX regsiter
JG LABEL1; jumps to the address specified by LABEL1 if value in register AX is
more positive than the value 0030H
Control Transfer Instructions with some condition
 JGE/JNL − Jump if greater than or equal/ Jump if not less than
 Description: Jumps to the destination label mentioned in the instruction if the result of
previous instruction (generally compare) causes CF to have value equal to OF, else no
action is taken.
 Usage: JGE dest, JNL dest
 [dest: address in the range of -128 bytes to +127 bytes from the address of instruction
after JGE/JNL]
 Flags: the instruction has no effect on any flags.
 Example:
CMP AX, 0030H; compares by subtracting 0030H from the value in AX regsiter
JGE LABEL1; jumps to the address specified by LABEL1 if value in register AX is
more positive or equal to the value 0030H
Control Transfer Instructions with some condition
 JL/JNGE −Jump if less than/ Jump if not greater than or equal
 Description: Jumps to the destination label mentioned in the instruction if the result of
previous instruction (generally compare) causes CF to have value not equal to OF, else
no action is taken.
 Usage: JL dest, JNGE dest
 [dest: address in the range of -128 bytes to +127 bytes from the address of instruction
after JL/JNGE]
 Flags: the instruction has no effect on any flags.
 Example:
CMP AX, 0030H; compares by subtracting 0030H from the value in AX regsiter
JL LABEL1; jumps to the address specified by LABEL1 if value in register AX is
more negative than the value 0030H
Control Transfer Instructions with some condition
 JLE/JNG − Jump if less than or equal/ Jump if not greater than
 Description: Jumps to the destination label mentioned in the instruction if the result of
previous instruction (generally compare) causes either the ZF to have value equal to 1
or OF to have value unequal to SF, else no action is taken.
 Usage: JLE dest, JNG dest
 [dest: address in the range of -128 bytes to +127 bytes from the address of instruction
after JLE/JNG]
 Flags: the instruction has no effect on any flags.
 Example:
CMP AX, 0030H; compares by subtracting 0030H from the value in AX regsiter
JLE LABEL1; jumps to the address specified by LABEL1 if value in register AX is
more negative than or equal to the value 0030H
Control Transfer Instructions with some condition
 JNE/JNZ − Jump if not equal/ Jump if not zero
 Description: Jumps to the destination label mentioned in the instruction if the ZF is 0,
else no action is taken.
 Usage: JNZ dest, JNE dest
 [dest: address in the range of -128 bytes to +127 bytes from the address of instruction
after JNZ/JNE]
 Flags: the instruction has no effect on any flags.
 Example:
JNZ LABEL1; jumps to the address specified by LABEL1 if ZF=0
Control Transfer Instructions with some condition
 JNO − Jump if no overflow
 Description: Jumps to the destination label mentioned in the instruction if the OF is 0,
else no action is taken. The overflow flag is set when a signed arithmetic operation
produces a result too large for the destination register or memory location to store.
 Usage: JNO dest
 [dest: address in the range of -128 bytes to +127 bytes from the address of instruction
after JNO]
 Flags: the instruction has no effect on any flags.
 Example:
ADD AL,BL; add signed bytes in AL and BL
JNZ LABEL1; jumps to the address specified by LABEL1 if OF=0 after to the add
instruction above
Control Transfer Instructions with some condition
 JNP/JPO − Jump if no parity/ Jump if parity odd
 Description: Jumps to the destination label mentioned in the instruction if the result of
previous instruction (generally compare) causes PF to have value equal to 0, else no
action is taken.
 Usage: JNP dest, JPO dest
 [dest: address in the range of -128 bytes to +127 bytes from the address of instruction
after JNP/JPO]
 Flags: the instruction has no effect on any flags.
 Example:
OR AX, AX; Set flags
JNP LABEL1; even parity is expected, jumps to the address specified by LABEL1
if parity is found to be odd
Control Transfer Instructions with some condition
 JNS − Jump if not signed (Jump if positive)
 Description: Jumps to the destination label mentioned in the instruction if the SF is set,
else no action is taken. If the sign flag is 0 it indicates a positive signed number. Hence
the instruction causes a jump if the result of previous instruction is positive.
 Usage: JNS dest
 [dest: address in the range of -128 bytes to +127 bytes from the address of instruction
after JNS]
 Flags: the instruction has no effect on any flags.
 Example:
ADD AL,BL; add signed bytes in AL and BL
JNS LABEL1; jumps to the address specified by LABEL1 if SF=0 due to the add
instruction above
Control Transfer Instructions with some condition
 JO − Jump if overflow
 Description: Jumps to the destination label mentioned in the instruction if the OF is set,
else no action is taken. The overflow flag is set when a signed arithmetic operation
produces a result too large for the destination register or memory location to store.
 Usage: JO dest
 [dest: address in the range of -128 bytes to +127 bytes from the address of instruction
after JO]
 Flags: the instruction has no effect on any flags.
 Example:
ADD AL,BL; add signed bytes in AL and BL
JZ LABEL1; jumps to the address specified by LABEL1 if OF=1 due to the add
instruction above
Control Transfer Instructions with some condition
 JP/JPE − Jump if parity/ Jump if parity even
 Description: Jumps to the destination label mentioned in the instruction if the result of
previous instruction (generally compare) causes PF to have value equal to 1, else no
action is taken.
 Usage: JP dest, JPE dest
 [dest: address in the range of -128 bytes to +127 bytes from the address of instruction
after JP/JPE]
 Flags: the instruction has no effect on any flags.
 Example:
OR AX, AX; Set flags
JNP LABEL1; odd parity is expected, jumps to the address specified by LABEL1 if
parity is found to be even
Control Transfer Instructions with some condition
 JS − Jump if signed (Jump if negative)
 Description: Jumps to the destination label mentioned in the instruction if the SF is 0,
else no action is taken. If the sign flag is 0 it indicates a positive signed number. Hence
the instruction causes a jump if the result of previous instruction is negative.
 Usage: JS dest
 [dest: address in the range of -128 bytes to +127 bytes from the address of instruction
after JS]
 Flags: the instruction has no effect on any flags.
 Example:
 ADD AL,BL; add signed bytes in AL and BL
 JS LABEL1; jumps to the address specified by LABEL1 if SF=1 due to the add
instruction above
Process Control Instructions
These instructions are used to control the processor action by setting/resetting
the flag values.
 STC − Used to set carry flag CF to 1
 CLC − Used to clear/reset carry flag CF to 0
 CMC − Used to put complement at the state of carry flag CF.
 STD − Used to set the direction flag DF to 1
 CLD − Used to clear/reset the direction flag DF to 0
 STI − Used to set the interrupt enable flag to 1, i.e., enable INTR input.
 CLI − Used to clear the interrupt enable flag to 0, i.e., disable INTR input.
Process Control Instructions
These instructions are used to control the processor action by setting/resetting
the flag values.
 NOP − No Operation
 ESC − Escape
 WAIT − Wait
 LOCK − Lock
Process Control Instructions
These instructions are used to control the processor action by setting/resetting
the flag values.
 NOP − No Operation
 DESCRIPTION: This is a do nothing instruction. It results in occupation of both
space and time and is most useful for patching code segments.
 USAGE: NOP
 FLAGS: NONE
 EXAMPLE:
;To do nothing 2 times:
DELAY:NOP ; does nothing
NOP ; does nothing
RET ; returns to point of function call
Process Control Instructions
 ESC − Escape
 DESCRIPTION: The ESC instruction passes instructions to floating point coprocessor from the
microprocessor. Whenever an ESC instruction executes, the microprocessor provides the memory
address, if required, but otherwise performs a NOP.
 USAGE: ESC immediate, src
 FLAGS: NONE
 WAIT − Wait
 DESCRIPTION: The WAIT instruction monitors the hardware BUSY pin on 80286 and 80386, and
the TEST pin on the 8086/8088. If WAIT instruction executes while the pin=1, nothing happens and
the next instruction executes normally. If pin=0, when the WAIT instruction executes, the
microprocessor waits for the pin to return to logic 1. This instruction is used to prevent the CPU from
accessing memory that may be temporarily in use by the coprocessor.
 USAGE: WAIT
 FLAGS: NONE
Process Control Instructions
 LOCK − Lock
 DESCRIPTION: The LOCK prefix appends to an instruction and causes the x86 LOCK Pin
to be asserted(become logic 0) and thereby causing external bus masters and other
peripherals to be disabled. The LOCK instruction causes the LOCK pin to be activated for
only the duration of the locked instruction.
 USAGE : LOCK : [Instruction]
 FLAGS : NONE
 EXAMPLES:
 LOCK: MOV AL,BL ; Causes the LOCK Pin to be activated for the particular mov
instruction
Iteration Control Instructions
These instructions are used to execute the given instructions for number of times.
 LOOP − Used to loop a group of instructions until the condition satisfies,
i.e., CX = 0
 LOOPE/LOOPZ − Used to loop a group of instructions till it satisfies
ZF = 1 & CX = 0
 LOOPNE/LOOPNZ − Used to loop a group of instructions till it satisfies
ZF = 0 & CX = 0
 JCXZ − Used to jump to the provided address if CX = 0
Iteration Control Instructions
These instructions are used to execute the given instructions for number of times.
 LOOP − Used to loop a group of instructions until the condition satisfies, i.e., CX = 0

 Description: Contents of CX register are decremented by 1 and if the new value in CX

register is non-zero, a jump is taken to the destination label mentioned in the
instruction, else no action is taken.
 Usage: LOOP dest
 [dest: addressin the range of -128 bytes to +127 bytes from the address of instruction
after LOOP]
 Flags: the instruction has no effect on any flags.
 Example:
LOOP LABEL1; jumps to the address specified by LABEL1 if value in register CX
is non-zero after it has been decremented
Iteration Control Instructions
 LOOPE/LOOPZ − Used to loop a group of instructions till it satisfies ZF = 1 & CX = 0

 Description: Contents of CX register are decremented by 1 and if the new value in CX

register is non-zero and the ZF is set, a jump is taken to the destination label mentioned
in the instruction, else no action is taken.
 Usage: LOOPE dest, LOOPZ dest
 [dest: addressin the range of -128 bytes to +127 bytes from the address of instruction
after LOOPE/LOOPZ]
 Flags: the instruction has no effect on any flags.
 Example:
LOOPE LABEL1; jumps to the address specified by LABEL1 if value in register CX
is non-zero after it has been decremented and ZF is set due to previous instruction
Iteration Control Instructions
 LOOPNE/LOOPNZ − Used to loop a group of instructions till it satisfies ZF = 0 & CX =
0

 Description: Contents of CX register are decremented by 1 and if the new value in CX

register is non-zero and the ZF is 0, a jump is taken to the destination label mentioned in
the instruction, else no action is taken.
 Usage: LOOPNE dest, LOOPNZ dest
 [dest: addressin the range of -128 bytes to +127 bytes from the address of instruction
after LOOPNE/LOOPNZ]
 Flags: the instruction has no effect on any flags.
 Example:
LOOPNE LABEL1; jumps to the address specified by LABEL1 if value in register
CX is non-zero after it has been decremented and ZF is 0 due to previous instruction
Iteration Control Instructions
 JCXZ − Used to jump to the provided address if CX = 0
 The Jump if CX is Zero causes a jump to a label given in the instruction if CX contains all
zeros; unsigned comparison is used.

 JCXZ does not look at ZF when deciding to jump. Destination label must be in the
range of -128 to 127 bytes from the address of the instruction after the JCXZ instruction.
 Usage JCXZ Label
 JECXZ Label (386+)
 Flags None
Interrupt Instructions
These instructions are used to call the interrupt during program execution.

 INT − Used to interrupt the program during execution and calling service
specified.

 INTO − Used to interrupt the program during execution if OF = 1

 IRET − Used to return from interrupt service to the main program

Interrupt Instructions
 INT The INT instruction initiates a software interrupt by doing the following:
1. Decrement the stack pointer by 2 and push the flags onto the stack.
2. Decrement the stack pointer by 2 and push the contents of CS onto the stack.
3. Decrement the stack pointer by 3 and push the offset of the next instruction
after the INT number instruction on the stack.
4. Get a new value for UP from an absolute memory address of 4 times the type
specified in the instruction. For an INT 8 instruction, for example, the new IP will
be read from address 00020H.
5. Get a new value for CS from an absolute memory address of 4 times the type
specified in the instruction plus 2. For the same example, CS = 00022H.
6. Reset both IF and TF.
Interrupt Instructions
 INT The INT instruction initiates a software interrupt by doing the following:
 Usage INT <Type>
 Type is between 0 and 255
 Flags IF, TF
 Example
INT 35 ;New IP from 0008CH, new CS from 0008EH
INT 3 ;Special form which is used as a breakpoint instruction on many
systems. ;New IP: 0000CH, CS: 0000EH. Has a single-
byte code CCH.
Interrupt Instructions
 INTO − Used to interrupt the program during execution if OF = 1
 INTO stands for the Interrupt on Overflow instruction. If the Overflow Flag (OF) = 1,
this instruction causes the 8086 to do an indirect far call to a procedure you write to
handle the overflow condition (INT 4). IP is read from 00010H and CS from 00012H.
 The foll. steps are executed by the 8086 before doing the call:
1. Decrement the stack pointer by 2 and push the flags onto the stack
2. Decrement SP by 2, push CS onto the stack.
3. Decrement SP by 2, push the offset of the next instruction after INTO onto the stack
4. Reset TF and IF.
 Usage INTO
 Flags IF, TF
Interrupt Instructions
 IRET − Used to return from interrupt service to the main program

 The IRET instruction is used at the end of an interrupt service procedure to

return execution to the interrupted program. To do this return, the 8086 copies
the saved value of IP from the stack to IP, the stored value of CS from the stack
to CS, and the stored value of the flags back to the flag register.
 Flag values from the procedure will be lost unless they are specifically saved in
some way.
 Usage IRET
 IRETD (386+)
 Flags AF, CF, DF, IF, ZF, SF, TF, PF