21CSS201T

COMPUTER ORGANIZATION AND ARCHITECTURE

UNIT-2
Topic : Basic Structure of a Computer

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Basic Structure of Computers

 Computer Architecture in general covers three aspects of computer design

namely: Computer Hardware, Instruction set Architecture and Computer
Organization.
 Computer hardware consists of electronic circuits, displays, magnetic and
optical storage media and communication facilities.
 Instruction set Architecture is programmer visible machine interface such as
instruction set, registers, memory organization and exception handling. Two
main approaches are mainly CISC (Complex Instruction Set Computer) and
RISC (Reduced Instruction Set Computer)
 Computer Organization includes the high level aspects of a design, such as
memory system, the bus structure and the design of the internal CPU.
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Computer Types
 Computer is a fast electronic calculating machine which accepts digital
input, processes it according to the internally stored instructions
(Programs) and produces the result on the output device. The internal
operation of the computer can be as depicted in the figure below:

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Computer Types – contd.

The computers can be classified into various categoriesas given

below:
 Micro Computer
 Laptop Computer
 Work Station
 Super Computer
 Main Frame
 Hand Held
 Multi core

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Computer Types – contd.
Micro Computer: A personal computer; designed to meet the computer
needs of an individual. Provides access to a wide variety of computing
applications, such as word processing, photo editing, e-mail, and internet.

Laptop Computer: A portable, compact computer that can run on power

supply or a battery unit. All components are integrated as one compact
unit. It is generally more expensive than a comparable desktop. It is also
called a Notebook.

Work Station: Powerful desktop computer designed for specialized tasks.

Generally used for tasks that requires a lot of processing speed. Can also
be an ordinary personal computer attached to a LAN (local area network).
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Computer Types – contd.
Super Computer: A computer that is considered to be fastest in the world. Used to execute
tasks that would take lot of time for other computers. For Ex: Modeling weather systems,
genome sequence, etc (Refer site: http://www.top500.org/)

Main Frame: Large expensive computer capable of simultaneously processing data for
hundreds or thousands of users. Used to store, manage, and process large amounts of data
that need to be reliable, secure, and centralized.

Hand Held: It is also called a PDA (Personal Digital Assistant). A computer that fits into a
pocket, runs on batteries, and is used while holding the unit in your hand. Typically used as
an appointment book, address book, calculator and notepad.

Multi Core: Have Multiple Cores – parallel computing platforms. Many Cores or computing
elements in a single chip. Typical Examples: Sony Play station, Core 2 Duo, i3, i7 etc.
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 FUNCTIONAL UNITS OF COMPUTER
• Input Unit
• Output Unit
• Central processing Unit (ALU and Control Units)
• Memory
• Bus Structure

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 What is a computer?
• a computer is a sophisticated electronic calculating machine
that:
– Accepts input information,
– Processes the information according to a list of internally
stored instructions and
– Produces the resulting output information.
• Functions performed by a computer are:
– Accepting information to be processed as input.
– Storing a list of instructions to process the information.
– Processing the information according to the list of
instructions.
– Providing the results of the processing as output.
• What are the functional units of a computer?
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 Functions
• ALL computer functions are:

– Data PROCESSING
– Data STORAGE Data =
– Data MOVEMENT Information
– CONTROL Coordinates How
Information is Used

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 Functions of a computer
The operations performed by a computer using the functional units
can be summarized as follows:
• It accepts information (program and data) through input unit and
transfers it to the memory.
• Information stored in the memory is fetched, under program
control, into an arithmetic and logic unit for processing.
• Processed information leaves the computer through an output
unit.
• The control unit controls all activities taking place inside a
computer.
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 Arithmetic and Logic Unit (ALU)
• Operations are executed in the Arithmetic and
Logic Unit (ALU).
– Arithmetic operations such as addition, subtraction.
– Logic operations such as comparison of numbers.

• In order to execute an instruction, operands need to

be brought into the ALU from the memory.
– Operands are stored in general purpose registers available in the
ALU.
– Access times of general purpose registers are faster than the cache.
• Results of the operations are stored back in the
memory or retained in the processor for immediate
use.
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 Output unit
• Computers represent information in a specific binary form. Output units:
- Interface with output devices.
- Accept processed results provided by the computer in specific binary
form.
- Convert the information in binary form to a form understood by
an output device.

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 Control unit
• Operation of a computer can be summarized as:
– Accepts information from the input units (Input unit).
– Stores the information (Memory).
– Processes the information (ALU).
– Provides processed results through the output units (Output
unit).
• Operations of Input unit, Memory, ALU and Output unit are
coordinated by Control unit.
• Instructions control “what” operations take place (e.g. data transfer,
processing).
• Control unit generates timing signals which determines “when” a
particular operation takes place.
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 CPU (Central processing Unit)
• The “brain” of the machine
• Responsible for carrying out computational task
• Contains ALU, CU, Registers
• ALU Performs Arithmetic and logical operations
•CU Provides control signals in accordance with some timings which in turn
controls the execution process
•Register Stores data and result and speeds up the operation

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 CONTROL UNIT

•Control unit works with a

reference signal called
T1 Processor clock

T2 •Processor divides the

operations into basic steps

•Each basic step is

R1 R2 executed in one clock
cycle

R2

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 Example

Add R1, R2

T1 Enable R1

T2 Enable R2

T3 Enable ALU for addition operation

T4 Enable out put of ALU to store result of the

operation

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 Registers
Registers are fast stand-alone storage locations that hold data temporarily. Multiple registers are
needed to facilitate the operation of the CPU. Some of these registers are

 Two registers-MAR (Memory Address Register) and MDR (Memory

Data Register) : To handle the data transfer between main memory
and processor. MAR-Holds addresses, MDR-Holds data
 Instruction register (IR) : Hold the Instructions that is currently
being executed
 Program counter (PC) : Points to the next instructions that is to be
fetched from memory
General-purpose Registers: are used for holding data, intermediate
results of operations. They are also known as scratch-pad registers.
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 Memory Locations and Addresses

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 MEMORY HIERARCHY

Memory Hierarchy is to obtain the highest possible

access speed while minimizing the total cost of the memory system

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Memory Locations and Addresses
Memory consists of many millions n bits
first word
of storage cells, each of which can second word

store 1 bit.
Data is usually accessed in n-bit •
•
•
groups. n is called word length. i th word

The memory of a computer can be

schematically represented as a •
•
•
collection of words as shown in last word

Figure 1. Figure 1 Main Memory words.

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 MEMORY LOCATIONS AND ADDRESSES
•Main memory is the second major subsystem in a computer. It consists of a collection of
storage locations, each with a unique identifier, called an address.

•Data is transferred to and from memory in groups of bits called words. A word can be a
group of 8 bits, 16 bits, 32 bits or 64 bits (and growing).

•If the word is 8 bits, it is referred to as a byte. The term “byte” is so common in computer
science that sometimes a 16-bit word is referred to as a 2-byte word, or a 32-bit word is
referred to as a 4-byte word.

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 Main memory

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 Address space
•To access a word in memory requires an identifier. Although programmers use a name to
identify a word (or a collection of words), at the hardware level each word is identified by
an address.

•The total number of uniquely identifiable locations in memory is called the address
space.

•For example, a memory with 64 kilobytes (16 address line required) and a word size of 1
byte has an address space that ranges from 0 to 65,535.

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 Memory addresses are defined using unsigned
binary integers.

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 Example 1

A computer has 32 MB (megabytes) of memory. How many bits are needed to address any
single byte in memory?
Solution
The memory address space is 32 MB, or 225 (25 × 220). This means that we need log2 225, or 25
bits, to address each byte.

Example 2
A computer has 128 MB of memory. Each word in this computer is eight bytes. How many bits
are needed to address any single word in memory?
Solution
The memory address space is 128 MB, which means 227. However, each word is eight (23)
bytes, which means that we have 224 words. This means that we need log2 224, or 24 bits, to
address each word.
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 MEMORY OPERATIONS
• Today, general-purpose computers use a set of instructions called a program to
process data.

• A computer executes the program to create output data from input data

• Both program instructions and data operands are stored in memory

• Two basic operations requires in memory access

• Load operation (Read or Fetch)-Contents of specified memory location are read by
processor
• Store operation (Write)- Data from the processor is stored in specified memory location

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Assignment of Byte Address
• Big-endian and little-endian are terms that describe the order in which a
sequence of bytes are stored in computer memory.
• Big-endian is an order in which the "bigend" (most significant value in
the sequence) is stored first (at the lowest storage address).
• Little-endian is an order in which the “Little end" (least significant value
in the sequence) is stored first (at the lowest storage address).

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 Assignment of byte addresses
• Little Endian (e.g., in DEC, Intel)
» low order byte stored at lowest address
» byte0 byte1 byte2 byte3

• Eg: 46,78,96,54 (32 bit data)

• H BYTE L BYTE
54

• 96
8000
• 78
8001
• 8002 46
• 8003 |
• 8004
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Big Endian
• Big Endian (e.g., in IBM, Motorolla, Sun, HP)
» high order byte stored at lowest address
» byte3 byte2 byte1 byte0

• Programmers/protocols should be careful when transferring binary data

between Big Endian and Little Endian machines

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Big-Endian and Little-Endian Assignments
Big-Endian: lower byte addresses are used for the most significant bytes of the word
Little-Endian: opposite ordering. lower byte addresses are used for the less significant bytes of the word

W ord
address Byte address Byte address

0 0 1 2 3 0 3 2 1 0

4 4 5 6 7 4 7 6 5 4

• •
• •
• •

k k k k k k k k k k
2 - 4 2 - 4 2 - 3 2 - 2 2 - 1 2 - 4 2 - 1 2 - 2 2 - 3 2 - 4

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(a) Big-endian (b) Little-endian
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assignment Byte and word addressing. assignment
• In case of 16 bit data, aligned words begin at byte addresses of 0,2,4,
………………………….
• In case of 32 bit data, aligned words begin at byte address of 0,4,8,
………………………….
• In case of 64 bit data, aligned words begin at byte addresses of 0,8,16,
………………………..
• In some cases words can start at an arbitrary byte address also then, we say
that word locations are unaligned

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 Addressing Modes

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 Addressing Modes
Different ways in which the location of the operand is specified in an instruction is referred as addressing
modes. The purpose of using addressing mode is:
To give the programming versatility to the user.
To reduce the number of bits in addressing field of instruction.
Types of Addressing Modes
• Immediate Addressing
• Direct Addressing
• Indirect Addressing
• Register Addressing
• Register Indirect Addressing
• Relative Addressing
• Indexed Addressing
• Auto Increment
• Auto Decrement
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Immediate Addressing
• Operand is given explicitly in the instruction
• e.g. ADD 5
• Add 5 to contents of accumulator
• 5 is operand
• No memory reference to fetch data
• Fast
• Limited range
• MOV AL,25H ; Immediate addressing AL=25
• MOV AX,2345H ; AX=2345 AX=> AH=23 AL=45

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 Direct Addressing
• Address field contains address of operand
• Effective address (EA) = address field (A)
• e.g. ADD A
• Add contents of cell A to accumulator
• Look in memory at address A for operand
• Single memory reference to access data
• No additional calculations to work out effective address
• Limited address space
• MOV AL,DATA1 ; Direct Addressing AL=23
• MOV AX,DATA2 ; AX=1234
• MOV DATA3,AL ; DATA3=23
• MOV DATA4,AX ; DATA4=1234
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Indirect Addressing

• Memory cell pointed to by address field contains the address of (pointer to) the
operand
Two references to memory are required to fetch the operand.
• Effective Address = [A]
• Look in A, find address (A) and look there for operand
• e.g. ADD (A)
• Add contents of cell pointed to by contents of A to the accumulator

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 Register Direct Addressing
In this addressing mode,
• The operand is contained in a register set.
• The address field of the instruction refers to a CPU register that contains the
operand.
• No memory access
• Very fast execution
• Very limited address space
• Limited number of registers
• Very small address field needed
• Shorter instructions
• Faster instruction fetch

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 Register Direct Addressing
Eg:
ADD R will increment the value stored in the accumulator by the content of register R.
AC ← AC + [R]
• This addressing mode is similar to direct addressing mode.
• The only difference is address field of the instruction refers to a CPU register instead
of main memory.

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 Register Indirect Addressing
• The address field of the instruction refers to a CPU register that contains the effective
address of the operand.
• Only one reference to memory is required to fetch the operand
Eg:
ADD R will increment the value stored in the accumulator by the content of
memory location specified in register R.
AC ← AC + [[R]]

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 Indexed Addressing

In this addressing mode,

• Effective address of the operand is obtained by adding the content of index register
with the address part of the instruction.

Effective Address = Content of Index Register + Address part of the

instruction

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Relative Addressing

A version of displacement addressing

In this addressing mode,
• Effective address of the operand is obtained by adding the content of program
counter with the address part of the instruction.
Effective Address = Content of Program Counter + Address part of the
instruction

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 Auto Increment Mode

A special case of Register Indirect Addressing Mode where

Effective Address of the Operand = Content of Register

In this addressing mode,

• After accessing the operand, the content of the register is automatically incremented
by step size ‘d’.
• Step size ‘d’ depends on the size of operand accessed.
• Only one reference to memory is required to fetch the operand.

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 Auto Decrement Mode

• A special case of Register Indirect Addressing Mode where

Effective Address of the Operand = Content of Register – Step Size

In this addressing mode

• First, the content of the register is decremented by step size ‘d’.
• Step size ‘d’ depends on the size of operand accessed.
• After decrementing, the operand is read.
• Only one reference to memory is required to fetch the operand.

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 Case Study: 8086
Introduction to Microprocessor

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Microprocessors
Microprocessor : is a CPU on a single chip.
Microcontroller: If a microprocessor, its associated support circuitry, memory and
peripheral I/O components are implemented on a single chip, it is a microcontroller.
• We use AVR microcontroller as the example in our course study

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 What is Microprocessor and Microcontroller?

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Internal structure and basic operation of
microprocessor

Address bus
ALU Register Section

Data bus

Control and timing section

Control bus

Block diagram of a Microprocessor

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• Microprocessor performs three main tasks:
• data transfer between itself and the memory or I/O systems
• simple arithmetic and logic operations
• program flow via simple decisions

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Microprocessor types

• Microprocessors can be characterized based on

• the word size
• 8 bit, 16 bit, 32 bit, etc. processors
• Instruction set structure
• RISC (Reduced Instruction Set Computer), CISC (Complex Instruction Set
Computer)
• Functions
• General purpose, special purpose such image processing, floating point
calculations
• And more …

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 Evolution of Microprocessors
• The first microprocessor was introduced in 1971 by Intel Corp.
• It was named Intel 4004 as it was a 4 bit processor.
Categories according to the generations or size
First Generation (4 - bit Microprocessors)
• could perform simple arithmetic such as addition, subtraction, and logical operations
like Boolean OR and Boolean AND.
• had a control unit capable of performing control functions like
• fetching an instruction from storage memory,
• decoding it, and then
• generating control pulses to execute it.

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Second Generation (8 - bit Microprocessor)
• The second generation microprocessors were introduced in 1973 again by Intel.
• the first 8 - bit microprocessor which could perform arithmetic and logic operations on 8-
bit words.
Third Generation (16 - bit Microprocessor)
• introduced in 1978
• represented by Intel's 8086, Zilog Z800 and 80286,
• 16 - bit processors with a performance like minicomputers.

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Fourth Generation (32 - bit Microprocessors)
• Several different companies introduced the 32-bit microprocessors
• the most popular one is the Intel 80386

Fifth Generation (64 - bit Microprocessors)

• Introduced in 1995
• After 80856, Intel came out with a new processor namely Pentium processor followed
by Pentium Pro CPU
• allows multiple CPUs in a single system to achieve multiprocessing.
• Other improved 64-bit processors are Celeron, Dual, Quad, Octa Core processors.

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Typical microprocessors
• Most commonly used
• 68K
• Motorola
• x86
• Intel
• IA-64
• Intel
• MIPS
• Microprocessor without interlocked pipeline stages
• ARM
• Advanced RISC Machine
• PowerPC
• Apple-IBM-Motorola alliance
• Atmel AVR
• A brief summary will be given later
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8086 Microprocessor
• designed by Intel in 1976
• 16-bit Microprocessor having
• 20 address lines
• 16 data lines
• provides up to 1MB storage
• consists of powerful instruction set, which provides operations like multiplication and
division easily.
supports two modes of operation
Maximum mode : suitable for system having multiple processors
Minimum mode : suitable for system having a single processor.

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 Features of 8086
• Has an instruction queue, which is capable of storing six instruction bytes
• First 16-bit processor having
• 16-bit ALU
• 16-bit registers
• internal data bus
• 16-bit external data bus
uses two stages of pipelining
1. Fetch Stage and
2. Execute Stage
which improves performance.
Fetch stage : can pre-fetch up to 6 bytes of instructions and stores them in the queue.
Execute stage : executes these instructions.
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Architecture of 8086

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Segments in 8086

memory is divided into various sections called segments

Code segment : where you store the program.

Data segment : where the data is stored.
Extra segment : mostly used for string operations.
Stack segment : used to push/pop

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General purpose registers
used to store temporary data within the microprocessor
AX – Accumulator
16 bit register
divided into two 8-bit registers AH and AL
to perform 8-bit instructions also
generally used for arithmetical and logical instructions
BX – Base register
16 bit register
divided into two 8-bit registers BH and BL
to perform 8-bit instructions also
Used to store the value of the offset.
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 CX – Counter register
16 bit register
divided into two 8-bit registers CH and CL
to perform 8-bit instructions also
Used in looping and rotation
DX – Data register
16 bit register
divided into two 8-bit registers DH and DL to
perform 8-bit instructions also
Used in multiplication an input/output port addressing

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 Pointers and Index Registers
SP – Stack pointer
16 bit register
points to the topmost item of the stack
If the stack is empty the stack pointer will be (FFFE)H
It’s offset address relative to stack segment
BP –Base pointer
16 bit register
used in accessing parameters passed by the stack
It’s offset address relative to stack segment

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SI – Source index register
16 bit register
used in the pointer addressing of data and
as a source in some string related operations
It’s offset is relative to data segment
DI – Destination index register
16 bit register
used in the pointer addressing of data and
as a destination in string related operations
It’s offset is relative to extra segment.

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IP - Instruction Pointer
16 bit register
stores the address of the next instruction to be executed
also acts as an offset for CS register.

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 Segment Registers
CS - Code Segment Register:
user cannot modify the content of these registers
Only the microprocessor's compiler can do this
DS - Data Segment Register:
The user can modify the content of the data segment.
SS - Stack Segment Registers:
used to store the information about the memory segment.
operations of the SS are mainly Push and Pop.
ES - Extra Segment Register:
By default, the control of the compiler remains in the DS where the user can add and modify the
instructions
If there is less space in that segment, then ES is used
Also used for copying purpose.

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 Flag or Status Register

• 16-bit register
• contains 9 flags
• remaining 7 bits are idle in this register
• These flags tell about the status of the processor after any arithmetic or logical
operation
• IF the flag value is 1, the flag is set, and if it is 0, it is said to be reset.

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Microcomputer

• A digital computer with one Block Diagram

microprocessor which acts as a CPU
• A complete computer on a small
scale, designed for use by one
person at a time
• called a personal computer (PC)
• a device based on a single-chip
microprocessor
• includes laptops and desktops

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 Introduction to 8086
Assembly Language
Assembly Language Programming

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 Program Statements

• Program consist of statement, one per line.

• Each statement is either an instruction, which the assembler translate into machine
code, or assembler directive, which instructs the assembler to perform some specific
task, such as allocating memory space for a variable or creating a procedure.
• Both instructions and directives have up to four fields:
• At least one blank or tab character must separate the fields

name operation operand(s) comment

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 Program Statements

• An example of an instruction is
START: MOV CX,5 ; initialize counter

name operation operand(s) comment

 The name field consists of the label START:
 The operation is MOV, the operands are CX and 5
 And the comment is ; initialize counter

of An example an assembler directive is

MAIN PROC

name operation operand(s) comment

 MAIN is the name, and the operation field contains PROC
 This particular directive creates a procedure called MAIN
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 Program Statements

name operation operand(s) comment

• A Name field identifies a label, variable, or symbol.
It may contain any of the following character : A,B…..Z ; a,b….9 ; ?
;
_ (underline) ; @ ; $ ; ,1e . (p….z ; 0riod)

 Only the first 31 characters are recognized

 There is no distinction between uppercase and lower case letters.
 The first character may not be a digit
 If it is used, the period ( . ) may be used only as the first character.
 A programmer-chosen name may not be the same as an assembler reserved word.
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 Program Statements

name operation operand(s) comment

• An operand field specifies the data that are to be acted on by the operation.
• An instruction may have zero, one, or two operands. For example:
 NOP No operands; does nothing

 INC AX one operand; adds 1 to the contents of AX

 ADD WORD1,2 two operands; adds 2 to the contents of memory word WORD1

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 Program Statements

name operation operand(s) comment

• Operation field is a predefined or reserved word

 mnemonic - symbolic operation code.
• The assembler translates a symbolic opcode into a machine language opcode.
• Opcode symbols often discribe the operation’s function; for example, MOV, ADD,
SUB
 assemler directive - pseudo-operation code.
• In an assembler directive, the operation field contains a pseudo-operation code
(pseudo-op)
• Pseudo-op are not translated into machine code; for example the PROC pseudo-op is
used to create a procedure

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 Program Statements

name operation operand(s) comment

• The comment field is used by the programmer to say something about what the
statement does.

• A semicolon marks the beginning of this field, and the assembler ignores anything
typed after semicolon.

• Comments are optional, but because assembly language is low level, it is almost
impossible to understand an assembly language program without comments.

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Program Data and Storage

• Pseudo-ops to define data or • These directives require one or

reserve storage more operands
• DB - byte(s) • define memory contents
• DW - word(s) • specify amount of storage to
• DD - doubleword(s) reserve for run-time data
• DQ - quadword(s)
• DT - tenbyte(s)

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Defining Data

• Numeric data values • A list of values may be used -

• 100 - decimal the following creates 4
• 100B - binary consecutive words
• 100H - hexadecimal DW 40CH,10B,-13,0
• '100' - ASCII • A ? represents an uninitialized
• "100" - ASCII storage location
• Use the appropriate DEFINE DB 255,?,-128,'X'
directive (byte, word, etc.)

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 Naming Storage Locations

• Names can be associated with • ANum refers to a byte storage

storage locations location, initialized to FCh
ANum DB -4 • The next word has no associated
DW 17 name
ONE • ONE and UNO refer to the same
UNO DW 1 word
X DD ? • X is an unitialized doubleword
• These names are called variables

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• Multiple definitions can b abbreviated
Example:e
message DB ’B’
DB ’y’
DB ’e’
DB 0DH
DB 0AH
can be written as
message DB ’B’,’y’,’e’,0DH,0AH

• More compactly as
message DB ’Bye’,0DH,0AH

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Arrays

• Any consecutive storage locations of the same size can be called an array
X DW 40CH,10B,-13,0
Y DB 'This is an array'
Z DD -109236, FFFFFFFFH, -1, 100B
• Components of X are at X, X+2, X+4, X+6
• Components of Y are at Y, Y+1, …, Y+15
• Components of Z are at Z, Z+4, Z+8, Z+12

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 DUP

• Allows a sequence of storage locations to be defined or reserved

• Only used as an operand of a define directive
DB 40 DUP (?) ; 40 words, uninitialized
DW 10h DUP (0) ; 16 words, initialized as 0

Table1 DW 10 DUP (?) ; 10 words, uninitialized

message DB 3 DUP (’Baby’) ; 12 bytes, initialized

; as BabyBabyBaby
Name1 DB 30 DUP (’?’) ; 30 bytes, each
; initialized to ?
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DUP

The DUP directive may also be nested

Example
stars DB 4 DUP(3 DUP (’*’),2 DUP (’?’),5 DUP (’!’))
Reserves 40-bytes space and initializes it as
***??!!!!!***??!!!!!***??!!!!!***??!!!!!

matrix DW 10 DUP (5 DUP (0))

defines a 10X5 matrix and initializes its elements to zero.

This declaration can also be done by

matrix DW 50 DUP (0)

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Word Storage

• Word, doubleword, and quadword data are stored in reverse byte order (in
memory)
Directive Bytes in Storage
DW 256 00 01
DD 1234567H 67 45 23 01
DQ 10 0A 00 00 00 00 00 00 00
X DW 35DAh DA 35

Low byte of X is at X, high byte of X is at X+1

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Word Storage

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Named Constants

• Symbolic names associated with storage locations represent addresses

• Named constants are symbols created to represent specific values determined by
an expression
• Named constants can be numeric or string
• Some named constants can be redefined
• No storage is allocated for these values

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Equal Sign Directive

• name = expression
• expression must be numeric
• these symbols may be redefined at any time
maxint = 7FFFh
count = 1
DW count
count = count * 2
DW count

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EQU Directive

• name EQU expression

• expression can be string or numeric
• Use < and > to specify a string EQU
• these symbols cannot be redefined later in the program
sample EQU 7Fh
aString EQU <1.234>
message EQU <This is a message>

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Data Transfer Instructions

• MOV target, source • reg can be any non-segment register

• reg, reg except IP cannot be the target register
• mem, reg • MOV's between a segment register
• reg, mem and memory or a 16-bit register are
• mem, immed possible
• reg, immed
• Sizes of both operands must be the
same

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Sample MOV Instructions

• When a variable is created with a define

b db 4Fh directive, it is assigned a default size
w dw 2048 attribute (byte, word, etc)
• You can assign a size attribute using
mov bl,dh LABEL
LoByte LABEL BYTE
mov ax,w
aWord DW 97F2h
mov ch,b
mov al,255
mov w,-100
mov b,0

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Program Segment Structure

• Data Segments • Stack Segment

• Storage for variables • used to set aside storage for the
• Variable addresses are stack
computed as offsets from • Stack addresses are computed as
start of this segment offsets into this segment
• Code Segment • Segment directives
• contains executable .data
instructions .code
.stack size

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8086 instruction set Instruction types
IN Input byte or word from port Data transfer instructions
LAHF Load AH from flags
Additional 80386 instructions
LDS Load pointer using data segment
LFS Load pointer using FS
LEA Load effective address
LGS Load pointer using GS
LES Load pointer using extra segment
LSS Load pointer using SS
MOV Move to/from register/memory
MOVSX Move with sign extended
OUT Output byte or word to port
MOVZX Move with zero extended
POP Pop word off stack
POPAD Pop all double (32 bit) registers
POPF Pop flags off stack
POPD Pop double register
PUSH Push word onto stack
POPFD Pop double flag register
PUSHF Push flags onto stack
PUSHAD Push all double registers
SAHF Store AH into flags
PUSHD Push double register
XCHG Exchange byte or word
PUSHFD Push double flag register
XLAT Translate byte
Additional 80286 instructions Additional 80486 instruction
INS Input string from port BSWAP Byte swap
OUTS Output string to port
POPA Pop all registers Additional Pentium instruction
PUSHA Push all registers MOV Move to/from control register

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Arithmetic instructions
8086 instruction set Additional 80386 instructions
AAA ASCII adjust for addition CDQ Convert double-word to
AAD ASCII adjust for division quad-word
AAM ASCII adjust for multiply CWDE Convert word to double-word
AAS ASCII adjust for subtraction
ADC Add byte or word plus carry
ADD Add byte or word
CBW Convert byte or word Additional 80486 instructions
CMP Compare byte or word CMPXCHG Compare and exchange
CWD Convert word to double-word XADD Exchange and add
DAA Decimal adjust for addition
DAS Decimal adjust for subtraction
DEC Decrement byte or word by one
DIV Divide byte or word Additional Pentium instruction
IDIV Integer divide byte or word CMPXCHG8B Compare and exchange 8
IMUL Integer multiply byte or word bytes
INC Increment byte or word by one
MUL Multiply byte or word (unsigned)
NEG Negate byte or word
SBB Subtract byte or word and carry (borrow)
SUB Subtract byte or word

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Bit manipulation instructions

8086 instruction set

AND Logical AND of byte or word
NOT Logical NOT of byte or word Additional 80386 instructions
OR Logical OR of byte or word BSF Bit scan forward
RCL Rotate left trough carry byte or word BSR Bit scan reverse
RCR Rotate right trough carry byte or word BT Bit test
ROL Rotate left byte or word BTC Bit test and complement
ROR Rotate right byte or word BTR Bit test and reset
SAL Arithmetic shift left byte or word BTS Bit test and set
SAR Arithmetic shift right byte or word SETcc Set byte on condition
SHL Logical shift left byte or word SHLD Shift left double precision
SHR Logical shift right byte or word SHRD Shift right double precision
TEST Test byte or word
XOR Logical exclusive-OR of byte or word

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String instructions

8086 instruction set

CMPS Compare byte or word string
LODS Load byte or word string
MOVS Move byte or word string
MOVSB(MOVSW) Move byte string (word string)
REP Repeat
REPE (REPZ) Repeat while equal (zero)
REPNE (REPNZ) Repeat while not equal (not zero)
SCAS Scan byte or word string
STOS Store byte or word string

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Program Skeleton

.model small • Select a memory model

.stack 100H • Define the stack size
.data • Declare variables
;declarations
.code
• Write code
main proc • organize into procedures
;code
• Mark the end of the source file
main endp • optionally, define the entry point
;other procs
end main

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EXAMPLE : Adding two 8 bit numbers
DATA SEGMENT ; Data Segment
N1DB 12H
N2 DB 21H
RES DB ?
DATA ENDS
CODE SEGMENT ; Code segment
ASSUME CS: CODE, DS: DATA
START: MOV AX, DATA
MOV DS, AX
MOV AL, N1
MOV BL, N2
ADD AL, BL
MOV RES, AL
INT 21H
CODE ENDS
END START

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