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Class 9 24-01

The document discusses logic operations and shift/rotate instructions in microprocessors, detailing how logical operations like AND, OR, and XOR are performed on binary numbers. It explains the use of shift instructions (SHL, SHR, SAL, SAR) for manipulating data bit-wise, as well as the differences between logical and arithmetic shifts. Additionally, it covers rotate instructions (RCL, RCR, ROL, ROR) and their unique characteristics compared to shifts.

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Ashish Goyal
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24 views43 pages

Class 9 24-01

The document discusses logic operations and shift/rotate instructions in microprocessors, detailing how logical operations like AND, OR, and XOR are performed on binary numbers. It explains the use of shift instructions (SHL, SHR, SAL, SAR) for manipulating data bit-wise, as well as the differences between logical and arithmetic shifts. Additionally, it covers rotate instructions (RCL, RCR, ROL, ROR) and their unique characteristics compared to shifts.

Uploaded by

Ashish Goyal
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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MPI- 9 CLASS 24 Jan 2024

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LOGIC
SHIFT
ROTATE INSTRUCTIONS
Logic Gates/Logic Instructions

AND
OR
XOR
TEST & BIT
NOT &NEG
 No Need to use hardware logic gates by
using IC
 Microprocessor instructions will do the
same job
 AND OR XOR etc
LOGIC AND INSTRUCTIONS
Logic And Operation Will Be Done On Two 8 Bit Or 16 Bit Number Bit Wise
And Operation Will Be Done
For each bit in 8 bit or 16bit number AND operational will be done
EXAMPLE: AND AL,BL AND operation will be performed on each bit of AL
data with corresponding bit of BL data
AL =02H BL =04H AL AND BL AL =00H

AL 0 0 0 0 0 0 1 0

BL 0 0 0 0 0 1 0 0

AL(result 0 0 0 0 0 0 0 0
)
EXAMPLE
 ALL (7)ADDRESSING MODES ACCEPTED

 MOV AX,3135H
 AND BX,0F0FH
 AND AX,BX once again results is in destination
i.e., AX register
AND CX,DX CX=CX AND DX
AND CL,33H CL = CL AND 33 H
AND DI,4FFFH
AND AX,[DI]
AND ARRAY[SI],AL
AND gate is a masking gate
 The task of clearing a bit in a binary number is called
masking.
 AND is masking gate : set to zero select a part of
number
 EXAMPLE:
 XXXX XXXX UNKNOWN NUMBER OR NUMBER
TO BE MASKED
 0000 1 1 1 1 MASKING NUMBER & do AND
operation
 0000 X X X X RESULT
OR GATE
 OR AH,BL AH = AH OR BL
 OR SI,DX
 OR DX,[BX[
 OR BP,10
 OR GATE: SET TO ONE Non Masking Gate
 OR sets & AND Clears
 XXXX XXXX UNKNOWN NUMBER
 0000 1111 MASKING NUMBER
 XXXX 1111 RESULT
X-OR GATE
 XOR CH,DL CH = CH XOR DL
 XOR SI ,BX SI = SI XOR BX
 XOR DX,[SI]
 INVERTING A GIVEN NUMBER
 XXXX XXXX UNKNOWN NUMBER OR GIVEN NUMBER
 0000 1111 MASKING NUMBER
XXXX XXXX RESULT
TEST & BIT TEST
 TEST DL,DH DL ANDed with DH no change in DL data
 TEST CX,BX CX ANDed with BX : no change
 NOTE: NO CHANGE IN ANY DATA ;JUST DO AND
operation COMPARISION :FLAGS EFFECTED
 BT: TESTS A BIT IN THE DESTINATION OPERAND
 BTC: TEST AND COMPLEMENT
 BTR: TEST AND RESET
 BTS: TEST AND SET
EXAMPLES
BTS CX,9 SET 9TH BIT OF CX
BTR CX,0 CLEAR BIT O
BTC CX,12 COMPLEMENT BIT 12
BT Just test a bit BT CX,9
NOT & NEG

 NOT CH CH IS ONE’S COMPLEMENT


 NEG CH CH IS TWO’S
COMPLEMENT
SHIFT INSTRUCTIONS

 Shifts data bit wise left side or right


side
Logical and Arithmetic shifts
Logical --unsigned numbers
Arithmetic --signed numbers
For left shift both L & A shifts are equal
For right shift both L & A shifts are not equal
LOGIC Zero copying
Arithmetic sign bit copying
Only 4 instructions

SHL
SAL
SHR
SAR
LOGICAL LEFT SHIFT

SHL AX,1
AX IS LOGICALLY SHIFTED LEFT 1 POSITION
SHL AX,50
SHL [1234H],4
CX register may be used to store number of shifts
Count register
Few More Examples

 SHL AX,1 AX IS SHIFTED LOGICALLY LEFT


ONLY ONCE
 SHL AX,5 AX IS SHIFTED LOGICALLY LEFT
5 TIMES
 SHL BX,2
 SHLCX,5
 SHL,DATA,1
SHR INSTRUCTION

 SHIFT RIGHT LOGICALLY


 SHR BX,07
 BX IS LOGICALLY SHIFTED RIGHT
BY 07 POSITIONS
 SHR DX,C
SHR FIGURE
SAL
SHIFT LEFT ARTHIMATECALLY

 SAL DATA1,CL
 Content of data segment memory location are arithmetically
shifted left by the number of times given in CL register
 SAL [2234H],12
 MOV CL,12
 SAL[2234H],CL
 ARTHITHMETIC SHIFT LEFT AND LOGIC SHIFT LEFT ARE EQUAL
 SHL=SAL
SAR-Shift Arithmetically rights

 Shift arithmetically right


 SAR SI,02
 SI is shifted arithmetically right by 2 places
 SHR and SAR are not equal
 Shift right logically and arithmetically are not equal
 Arithmetic right shift copies the sign-bit through the number where
as logical right shift copies a o through number
 It means either 0 or 1 can enter in Arithmetic shift
 The SAR instruction stands for 'Shift
Arithmetic Right'. This instruction shifts the
mentioned bits in the register to the right
side one by one, but instead of inserting
the zeroes from the left end, the MSB is
restored. The rightmost bit that is being
shifted is stored in the Carry Flag (CF).
SAR Example
Multiplication = shift and add
 SHL AX,1 AX is doubled
 MOV BX, AX this doubled number is stored in BX
 SHL AX,2 AX is multiplied by 8
 Add AX, BX
 This is equal to AX number multiplied by 10 (1010)

 Shift left once --number gets doubled


 Shift left --2 times number gets eight folds i.e. x * 4
 Add both then multiplied by 10 times
Example

 0000 0100 = 4
 Left shift once
 0000 1000 = 8 store in BX
 Shift this number left 2 times
 0010 0000
 0010 0000 = 32
 Equal to ADD AX and BX
 Why this ? more speed than multiplication
ROTATE
 Some What similar to shift
 But there are two differences:
 1. carry is also participating as 9th number 1-9
 No additional outside zeros
 2.Cary is there but not as 9th number- it is carry
 A)LSB or MSB comes back in opposite position
 LSB comes in position of MSB right
 MSB comes in position of LSB left
 B) Last shifted bit copied into carry position
rotate

 RCL & RCR with carry and without carry


 Carry also participating in the 9th position
This is RCL
This is RCR
ROL & ROR
 These are different from RCL &RCR
This is ROL
Copy B7 bit at two positions
This is ROR
Copy Bo at two positions

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