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Memory MGMT 1

The document outlines the syllabus for the Operating System & Linux course for BCA Semester V, focusing on memory management techniques. It covers objectives, background information, address binding, logical vs. physical addresses, and memory management units, among other topics. Additionally, it discusses static and dynamic linking, shared libraries, and the concept of swapping processes in memory management.

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10 views17 pages

Memory MGMT 1

The document outlines the syllabus for the Operating System & Linux course for BCA Semester V, focusing on memory management techniques. It covers objectives, background information, address binding, logical vs. physical addresses, and memory management units, among other topics. Additionally, it discusses static and dynamic linking, shared libraries, and the concept of swapping processes in memory management.

Uploaded by

bca2m2
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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INSTITUTE OF INFORMATION TECHNOLOGY & MANAGEMENT

Accredited ‘A’ Grade by NAAC &Recognised U/s 2(f) of UGC act


Rated Category `A+’ by SFRC & `A’ by JAC Govt. of NCT of Delhi
Approved by AICTE & Affiliated to GGS Indraprastha University, New Delhi

Operating System & Linux

BCA
Semester: V
Paper code:-BCA 301

© Institute of Information Technology and Management, D-29, Institutional Area, Janakp


uri, New Delhi-110058
List of Topics

 Objectives of Memory Management


 Background
 Memory protection-base and limit registers
 Address binding
 Logical and Physical address space
 Memory management Unit (MMU)
 Static Linking, Dynamic Linking and shared Libraries
 Swapping

© Institute of Information Technology and


© Institute of Information
Management, D-29, Institutional
Technology
Area,and
Janakpuri,
Manage
ment, D-29, Institutional
New Delhi-110058 Area, Janakpuri, New Delh
i-110058
Objectives

 To provide a detailed description of various ways of organizing memory


hardware.
 To discuss various memory-management techniques, including paging
and segmentation.

© Institute of Information Technology and


© Institute of Information
Management, D-29, Institutional
Technology
Area,and
Janakpuri,
Manage
ment, D-29, Institutional
New Delhi-110058 Area, Janakpuri, New Delh
i-110058
Background

Program must be brought (from disk) into memory and placed


within a process for it to be run.
Main memory and registers are only storage which CPU can access
directly.
Memory unit only sees a stream of addresses + read requests, or
address + data and write requests.
Register access in one CPU clock (or less).
Main memory can take many cycles, causing a stall.
Cache sits between main memory and CPU registers.
Protection of memory required to ensure correct operation.
© Institute of Information Technology and Management, D-29,
Institutional Area, Janakpuri, New Delhi-110058
Base and Limit Registers

• A pair of base and limit registers define the logical address space.
• CPU must check every memory access generated in user mode to be sure that it is
between base and limit for that user.

© Institute of Information Technology and Management, D-29,


Institutional Area, Janakpuri, New Delhi-110058
Hardware Address Protection

© Institute of Information Technology and Management, D-29,


Institutional Area, Janakpuri, New Delhi-110058
Address Binding

• Programs on disk, ready to be brought into memory to


execute form an
Input queue.
• The Processes on the disk that are waiting to be
brought into memory for execution form the Input
Queue.
• Most systems allow a user process to reside in any
part of the physical
memory.
• Further, addresses represented in different ways at
different stages of a
program's life.
•©Addresses in Source program are usually symbolic.
Institute of Information Technology and Management, D-29,
•Institutional
Compiled code
Area, Janakpuri, New addresses bind to relocatable
Delhi-110058
Binding of Instructions and Data to Memory

• Address binding of instructions and data to memory


addresses can
happen at three different stages:-

• Compile time: If memory location known a priori,


absolute code can be
generated, must recompile code if starting location
changes.
• Load time: Must generate relocatable code if
memory location is not known at compile time.
• Execution time: Binding delayed until run time if
the process can be moved during its execution from
one
© Institute memory
of Information segment
Technology toD-29,
and Management, another
Institutional Area, Janakpuri, New Delhi-110058
Multistep Processing of a User Program

© Institute of Information Technology and Management, D-29,


Institutional Area, Janakpuri, New Delhi-110058
Logical vs. Physical Address

• The user programs deals with the logical address and never sees the
physical addresses.
• Logical address — generated by the CPU also referred as virtual address.
• Physical address- address seen by the memory unit
• Logical and physical addresses are same in compile-time and load-time
address-binding schemes.
• logical (virtual) and physical addresses differ in execution-time address-
binding scheme.
• Logical address space is the set of all logical addresses generated by a
program.
• Physical address space is the set of all physical addresses generated by a
program.
© Institute of Information Technology and Management, D-29,
Institutional Area, Janakpuri, New Delhi-110058
Memory-Management Unit (MMU)

• MMU is a hardware device that maps logical address to physical


address at run time.
• To start, consider simple scheme where the value in the relocation
register is added to every address generated by a user process at the
time it is sent to memory.
• Base register now called relocation register
• The user program deals with logical addresses; it never sees the real
physical addresses.
• Execution-time binding occurs when reference is made to location in memory.
• Logical address bound to physical addresses.

© Institute of Information Technology and Management, D-29,


Institutional Area, Janakpuri, New Delhi-110058
Dynamic relocation using a relocation register

© Institute of Information Technology and Management, D-29,


Institutional Area, Janakpuri, New Delhi-110058
Static Linking vs. Dynamic Linking

• Static Linking:-
• When we click the .exe (executable) file of the program and it starts
running, all the necessary contents of the binary file have been loaded
into the process's virtual address space.
• However, most programs also need to run functions from the system
libraries, and these library functions also need to be loaded.
• Disadvantage:-
• Every program generated must contain copies of exactly the same
common system library functions

© Institute of Information Technology and Management, D-29,


Institutional Area, Janakpuri, New Delhi-110058
Dynamic Linking

• Dynamic Linking:-
• Every dynamically linked program contains a small, statically linked
function that is called when the program starts.
• This static function only maps the link library into memory and runs
the code that the function contains.
• Advantage:-
• Memory requirements of the program are reduced.
• A DLL is loaded into memory only once, whereas more than one
application may use a single DLL at the moment, thus saving memory
space.
© Institute of Information Technology and Management, D-29,
Institutional Area, Janakpuri, New Delhi-110058
Shared Libraries

• A shared library is a file containing object code that several files may use
simultaneously while executing.
• When a program is link edited with a shared library, the library code that defines
the program's external references is not copied into the program's object file.
Instead, a special section called .1ib that identifies the library code is created in the
object file.
• A shared library offers several benefits:-
• Save disk storage space. Shared library code is not copied into all the files that use
that code. It makes files smaller and use less disk space.
• Save memory. By sharing library code at run time the dynamic memory needs of
the processes are reduced.
• It makes executable files using library code easier to maintain.
© Institute of Information Technology and Management, D-29,
Institutional Area, Janakpuri, New Delhi-110058
Swapping

• A process can be swapped temporarily out of memory to a backing


store, and then brought back into memory for continued execution.
• Backing store — fast disk large enough to accommodate copies of all
memory images for all users and provide direct access to these
memory images.
• Roll out, roll in — swapping variant used for priority-based scheduling
algorithms, lower-priority process is swapped out so higher-priority
process can be loaded and executed.
• System maintains a ready queue of ready-to-run processes which have
memory images on disk.
© Institute of Information Technology and Management, D-29,
Institutional Area, Janakpuri, New Delhi-110058
Schematic View of Swapping

© Institute of Information Technology and Management, D-29,


Institutional Area, Janakpuri, New Delhi-110058

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