Scribd
Upload
11 views19 pages

Welcome

The document discusses the design of communication architectures for system-on-chip (SoC) systems, highlighting the importance of on-chip communication in complex designs. It covers system-level analysis techniques, design space exploration, and the use of communication architecture templates and tuners to optimize performance and energy efficiency. The document emphasizes the need for effective communication protocols and network topologies to enhance system performance and reduce power consumption.

Uploaded by

Lakshmisree Sajit
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
11 views19 pages

Welcome

The document discusses the design of communication architectures for system-on-chip (SoC) systems, highlighting the importance of on-chip communication in complex designs. It covers system-level analysis techniques, design space exploration, and the use of communication architecture templates and tuners to optimize performance and energy efficiency. The document emphasizes the need for effective communication protocols and network topologies to enhance system performance and reduce power consumption.

Uploaded by

Lakshmisree Sajit
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
You are on page 1/ 19

.

WELCOME
DESIGN OF COMMUNICATION
ARCHITECTURES FOR SOCS

PRESENTED BY
SAPNA K
ROLL NO:14
M.TECH VLSI DESIGN
NCERC
CONTENTS
• System-Level Analysis for Designing
Communication Architectures
– Techniques categories
– Specify communication architecture
– Performance-analysis methodology
• Design Space Exploration for Customizing
Communication Architectures
• Communication Architecture Templates
• Communication Architecture Tuners
• Communication Architectures for
Energy/Battery-Efficient Systems
INTRODUCTION
• On-chip communication is increasingly being
regarded as one of the major hurdles for complex
system-on-chip (SoC) designs.

• On-Chip Communication Architectures

• The first basis for classifying communication


architectures is the network topology

• The second basis for classification is the


communication protocols employed by the
communication architecture
SYSTEM-LEVEL ANALYSIS FOR
DESIGNING COMMUNICATION
ARCHITECTURES
• Estimating the impact of the
communication architecture on overall
system performance and power
consumption

• Techniques, which aim at providing


automatic support to drive the process
of communication architecture
selection, design, or optimization
TECHNIQUES
CATEGORIES

• System simulation-based techniques

• Static estimation-based techniques

• Trace-based techniques
SYSTEM SIMULATION-BASED TECHNIQUES

• Communication architecture are incorporated by


developing suitable simulation models of the
communication architecture topology and protocols .

• Techniques that rely on simulation of the complete


system are typically not feasible for exploring large
design spaces, such as those offered by existing and
emerging communication architectures.

• Simulation speed up is typically achieved by using


abstract models of system components and the
communication architecture.

• Models typically trade off accuracy for efficiency.


STATIC ESTIMATION-
BASED TECHNIQUES
• This class of techniques makes use of “static” models
of the communication time between components of
system.

• These techniques often assume systems in which the


computations and communications can be statically
scheduled.

• For many systems, using such techniques could result


in inaccurate performance and power estimates, since
they usually ignore or make simplifying assumptions
regarding the occurrence of dynamic effects (e.g.,
waiting due to bus contention).
TRACE-BASED
TECHNIQUES
• Fast and accurate system performance analysis technique.

• Our technique is based on a hybrid trace-based


performance analysis methodology where an initial
cosimulation of the system.

• Initial cosimulation, an abstract set of traces are


extracted, containing necessary and sufficient information
about the computations and communications of the
system components.
Contd…
• The basic idea of collecting an execution
trace and using it for performance
estimation has been used in the field of
high-performance processor design,
e.g., for cache simulation
SPECIFY COMMUNICATION
ARCHITECTURE.
• 1)selecting a topology consisting of
dedicated as well as shared communication
channels interconnected by bridges

• 2) mapping the abstract communications to


paths in the communication architecture

• 3) customizing the protocol used for each


channel.
PERFORMANCE-ANALYSIS
METHODOLOGY
PERFORMANCE-ANALYSIS
METHODOLOGY
• The first phase of this methodology constitutes a
preprocessing step in which system simulation of
the HW/SWcomponents is carried out, without
considering the communication architecture

• The second phase consists of three steps:


1) Abstracting information from the simulation trace
and constructing the CAG;
2) Specifying the communication architecture;
3) Analyzing the system performance under the
given communication architecture
DESIGN SPACE EXPLORATION FOR CUSTOMIZING
COMMUNICATION ARCHITECTURES

• These include
• (1) selection of an appropriate
network topology
• (2) selection of appropriate
communication protocols, along with
careful configuration of protocol
parameters
• (3) optimization of the mapping of the
system communications to physical
COMMUNICATION
ARCHITECTURE TEMPLATES
• Network topology selection is the critical step.

• A few Communication Architecture templates


have started to become available from
interconnect IP providers,

• Eg: hierarchical busses ,shared micronetworks,


and mesh-based networks

• Modern templates often feature standard


topologies, while providing designer configurable
parameters for the communication channels (e.g.,
bus widths) and protocols (e.g., priorities, split
COMMUNICATION ARCHITECTURE
TUNERS
• Constitute a layer of circuitry that surrounds a
communication architecture topology
• The CATs monitor the internal state of each
component, analyze the generated
communication transactions, &“predict” the
relative importance of communication
transactions in terms of their impact on system-
level performance metrics.
• The results of the prediction are used to configure
available communication protocol parameters to
best suit each component’s changing
communication needs.
• The CATs approach yields improved utilization of
the on-chip communication bandwidth and
consequently significant improvements in overall
COMMUNICATION ARCHITECTURES FOR
ENERGY/BATTERY-EFFICIENT SYSTEMS

• reduce the total energy consumption of the


system

• the manner in which energy is drawn to specific


characteristics of the battery.

• Reduce the energy consumption of the


communication architecture itself, by reducing
the power consumed by the wires constituting the
communication architecture topology

• The second category consists of techniques that


are concerned with the impact of the
THANK.
YOU……

You might also like

pFad - Phonifier reborn

Pfad - The Proxy pFad of © 2024 Garber Painting. All rights reserved.

Note: This service is not intended for secure transactions such as banking, social media, email, or purchasing. Use at your own risk. We assume no liability whatsoever for broken pages.


Alternative Proxies:

Alternative Proxy

pFad Proxy

pFad v3 Proxy

pFad v4 Proxy