Microprocessor - I/O Interfacing

 In microprocessors and microcontrollers, the Input-Output (I/O) Interfacing is a very important concept which

acts as a communication medium between the processor, memory unit, and other peripheral devices.

 Any application of a microprocessor - based system requires the transfer of data between

external circuitry to the microprocessor and microprocessor to the external circuitry.

 User can give information to the microprocessor using keyboard and user can see the result or

output information from the microprocessor with the help of display device.

 The transfer of data between keyboard and microprocessor, and microprocessor and display

device is called Input Output Interfacing.

 This data transfer is done with the help of I/O ports.

 I/O interfacing is crucial for ensuring effective transfer of data and information between internal and external

components of a computing system.

 What is I/O Interfacing?

I/O interfacing, also referred to as input-output interfacing, is nothing but a way of enabling effective
communication between the processor and the peripheral devices like memory, keyboard, mouse, etc.

 I/O interfacing ensures smooth exchange of data and information among different components
of the system.
 It optimizes the system operation by reducing the differences between data transfer speeds,
formats, and operations between the processor and other devices.
 Functions of I/O Interfaces

I/O interfacing in a microprocessor- or microcontroller-based system performs the following key

functions −

• It provides synchronization between the operational speeds of the processing unit and the

peripheral devices.

• It allows for selecting an appropriate device for processing input or output signals.

• It also generates control and timing signals.

• It makes use of the data bus to enable data buffering.

• It also identifies errors during exchange of data.

• It also allows for converting serial data into parallel and vice-versa, or digital data into analog

signals and vice-versa.

 Input Port

Let’s sat that we want to read data from the input device such as keyboard.

The simplest form of input port is a buffer.

The input device is connected to the MPU through buffer as shown in the Fig.

It is a tri-state buffer, and its output is available only when enable signal is

active.

When MPU wants to read data from the input device (keyboard), the control

signals from the microprocessor activates the buffer by asserting enable input

of the buffer.

Once the buffer is enabled, data from the input device is available on the data

bus. Microprocessor reads this data by initiating read command.

 Output Port

 Output port is used to send data to the output device such as display from

the microprocessor.

 The simplest form of output port is a latch.

 The output device is connected to the microprocessor through latch as

shown in the Fig.

 When MPU wants to send data to the output device, it puts the data on the

data bus and activates the clock signal of the latch, latching the data from

the data bus at the output of latch.

 It is then available at the output of the latch for the output device.
 Interfacing I/O
devices
The IN and OUT instructions in the 8085 microprocessor are used to transfer data between the
microprocessor and I/O devices.

IN instruction
Reads the content of an input port and loads it into the accumulator
The address of the input port is given as an operand

OUT instruction Mnemonics, Opcode(in Byt

Operand HEX) es
Moves data from the accumulator to an I/O port
The address of the I/O port is given as an operand
IN Port-address DB 2

OUT Port-Address D3
2
Both IN & OUT instruction requires 3 Machine cycles and 10 T-states.

M/C1 (M1) - Opcode fetch , M/C2 (M2) - Memory Read , M/C3 (M3) - Memory write / Memory read

In M3, the address bits (A15-A8) will be having the low order address bits (A7-A0), since the port address in only
8 bits.

Timing diagram for IN C0H.

o Fetching the Opcode DBH from the

memory 4125H.

o Read the port address C0H from

4126H.

o Read the content of port C0H and

send it to the accumulator.

o Let the content of port is 5EH.

 Address decoding logic

An "address decoding logic" in an input device is a circuit within the device that interprets the

address signal sent from the CPU on the system bus, determining whether the current address is

meant for that specific input device, effectively "selecting" it to receive data or commands when its

assigned address is detected on the bus; this allows multiple devices to share the same bus without

interference by only activating the intended device based on its unique address.
Explain the decoding logic map :
 Device selection and data transfer
Requirements
(i) Device address pulse is required
(ii) Combine device address pulse with the control signal to generate the I/O
device pulse
(iii) use this to activate the I/O port