+ Chapter 4

Cache Memory
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 Table 4.1
Key Characteristics of Computer Memory Systems

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+
Characteristics of Memory
Systems
 Location
 Refers to whether memory is internal and external to the
computer
 Internal memory is often equated with main memory
 Processor requires its own local memory, in the form of registers
 Cache is another form of internal memory
 External memory consists of peripheral storage devices that are
accessible to the processor via I/O controllers

 Capacity
 Memory is typically expressed in terms of bytes

 Unit of transfer
 For internal memory the unit of transfer is equal to the number of
electrical lines into and out of the memory module

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 Method of Accessing Units of
Data
Sequential Direct Random Associativ
access access access e

Each addressable
A word is retrieved
Memory is organized location in memory has
Involves a shared read- based on a portion of
into units of data a unique, physically
write mechanism its contents rather
called records wired-in addressing
than its address
mechanism

Each location has its

The time to access a
own addressing
Individual blocks or given location is
Access must be made mechanism and
records have a unique independent of the
in a specific linear retrieval time is
address based on sequence of prior
sequence constant independent
physical location accesses and is
of location or prior
constant
access patterns

Any location can be

Cache memories may
selected at random
Access time is variable Access time is variable employ associative
and directly addressed
access
and accessed

Main memory and

some cache systems
are random access

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+ Memory
 The most common forms are:
 Semiconductor memory
 Magnetic surface memory
 Optical
 Magneto-optical

 Several physical characteristics of data storage are important:

 Volatile memory
 Information decays naturally or is lost when electrical power is switched off
 Nonvolatile memory
 Once recorded, information remains without deterioration until deliberately
changed
 No electrical power is needed to retain information
 Magnetic-surface memories
 Are nonvolatile
 Semiconductor memory
 May be either volatile or nonvolatile
 Nonerasable memory
 Cannot be altered, except by destroying the storage unit
 Semiconductor memory of this type is known as read-only memory (ROM)
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+
Memory Hierarchy

 Design constraints on a computer’s memory can be

summed up by three questions:
 How much, how fast, how expensive

 There is a trade-off among capacity, access time, and

cost
 Faster access time, greater cost per bit
 Greater capacity, smaller cost per bit
 Greater capacity, slower access time

 The way out of the memory dilemma is not to rely on a

single memory component or technology, but to
employ a memory hierarchy

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© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
+
Memory
 The use of three levels exploits the fact that
semiconductor memory comes in a variety of types
which differ in speed and cost
 Data are stored more permanently on external mass
storage devices
 External, nonvolatile memory is also referred to as
secondary memory or auxiliary memory
 Disk cache
 A portion of main memory can be used as a buffer to hold
data temporarily that is to be read out to disk
 A few large transfers of data can be used instead of many
small transfers of data
 Data can be retrieved rapidly from the software cache rather
than slowly from the disk
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© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
 Table 4.2
Elements of Cache Design
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Mapping Function
 Because there are fewer cache lines than main
memory blocks, an algorithm is needed for mapping
main memory blocks into cache lines
 Three techniques can be used:

Direct Associative Set Associative

• The simplest technique • Permits each main • A compromise that
• Maps each block of memory block to be exhibits the strengths
main memory into only loaded into any line of of both the direct and
one possible cache line the cache associative approaches
• The cache control logic while reducing their
disadvantages
interprets a memory
address simply as a Tag
and a Word field
• To determine whether a
block is in the cache,
the cache control logic
must simultaneously
examine every line’s
Tag for a match

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+
Set Associative Mapping

 Compromise that exhibits the strengths of both the

direct and associative approaches while reducing their
disadvantages
 Cache consists of a number of sets
 Each set contains a number of lines
 A given block maps to any line in a given set
 e.g. 2 lines per set
 2 way associative mapping
 A given block can be in one of 2 lines in only one set

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+
Replacement Algorithms

 Once the cache has been filled, when a new block is

brought into the cache, one of the existing blocks must
be replaced
 For direct mapping there is only one possible line for
any particular block and no choice is possible
 For the associative and set-associative techniques a
replacement algorithm is needed
 To achieve high speed, an algorithm must be
implemented in hardware

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+ The most common replacement
algorithms are:
 Least recently used (LRU)
 Most effective
 Replace that block in the set that has been in the cache longest
with no reference to it
 Because of its simplicity of implementation, LRU is the most
popular replacement algorithm

 First-in-first-out (FIFO)
 Replace that block in the set that has been in the cache longest
 Easily implemented as a round-robin or circular buffer technique

 Least frequently used (LFU)

 Replace that block in the set that has experienced the fewest
references
 Could be implemented by associating a counter with each line

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+ Summary Cache
Memory
Chapter 4
 Elements of cache
 Computer memory
system overview design
 Cache addresses
 Characteristics of
 Cache size
Memory Systems
 Memory Hierarchy  Mapping function

 Cache  Replacement
memory
principles algorithms

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