Unit 5 FG & Timer
Unit 5 FG & Timer
timer
UNIT 5
ICL8038 Function Generator
• FG are designed to provide the basic waveforms such as square,
triangular and sine wave. They are also called waveform generators.
• The monolithic FGs provide these basic waveforms with a minimum
number of external components.
Principle
• ICL8038 is based on charging and discharging of a grounded
capacitor.
• Charging & discharging rates is controlled by current
• When switch position A, the capacitor charges at rate . Once the
capacitor reaches the upper threshold voltage the comparator triggers
and it resets the flip-flop output.
• This cause switch position B. Now capacitor starts discharge rate
• This cycle is repeat.
Simplified Block Diagram of ICL8038
IC 555 TIMER
Introduction
• 555 Timer is a highly stable device for generating accurate time delay
or oscillation.
• Signetics corporation first introduced this device as SE555 / NE 555
and it is available in two package style, 8 pin circular style, TO-99 can
or 8 pin DIP or 14 pin DIP.
• There is also available counter timer such as Exar’s XR-2240 which
contains a 555 timer plus a programmable binary counter in a single
16 pin package.
• A single 555 timer can provide time delay ranging from microseconds
to hours whereas counter timer can have a maximum timing range of
days.
• 555 timer can be used with supply voltage in the range of +5 V to
+18V and can drive load up to 200mA.
• It is compatible with both TTL and CMOS logic circuits.
• Because of the wide range of supply voltage, the 555 timer is versatile
and easy to use in various applications.
Pin Diagram
Application
Various applications include,
• Oscillator
• Pulse generator
• Ramp wave generator
• Square wave generator
• Mono-shot multivibrator
• Burglar alarm
• Traffic light control
• Voltage monitor
IC555 Timer
• 3 resistors act as voltage divider, providing bias voltage of to the upper
comparator and to the lower comparator, where is the supply voltage.
• since these two voltages fix the necessary comparator threshold
voltage, they also aid in determining the timing interval.
• It is possible to vary time electronically too, by applying a modulation
voltage to the control voltage input terminal (pin 5).
• In applications, where no such modulation is intended, it is
recommended by manufactures that a capacitor (0.01µF) be connected
between control voltage terminal (pin 5) and ground to by-pass noise
or ripple from the supply.
• In the standby (stable) state, the output of the control flip-flop is
HIGH. This makes the output LOW because of power amplifier which
is basically an inverter.
• A negative going trigger pulse is applied to pin 2 and should have its
dc level greater than the threshold level of the lower comparator (), the
output of the lower comparator goes HIGH and sets the FF (Q = 1 & =
0).
• During the positive excursion, when the threshold voltage at pin 6
passes through , the output of the upper comparator goes HIGH and
resets the FF (Q = 0 & = 1).
• The reset input (pin 4) provides a mechanism to reset the FF in a
manner which overrides the effect of any instruction coming to FF
from lower comparator.
• This overriding reset is effective when the reset input is less than about
0.4V. When this reset is not used, it is returned to .
• The transistor Q2 serves as a buffer to isolate the reset input from the
FF and transistor Q1.
• The transistor Q2 is driven by an internal reference voltage obtained
from supply voltage .