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Yasuyuki Tanabe
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2000 – 2009
- 2002
- [j4]Nobutaro Shibata, Mayumi Watanabe, Yasuyuki Tanabe:
A current-sensed high-speed and low-power first-in-first-out memory using a wordline/bitline-swapped dual-port SRAM cell. IEEE J. Solid State Circuits 37(6): 735-750 (2002)
1990 – 1999
- 1999
- [j3]Satoshi Shigematsu, Hiroki Morimura, Yasuyuki Tanabe, Takuya Adachi, Katsuyuki Machida:
A single-chip fingerprint sensor and identifier. IEEE J. Solid State Circuits 34(12): 1852-1859 (1999) - 1997
- [j2]Satoshi Shigematsu, Shin'ichiro Mutoh, Yasuyuki Matsuya, Yasuyuki Tanabe, Junzo Yamada:
A 1-V high-speed MTCMOS circuit scheme for power-down application circuits. IEEE J. Solid State Circuits 32(6): 861-869 (1997) - 1994
- [j1]Yusuke Ohtomo, Sadayuki Yasuda, Minoru Togashi, Massyuki Ino, Yasuyuki Tanabe, Jun-ichi Inoue, Masafumi Nogawa, Sshigeki Hino:
BiCMOS circuit technology for a 704 MHz ATM switch LSI. IEEE J. Solid State Circuits 29(5): 557-563 (1994)
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