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"Synthesis of Sequential Circuits with Clock Control to Improve Testability."
Kent L. Einspahr, Shashank K. Mehta, Sharad C. Seth (1998)
- Kent L. Einspahr, Shashank K. Mehta, Sharad C. Seth:
Synthesis of Sequential Circuits with Clock Control to Improve Testability. Asian Test Symposium 1998: 472-

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