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"Defect-tolerance design of the high-speed RSA encryption processor with ..."

Nobuhiro Tomabechi, Teruki Ito (2001)

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DOI: 10.1109/ICECS.2001.957731

access: closed

type: Conference or Workshop Paper

metadata version: 2021-01-18

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Nobuhiro Tomabechi, Teruki Ito:
Defect-tolerance design of the high-speed RSA encryption processor with built-in table for residue calculation of redundant binary numbers. ICECS 2001: 267-271

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